data sheet p2003bdg

5
1 DEC-23-2004 N-Channel Logic Level Enhancement Mode Field Effect Transistor P2003BDG TO-252 (DPAK) Lead-Free NIKO-SEM ABSOLUTE MAXIMUM RATINGS (T C = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS Gate-Source Voltage V GS ±20 V T C = 25 °C 35 Continuous Drain Current T C = 100 °C I D 25 Pulsed Drain Current 1 I DM 120 Avalanche Current I AR 15 A Avalanche Energy L = 0.133mH E AS 15 Repetitive Avalanche Energy 2 L = 0.05mH E AR 5.6 mJ T C = 25 °C 50 Power Dissipation T C = 100 °C P D 35 W Operating Junction & Storage Temperature Range T j , T stg -55 to 150 Lead Temperature ( 1 / 16 ” from case for 10 sec.) T L 275 °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS Junction-to-Case R θJC 2.5 Junction-to-Ambient R θJA 75 Case-to-Heatsink R θCS 0.7 °C / W 1 Pulse width limited by maximum junction temperature. 2 Duty cycle 1ELECTRICAL CHARACTERISTICS (T C = 25 °C, Unless Otherwise Noted) LIMITS PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT STATIC Drain-Source Breakdown Voltage V (BR)DSS V GS = 0V, I D = 250µA 25 Gate Threshold Voltage V GS(th) V DS = V GS , I D = 250µA 1.0 1.5 3.0 V Gate-Body Leakage I GSS V DS = 0V, V GS = ±20V ±250 nA V DS = 20V, V GS = 0V 25 Zero Gate Voltage Drain Current I DSS V DS = 20V, V GS = 0V, T J = 125 °C 250 µA 1. GATE 2. DRAIN 3. SOURCE PRODUCT SUMMARY V (BR)DSS R DS(ON) I D 25 20mΩ 35A G D S

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Page 1: Data Sheet P2003BDG

1 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor

P2003BDGTO-252 (DPAK)

Lead-FreeNIKO-SEM

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS

Gate-Source Voltage VGS ±20 V

TC = 25 °C 35 Continuous Drain Current

TC = 100 °C ID

25

Pulsed Drain Current1 IDM 120

Avalanche Current IAR 15

A

Avalanche Energy L = 0.133mH EAS 15

Repetitive Avalanche Energy2 L = 0.05mH EAR 5.6 mJ

TC = 25 °C 50 Power Dissipation

TC = 100 °C PD

35 W

Operating Junction & Storage Temperature Range Tj, Tstg -55 to 150

Lead Temperature (1/16” from case for 10 sec.) TL 275 °C

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS

Junction-to-Case RθJC 2.5

Junction-to-Ambient RθJA 75

Case-to-Heatsink RθCS 0.7

°C / W

1Pulse width limited by maximum junction temperature. 2Duty cycle ≤ 1% ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)

LIMITS PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX

UNIT

STATIC

Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 25

Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 1.0 1.5 3.0 V

Gate-Body Leakage IGSS VDS = 0V, VGS = ±20V ±250 nA

VDS = 20V, VGS = 0V 25 Zero Gate Voltage Drain Current IDSS

VDS = 20V, VGS = 0V, TJ = 125 °C 250µA

1. GATE 2. DRAIN 3. SOURCE

PRODUCT SUMMARY V(BR)DSS RDS(ON) ID

25 20mΩ 35A G

D

S

Page 2: Data Sheet P2003BDG

2 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor

P2003BDGTO-252 (DPAK)

Lead-FreeNIKO-SEM

On-State Drain Current1 ID(ON) VDS = 10V, VGS = 10V 35 A

VGS = 4.5V, ID = 15A 23 31 Drain-Source On-State Resistance1 RDS(ON)

VGS = 10V, ID = 15A 15.5 20 mΩ

Forward Transconductance1 gfs VDS = 15V, ID = 30A 14 28 S

DYNAMIC

Input Capacitance Ciss 530 700

Output Capacitance Coss 200 275

Reverse Transfer Capacitance Crss

VGS = 0V, VDS = 25V, f = 1MHz

60 90

pF

Total Gate Charge2 Qg 8.4 11

Gate-Source Charge2 Qgs 2.5 3.1

Gate-Drain Charge2 Qgd

VDS = 0.5V(BR)DSS, VGS = 10V,

ID = 15A 6.4 9.6

nC

Turn-On Delay Time2 td(on) 6.2 9.3

Rise Time2 tr VDD = 15V 11 17

Turn-Off Delay Time2 td(off) ID ≅ 15A, VGS = 10V, RGS = 12.7Ω 23 34

Fall Time2 tf 18 27

nS

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)

Continuous Current IS 35

Pulsed Current3 ISM 120A

Forward Voltage1 VSD IF = IS, VGS = 0V 1.1 1.4 V

Reverse Recovery Time trr 15 18 nS

Reverse Recovery Charge Qrr 2 3 nC1Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%. 2Independent of operating temperature. 3Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P2003BDG”, DATE CODE or LOT #

Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.

Page 3: Data Sheet P2003BDG

3 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor

P2003BDGTO-252 (DPAK)

Lead-FreeNIKO-SEM

TYPICAL CHARACTERISTICS

V ,DRAIN- SOURCE VOLTAGE ( V )

ON-REGION CHARACTERISTIC

I ,D

RA

IN -

SO

UR

CE

CU

RR

EN

T( A

)D

0

DS

5

10

15

2025

30

3540

4550

55

60

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

7.0V 6.0V5.0V

4.5V

4.0V

3.5V

10.0V

GSV =3.0V

ON- RESISTANCE VARIATION WITH DRAIN CURRENT AND GATE VOLTAGE

I ,DRAIN CURRENT( A )

R

,NO

RM

ALI

ZED

DR

AIN

- S

OU

RC

E O

N -

RE

SIS

TAN

CE

DS

(ON

)

D

0

0.5

1.0

1.5

2.0

2.5

3.0

0 10 20 30 40 50 60

GSV = 4.0V

4.5V

7.0V6.0V

5.0V

10V

50

ON- RESISTANCE VARIATION WITH TEMPERATURE

R

,N

OR

MAL

IZED

DR

AIN

- S

OU

RC

E O

N -

RE

SIS

TAN

CE

0.6-50

DS

(ON

)

0.8

1.0

j

-25 0 25

I = 15AV = 10V

1.4

1.2

1.6

1.8

GS

D

15010075 125 175T ,JUNCTION TEMPERATURE( °C )

6

ON-RESISTANCE VARIATION WITH GATE-TO-SOURCE VOLTAGE

R

,ON

-RE

SIS

TAN

CE

(OH

M)

DS

(ON

)

0.01

0.02

0.03

42

0.04

0.05

0.06D

8 10

A

A

V ,GATE TO SOURCE VOLTAGEGS

I = 15A

T = 25°C

T = 125°C

V ,GATE TO SOURCE VOLTAGE

TRANSFER CHARACTERISTICS

I ,D

RA

IN C

UR

RE

NT(

A )

01

D

10

20

2GS

DS

40

30

50

60

3 4 5

AV =10V T = -55°C 25°C125°C

SOURCE CURRENT AND TEMPERATUREBODY DIODE FORWARD VOLTAGE VARIATION WITH

V ,BODY DIODE FORWARD VOLTAGE( V )0.8

I ,R

EV

ER

SE

DR

AIN

CU

RR

EN

T( A

)

0.0001

S

0

0.001

0.01

0.2SD

0.4 0.6

V = 0V

1

0.1

10

60

GS

1.41.0 1.2

T = 125°CA

25°C -55°C

Page 4: Data Sheet P2003BDG

4 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor

P2003BDGTO-252 (DPAK)

Lead-FreeNIKO-SEM

I = 15AD

Q ,GATE CHARGE ( nC )

V

,GA

TE -

SO

UR

CE

VO

LTA

GE

( V

) G

S

g

10

0

6

8

10V

15V

DSV = 5V

0 4 8 12 16

4

2

GATE CHARGE CHARACTERISTICS

V ,DRAIN TO SOURCE VOLTAGE ( V )

CAPACITANCE CHARACTERISTICS

CA

PA

CIT

AN

CE

( pF

)

f = 1MHZGSV = 0V10

1

100

DS

5 10

1000

10000

Crss

15 20 30

Coss

Ciss

25

SINGLEPULSE MAXIMUM POWER DISSIPATION

SINGLE PULSE TIME( SEC )

PO

WER

( W )

0.01

400

0

800

0.1 1

2000

1200

1600

2400

10010

SINGLE PULSE

1000

C

θJCR = 2 .5°C/WT = 25°C

MAXIMUM SAFE OPERATING AREA

I ,D

RAI

N C

UR

RE

NT(

A )

SINGLE PULSEV = 10V

10

D

JCθ

GS

DS

ds(on)R Limit

V ,DRAIN - SOURCE VOLTAGE

-1 010 110 210010

110

210

310

35.0µS

Tc = 25 °CR = 2.5 °C/W

DC

10ms

1ms

100µS

t1 , TIME( ms )

TRANSIENT THERMAL RESPONSE CURVE

r

,NO

RM

ALI

ZED

EFF

EC

TIVE

TRA

NS

IEN

T TH

ER

MA

L R

ES

ISTA

NC

E

( t )

10-7 -6

10-5

10-4

10-3

10-2

10-1

100

10

-410

10-3

-210

-110

010

110

Single pulse

0.010.02

0.05

0.100.20

D=0.5

P(pk

)

t1t2

1.R (t)=r(t)*R2.R = 2.5° C/W3.T + T = P * R (t)j C

t1t2

4.Duty Cycle,D =

θJCθJC

θJC

Page 5: Data Sheet P2003BDG

5 DEC-23-2004

N-Channel Logic Level Enhancement Mode Field Effect Transistor

P2003BDGTO-252 (DPAK)

Lead-FreeNIKO-SEM

TO-252 (DPAK) MECHANICAL DATA

mm mm Dimension

Min. Typ. Max. Dimension

Min. Typ. Max.

A 9.35 10.4 H 0.89 2.03

B 2.2 2.4 I 6.35 6.80

C 0.45 0.6 J 5.2 5.5

D 0.89 1.5 K 0.6 1

E 0.45 0.69 L 0.5 0.9

F 0.03 0.23 M 3.96 4.57 5.18

G 5.2 6.2 N

G

A

H

JIB

C

M

L

K

DE

F1

32