data communications & computer networks chapter 6 digital data...

ACOE312 Digital Data Communications Techniques 1

Data Communications &

Computer Networks

Chapter 6

Digital Data Communications

Techniques

Fall 2008

Agenda

• Preface

• Asynchronous & Synchronous transmission

• Error Detection & Correction

• Line configurations

• Interfacing

—1. RS232

—2. USB

—3. Firewire IEEE1394

• Home Exercises


Preface

Preface

• The preceding three lectures have been primarily concerned with the attributes of data transmission, such as

—The characteristics of data signals and transmission media,

—The encoding of signals, and

—Transmission performance

• In this lecture, emphasis is shifted from data transmission to data communications


Key points

• The transmission of data from one device to another across a transmission link involves cooperation and agreement between the two sides

• One of the most fundamental requirements is synchronization—The receiver must know the rate at which the bits are received in order to sample them at appropriate intervals so as to determine the value of each received bit

• Two techniques used which concern serial transmission

— Asynchronous transmission

— Synchronous transmission

Serial transmission

• Serial transmission means that data are transferred over a single signal path rather than a parallel set of lines, as it is common with I/O devices and computer signals.

• Signalling elements are sent along the line one at a time, which may be— Less than one bit (eg Manchester encoding)

— One bit (eg NRZ-L, FSK for digital and analog signals)

— More than one bit (eg QPSK)

• In this lecture we assume one bit per signalling element unless otherwise specified


Asynchronous & Synchronous

transmission

Asynchronous transmission

• Data are transmitted one character at a time—A character is 5 to 8 bits in length

— Each character of data is treated independently

— Timing only needs to be maintained within each character

• Each character begins with a start bit that alerts the receiver that a character is arriving

• The receiver samples each bit in the character and then looks for the beginning of the next character —Resynchronize with each character

• This technique does not work well for large blocks of characters, which is more efficient than sending one character at a time— For large blocks, synchronous transmission is used


Asynchronous (diagram)

NRZ-L

NRZ-L

NRZ-L

One character

lsb msb

Samples every 94µs

erroneous sample

Asynchronous - Behavior

• In a steady stream, interval between characters is uniform (length of stop element)

• In idle state, receiver looks for transition 1 to 0

• Then samples next seven intervals (char length)

• Then looks for next 1 to 0 for next char

• Pros/Cons

— Simple

— Cheap

— Overhead of 2 or 3 bits per char (~20%)

—Overhead = start bit + stop element + parity bit

—Good for data with large gaps (keyboard)


Synchronous - Bit Level

• Block of data transmitted without start or stop bits

• Clocks of tx and rx must be synchronized

• Can use separate clock line—Good over short distances

—Subject to impairments => timing errors can occur

• Embed clock signal in data—For Digital signals• Manchester or Differential Manchester encoding

—For analog signals• Synchronize rx based on the phase of Carrier frequency

Synchronous - Block Level

• Another level of synchronization required to allow the rx to determine the start and end of a block of data

• Each block begins with a a preamble bit pattern and ends with a postamble bit pattern

—e.g. series of SYN (hex 16) characters

—e.g. block of 11111111 patterns ending in 11111110

• Other control bits are also added to the block

• Frame = data + preamble + postamble + control info

• Overhead = control info

• More efficient (lower overhead) than asynchronous tx


Synchronous (diagram)

Synchronous tx frame format

Error Detection & Correction


Types of Errors

• An error occurs when a bit is altered between transmission and reception

• Single bit errors

—One bit altered

— Adjacent bits not affected

— Can occur in the presence of white noise

• Burst errors

— Length B

—Contiguous sequence of B bits in which first last and any number of intermediate bits in error

— Can be caused by impulse noise and Fading in wireless networks

— Effect is greater at higher data rates

Error Detection

• Additional bits added by transmitter for error detection code

• Error detection schemes

—Parity check

• Value of parity bit is such that character has even (even parity) or odd (odd parity) number of ones

• However, if two (or any even number) of bit are inverted due to error, errors go undetected

—Cyclic Redundancy Check (CRC)


Error Detection Process

Cyclic Redundancy Check (CRC)

• Given a message block of k bits, the transmitter generates an (n-k) bit sequence, known as the Frame Check Sequence (FCS)

• So, the tx transmits (k+n-k)=n bits which is exactly divisible by some predetermined number

• The receiver divides the incoming frame by that number

—If there is no remainder, then it assumes there was no error


Error Correction

• Correction of detected errors usually requires data block to be retransmitted

• Not appropriate for wireless applications

—Bit error rate is high

• Lots of retransmissions

—Propagation delay can be long (satellite) compared with frame transmission time

• Would result in retransmission of frame in error plus many subsequent frames

• Need to correct errors on basis of bits received

Error Correction Process

Diagram


Error Correction Process

• Each k bit block of data mapped to an n bit block (n>k)—This is called Codeword

— Forward error correction (FEC) encoder

• Codeword is then transmitted

• Received bit string similar to transmitted but may contain errors

• Received codeword is then passed to FEC decoder

— If no errors, original data block output

— Some error patterns can be detected and corrected

— Some error patterns can be detected but not corrected

— Some (rare) error patterns are not detected

• Results in incorrect data output from FEC

Working of Error Correction

• Error Correction works by adding redundancy to thetransmitted message

• This makes it possible for the rx to deduce the originalmessage even with a certain level of error rate

• E.g. block error correction code

— In general, FEC algorithm takes as input a k-bit block and adds(n – k ) check bits to end of block

• This gives an n- bit block (codeword)

• All of the bits in the original k bit block are included in codeword

— Some FEC map the k bit input onto n bit codeword such that original k bits do not appear in the codeword


Line Configurations

Line Configurations

• Two characteristics that distinguish various data link configurations are —Topology

—Whether the link is half-duplex or full-duplex

• Topology— Physical arrangement of stations on medium

— Point to point (ie only two stations)

— Multi point

• Computer and terminals, Local Area Network

• Half duplex—Only one station may transmit at a time

— Requires one data path

• Full duplex— Simultaneous transmission and reception between two stations

— Requires two data paths (or echo canceling)


Traditional Configurations

Interfacing


Interfacing

• Data processing devices (or data terminal equipment, DTE) do not (usually) include data transmission facilities

— Examples of DTEs are data terminals, computers

• Need an interface called data circuit terminating equipment (DCE)

— e.g. modem, Network Interface Card (NIC)

• DCE is responsible for

— transmitting and receiving bits, one at a time, over a tx medium or network

• DCE exchanges data and control info with DTE

—Done over interchange circuits (set of wires)

— Clear interface standards required

Data Communications

Interfacing


Data Communications

Interfacing

• The two DCEs that exchange signals over the txline or network must understand each other

—The rx of each must use the same encoding scheme and data rate as the tx of the other

• Each DTE-DCE pair must be designed to interact cooperatively

—Need to specify the exact nature of the interface between DTE-DCE, i.e. interface characteristics

Characteristics of Interface

• Mechanical

—Actual physical connection of DTE to DCE

— Connection plugs

• Electrical

—Voltage levels, timing, encoding

• Functional

— Specify the functions performed by assigning meanings to each of the interchange circuits

— Data, control, timing, electrical grounding

• Procedural

— Sequence of events for transmitting data based on the functional characteristics of the interface


Serial Interfaces

• Serial interfaces send one bit of data at a time

— Simpler than parallel interfaces

• Serial interfaces allow connection to a wide range of off-board devices

• Provide a robust interface• Tolerates distances better

• Tolerates timing issues better

• Less prone to interference

• Supported almost universally

• Lower cost than parallel interfaces

• Disadvantage of serial buses:

—Higher clock-rates required for given bandwidth

1. RS232

• RS232 is the most common serial interface

— Supported by almost all PCs

• Goals

• Provide a robust communications system

• Easy implementation (little hardware or software)

• Support distances up to several meters

• Drawbacks

• Speed is limited (often to 9600 or 57600 bps)

• Cables and connectors are somewhat clunky

• USB (Universal Serial Bus) and Firewire IEEE 1394are replacing RS232


DB-9 RS232 Connector

(Mechanical specification)

Male

1 2 3

6 7 8

4

9

5

Pin Function

1 DCD

2 Rx

3 Tx

4 DTR

5 Ground

6 DSR

7 RTS

8 CTS

9 RING

GND Female

Pin Function

1 DCD

2 Tx

3 Rx

4 DTR

5 Ground

6 DSR

7 RTS

8 CTS

9 RING

5 4 3

9 8 7

2

6

1

GND

DB-25 RS232 Connector

(Mechanical specification)


RS232 Signals

When the line is IDLE, a constant high signal is sent

RS232 Signals are NRZ-L in nature:

Binary ‘1’ is represented by -12V

Binary ‘0’ is represented by +12V

To begin transmitting a character, send a START bit (low)

Character data is usually eight bits, transmitted LSB to MSB

End with one or more STOP bits (high)

+12

-12IDLE 8 Data Bits STOP

START

IDLE

Electrical Specification

• Digital signals

• Values interpreted as data or control, depending on circuit

• -12V is binary 1, +12V is binary 0 (NRZ-L)

• Signal rate < 20kbps

• Distance <15m

• For control, -12V is off, +12V is on


Functional Specification

• Circuits grouped in categories

—Data

—Control

—Timing

—Ground

• One circuit in each direction

—Full-duplex

• Two secondary data circuits

—Allow halt or flow control in half-duplex operation, i.e. data exchanged in one direction at a time

Timing Issues

What if the sending and receiving clocks aren’t exactly the same speed?

Example: Assume that the receive clock is slightly faster than the

send clock…

IDLE 8 Data Bits STOP

START

IDLESend

Rx

Rx clock is synchronized at start bit

Each bit is read on falling edge – note how the edge creeps to the the

left with each bit

The clock only has to be close enough to read one character –

after that the clocks are re-synchronized


Local and Remote Loopback

Loopback control is a useful fault

isolation tool.

RS232

(Procedural Specification)

RS232 was designed to connect a terminal to a modem

Data

TerminalEquipment

(DTE)

Data

CommunicationsEquipment

(DCE)

Computer Modem

Link to

remote

modem

To transmit:

DCD - Data Carrier Detect

DSR - Data Set Ready

DCE asserts:

RTS - Ready to Send

DTE asserts:

CTS - Clear to Send

DCE asserts:

Tx - Transmitted data

DTE asserts:

Rx - Received dataReceiving data is automatic

Tx

Rx

DCD

CTS

RTS

DSR

GND

DTR

Tx

Rx

DCD

CTS

RTS

DSR

GND

DTR

DTR – Data Terminal Ready

DTE asserts:

2

3

4

5

1


Procedural Specification

• E.g. Asynchronous private line modem

• When turned on and ready, modem (DCE) asserts DSR (DCE ready)

• When DTE is ready to send data, it asserts RTS (Ready to Send)—Also inhibits receive mode in half-duplex

• Modem responds when ready by asserting CTS

• DTE sends data (Tx)

• When data arrives, local modem asserts Receive Line Signal Detector and delivers data

Analogy with telephone system

• A telephone set responds by ringing its bell

• a person answers by lifting the handset

• The person listens for another’s voice and if nothing is heard, hangs up

• A modem responds by asserting Ring Indicator

• a DTE answers by asserting DTE Ready (DTR)

• A DTE listens for Received Line Signal Detector asserted by the modem. If this circuit is not asserted (i.e no carrier tone comes through), the DTE will drop DTR

When a call is made, the telephone system sends a ringing signal


Telephone network

Dial Up Operation (1)

Pin 2: Tx data

Pin 20: DTR (DTE Ready)

Pin 6: DSR (DCE Ready)

Pin 20: DTR (DTE Ready)

Pin 22: Ring Indicator


Pin 3: Rx data

Pin 6: DSR (DCE Ready)

Pin 8: Received Line Signal Detector

Pin 8: Received Line Signal Detector



Pin 3: Rx dataPin 2: Tx data

Pin 4: RTS (Ready to Send)

Pin 5: CTS (Clear to Send)

Null Modem

If distance between devices is close enough to allow two DTEs to signal each other directly, RS-232 can be used without any DCE in between.

For this scheme to work, a null-modem is needed, which interconnects leads in such a way as to fool both DTEs into thinking they are connected to modems.


2. USB

• USB = Universal Serial Bus

—Industry-led open standard

• USB Implementers Forum USB-IF

—Intel, Microsoft, HP, Compaq…

• Evolution

—USB 1.0 (1996)

—USB 1.1 (1998)

—USB 2.0 (2000)

Keyboard

Mouse

Serial

Port

Parallel

PortSCSI

Port

Sound/Game

Ports

GraphicsPort

LANLAN Modem

Graphics

PortLAN

Telephony, Modem,

Kyb, Mouse, Joystick,

Still/ Motion Camera,

Digital Audio,

Backup Store,Printer, Scanner,

Wireless Adaptors

USB

USB USB USB

PC Connectivity

USB in 1996:

Initially introduced as an incremental connector for new applications.

USB Future:

The PC evolves into a simpler, easier to use appliance.


USB Introduction

• Requires software layers both on the host computer and on the USB device

• Serial Protocol and Physical Link

• Hierarchy: PC is the host—Upstream points towards the host

— Downstream points away from the host

• Data transmitted serially—Data transmitted differentially on a pair of wires (D+ and D-)

— 2 other wires are used to supply power to USB devices

• USB devices may be Bus Powered or Self-Powered

USB Cables

• High Speed Cables

—Shielded, jacketed - use twisted pair wiring

—Support max data rates of 12Mbps

—Support Cable lengths of 5m

• Low Speed cables

—Not shielded, pairs not twisted, cheaper

—Support 1.5Mbps

—Support Cable lengths of 3m


USB Connectors

• Connectors• 4-Position with shielded housing

• Type A Connector connects to Upstream Ports

• Type B Connector connects to Downstream Ports

• Each USB Cable has a Type A & Type B Connector

Data signaling and bandwidth

• Bi-directional, half-duplex link

• Embedded clock and data- NRZI (Non Return to Zero, Inverted)

• Differential signal pair

• USB 1.0 / 1.1

— 12 Mbps Full Speed (FS) bit rate

— 1.5 Mbps Low Speed (LS) bit rate

• USB 2.0 (May 2000)

— additionally: 480 Mbps High Speed (HS)

— Applications: USB HDD, Video


Star topology

Host

Mouse Joystick

Hub

PeripheralPeripheral

KeyBoard

A

B B B

B

A

BB

A A A

A

• Distributed connectivity points

• Up to 5m cable length per segment

• Up to 127 Devices

Host, Hubs, Devices

• Only one host per system – usually the PC

• Host is the USB system master

—Controls and schedules all communications

• Hubs are communication nodes that interconnect devices

• Peripherals controlled by the USB bus are slaves that respond to host commands

• Peripherals are called USB devices or functions


USB Data Transfer Types

• USB supports four transfer types:

—Control

—Bulk

—Interrupt

—Isochronous

Transfer Type

Control

• Control

—Exchange configuration, set-up and command information between the device and the host

—CRCs are used for error checking as error-free transmission is critical

—Re-transmission initiated when errors are detected

—Control transfer has 2 or 3 stages

• setup stage

• data stage (optional)

• status stage


• Bulk Transfers

—Large amounts of data where data are not time-critical

—Error free transfer important, hence CRC error-checking implemented

—Claim unused bandwidth when nothing more important is going on

—Typical applications:

• Scanners

• Printers

Transfer Type

Bulk

• Interrupt

—Not interrupts in normal sense!

—Unidirectional - only inputs to the host

—Small data transfers that occur infrequently

—Error checking validates the data

—Typical applications:

• Mice

• Keyboards

Transfer Type

Interrupt


• Isochronous

—Unidirectional or bidirectional

—For time sensitive information, e.g. audio or video streaming

—System must be able to tolerate some errors

• No time for error checking

—Guaranteed access to USB with bounded latency

—No Retries

—Max packet size for isochronous transfer is 1023B/frame

—Max isochronous bandwidth is 8.184Mbps

Transfer Type

Isochronous

USB and the PC

• Windows 95

—no USB support until OSR2.1

—No longer officially supported

• Windows 98

—contains USB drivers for common applications

• Windows NT

—no USB support

• Windows 2000/XP

—provides USB support for common applications


3. Firewire IEEE 1394

• Objective : Merging the 2 disciplines

—“Consumer Electronics”• TV, Satellite Broadcast

• VCR, DVD

• Camcorder

—“Computer Electronics”

• Computers

• Hard-disk

• Printers, Scanners

• CDROM

Digital Interface Technologies

USB

IEEE 1394

‘FireWire’

DVD

NIC

DVCR

Modems

Mice

Keyboard

Joystick

12Mbps 100M 200M 400M …


What is IEEE 1394?

• A high speed serial bus specification

• IEEE 1394-1995 standard ratified in Dec 1995

• 1394 is ‘FireWire’—Registered trademark of Apple

• 1394 Trade Association (1994)—Over 100 members (incl. Sony, Microsoft, Philips, Compaq, IBM, 3Com, Apple etc. )

— http://www.1394ta.org

• IEEE 1394a updated specification (Mar 2000)

Why IEEE 1394?

• High speed real-time data rates.

• Multiple devices share the bus.

• Plug-n-play

• Guaranteed bandwidth.

• Low cost peer-to-peer

• Isochronous and Asynchronous transfers.

• Scalable

—Up to 63 nodes on a single bus.

—100, 200, 400 …. 1600, 3200 Mbps and more.


Connector and Cabling

• Small Rugged Connector• 3 pair shielded cable 2 data paths.• Size Advantage

Basic Components of 1394

• Physical layer interface—Analog interface to the cable

— Performs bus arbitration

— Speed (100, 200, 400, Gigabit)

— Number of ports (1, 2, 3, 6)

• Link Layer Controller—Assembles / Disassembles packets

— Handles response and acknowledgments

— Customized for end-application ( Host, peripheral, A/V etc. )

• Host Controller— Implements higher levels of bus protocol


An Example Network

More Reading

• Stallings chapter 6

• Web pages

—ITU-T


Home Exercises

Review questions

• How is the transmission of a single character differentiated from the transmission of the next character in asynchronous transmission?

• What is a major disadvantage of asynchronous transmission?

• How is synchronization provided for synchronous transmission?

• What is a parity bit?

• What is the CRC?

• Why would you expect a CRC to detect more errors than a parity bit?

• What is a DCE, a DTE and what are their function?

• Briefly outline the steps involved in dial-up operation over a telephone network.

• Which data transfer types are supported by USB devices and what are their functions?


Exercise

• Suppose a file of 10kBytes is to be sent over a line at 2400bps.a) Calculate the overhead in bytes and time in using asynchronous communication. Assume one start bit and a stop element of length 1 bit, and 8 bits to send the byte itself for each character. The 8-bit character consists of all data bits, with no parity bit.

b) Calculate the overhead in bytes and time in using synchronous communication. Assume that the data are sent in frames. Each frame consists of 1000 characters of 8-bits each and an overhead of 48 control bits per frame.

c) What would the answers to parts (a) and (b) be for a file of 100,000 characters?

d) What would the answers to parts (a) and (b) be for the original file of 10,000 characters except at a data rate of 9600 bps?

data communications & computer networks chapter 6 digital data...

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