Features• 3-phase, 3-level AC/DC power converter

– Rated nominal output DC voltage: 800 VDC

– Rated nominal input AC voltage: 400 VAC at 50 Hz– Nominal output power AC/DC: 15 kW– Power factor, PF>0.99– Inrush current control and soft start-up– THD lower than 5% at nominal operation

• Power section based on SiC MOSFETs and diodes:– High frequency operation (70 kHz)– High peak efficiency greater than 98%– Passive element weight and size reduction

• Control section based on programmable STNRG388A digital controller– Low cost mixed-signal control

• Overcurrent and overvoltage protections

DescriptionThis reference design represents a complete solution for high power three-phaseAC/DC rectifier applications based on the Vienna topology. It features mixed-signalcontrol, with the STNRG388A controller providing digital output voltage regulation,and dedicated analog circuitry providing high bandwidth continuous conduction mode(CCM) current regulation for maximum power quality in terms of total harmonicdistortion (THD) and power factor (PF).

The high switching frequency of the SiC MOSFETs (70 kHz) and the multilevelstructure allow nearly 99% efficiency as well as the optimization of passive powercomponents in terms of size and cost.

This high efficiency Vienna rectifier is designed for several end applications such aselectric vehicle (EV) and industrial battery chargers, and industrial equipmentrequiring very high PF and low THD.

Product summary

15 kW, 3-phaseVienna rectifier forPFC

STDES-VIENNARECT

Firmware for 15 kW,3-phase Viennarectifier

STSW-VIENNARECT

digital controller forpower conversionwith up to 6 prog.PWM generators,96 MHz PLL

STNRG388A

SiC PowerMOSFET 650 V, 45A, 55 mΩ in HiP247package

SCTW35N65G2V

1200 V, 20 A Highsurge SiliconCarbide PowerSchottky Diode

STPSC20H12

galvanically isolated4 A single gatedriver

STGAP2SM

energy saving 12Whigh voltage VIPER26HD

15 kW, three-phase Vienna rectifier with low cost mixed-signal control for power factor correction

STDES-VIENNARECT

Data brief

DB4073 - Rev 1 - December 2019For further information contact your local STMicroelectronics sales office.

www.st.com

Product summaryconverter with directfeedback

Applications

PFC Converter -Three Phase Input

DC Fast ChargingStation

STDES-VIENNARECT

DB4073 - Rev 1 page 2/15

1 Vienna rectifier with mixed mode control reference design overview

This reference design consists of the following separate components:• Power board with power section, EMI filter, sensing circuit, inrush circuit and auxiliary power supply.• Control board based on the STNRG388A 8-bit digital controller for power conversion applications, along with

connectors for communication, and test-points and status indicators for testing and debugging.

The input and output current and voltage measurements necessary for responsive control are acquired throughisolated measurement blocks, and the control section allows analog implementation of CCM current regulation forpower factor correction, while the bus voltage is regulated through digital control.The STNRG388A provides comprehensive control of the application currents and voltages as well as monitoringand protection, plus the start-up sequence and load variation control. The driving signals of the switching devicesare determined by an internal State Machine Event Driven (SMED), ensuring that time critical tasks are neverinterrupted.

Figure 1. 3-phase mixed-signal rectifier block diagram

LNiNCop

Con

+

+

D1

D2

D3

D4

D5

T1 T2

T3 T4

T5 T6TSV

TSV

TSV

TSV

TSV

TSV

TSV

TSV

TSV

D6

ZVD

GAPlite

GAPlite

GAPlite

GAPlite

GAPlite

GAPlite

VDC_ref

Voltage ControlADC 3

ADC 4

DIGIN[3]DIGIN[4]

DIGIN[5]

ZVD Phase

detector SinusoidalGenerator

LUT

Iph BCU

RREN

T SE

NSI

NG

CURRENT CONTROLPI

STM8 SMEDPWM1

PWM2

PWM3

STNRG388PWM_APWM_B

PWM_C

ANALOGINTEGRATOR 1/S

PWM4

PWM5

PWM6

IREF A

CPP0 CPP1 CPP2

ϕ

|Iref |

iaref

Regi

ster

CPM0 CPM2CPM1 ANALOG

Timed EVENT

Count_Smed4Count_Smed5

Count_Smed6

Connection Box

TIMER CLK_out

ibref

icref

ANALOG LOW PASS FILTER

SMED 1

SMED 2

SMED 3

SMED 4

SMED 5

SMED 6

COMP 0

COMP 1

COMP 2

CPM0

CPM1

CPM2

CPP0

CPP1

CPP2

Ext EVENT

VSIN

,PWM

_IA

VSIN

,PWM

_IB

VSIN

,PWM

_IC

Iph A

Iph C

IREF B

IREF C

RiRf Cfz

VctrlV(iph)V(iref)R2 C1 IREFR3

VSIN pwmR1 C2 R4R1

R2VtriangleVclk Voffset

C1

LPF

STNRG388ANALOG DIGITAL

STDES-VIENNARECTVienna rectifier with mixed mode control reference design overview

DB4073 - Rev 1 page 3/15

2 Schematic diagrams

Figure 2. STDES-VIENNARECT schematic diagram - control board

4

18

R29 0

2

R15

C36

C27

VDD_3.3V

5

C45 1uF/25V

C12

C24

1

1k

C48

1

GPIO0[5]/DALI_rx/I2C_scl/UART_RX

OinB

5

4

TestPoint

27

PIN29

J2

TP11

26

CON4

10

CPP[2]

C33 1uF/25V

4

GPIO0[0]/UART_TX/I2C_sda

LED

TestPoint

9

C42

V_bus_down

CPP[1]

ADCIN[0]

2.2nF/50V

CCO_clk

OUT_PI_B

32

100nF/16V

RESn

R39

TP5

V_bus_upOout

3

VD

DA

TP18

2

100pF/50V

100pF/50V

8

ZVD_B

V_bus_up

n.c.

PWM_INP_Q2

VlineA.S

GPIO1[1]/PWM[1]

31

4

R41

5

TestPoint

TestPoint

R25 220K-

4

100nF/16V14

LMV358IDT

7.5k

RED

O-in_A

2

C3

ZVD_ATestPoint

VlineB.S

7

C49

TP2

TestPoint

n.c.

1nF/25V

VDD_3.3V

C41

R7 10k

8

C51 100nF/16V

27k

100pF/50V

LMV358IDT56k

23

30

+

330pF/50V

TRIANG REF

ADCIN[4]

R52

UART_RX

VDD_3.3V

TP7

1.5nF/50V

R49

C2

7

OinC

GPIO0[1]/UART_RX/I2C_scl

GPIO1[0]/PWM[0]

27k

DIGIN[3]

TP4

10k

UART_TX

100pF/50V

LMV358IDT

+O+in_B

O+in_C

D2

ZVD_C

VlineB.S

TP10

2

VDD_5V

TP20

8

R28

30

C11

100nF/16V

R44

2

OUT_PI_C

A

SWIM I/F

5

16

TestPoint

37

VDD_3.3V

R31

3

17

R53

27k

OinA

4

5

10k

TP24TestPoint

28

J10

VlineA.S

NRST

TEMP

U4

15nF/50V

25

1

A

R51

A

7.5k

8

1nF/25V

R40

2.2nF/50V

OinA

UART TTL (3,3V)

100pF/50V

28

7

C55

CPP[0]

R33

ADCIN[1]

OinA

ZVD_C

220nF/50V

36

TP21

R45 2.4k

R32

7

TP19

OinC

VD

D

1

PWM_INP_Q3

U12

O-in_C

15nF/50V 220nF/50V

26

TestPoint

12

GPIO1[4]/PWM[4]

PWM_INP_Q2

4

Oout

REF SIN_A

3

TP22

6

-

16

TP9

C60

100pF/50V

R26

VlineC.S

27

R48

VlineC.S

LMV358IDT

9

VDD_3.3V

R242.4k

O+in_A

TP14

R47

A

0

C59A

R50

25

VDD_3.3V

6

VDD_3.3V

C52

ADCIN[3]

-

U7B

TP1

11

10nF/50V

VDD_12V

TestPoint

22

32

C13

OUT_PI_C

C31

SWIM

O+in_C

R9 10k

Oout

VlineC.S

C38

O+in_A

TestPoint

33

TRIANG REF

C47

0

100nF/16V

GPIO0[2]/I2C_sda/HSEOscOut

VS

SA

I2C_sda/DIGIN[4]

OUT_PI_A

ZVD_A

24

C23

PWM_INP_Q3

V_bus_down

ZVD_B

18k 0.1%

TP15

ADCIN[5]

1uF/25V

C46

1

R54

J3

4

TSV911ILT

3

TestPoint

A

LMV358IDT

+

CCO_clk

TestPoint

7.5k

13

10pF

ZVD_B

100nF/16V

33C71 uF/25V

220pF/50V

A

C32 100nF/16V

TP23

8

R59 10k

R57

1.5nF/50V

3

GPIO0[3]/I2C_scl/HSEOscIn

100pF/50V

C34

R38

47k

TestPoint

GREEN

100nF/16V

VDD_3.3V

R21-

ZVD_B

17

34

R42

2

R1

VDD_3.3V

8

6

+

C57

C43 100nF/16V

11

n.c.

C58

15

OUT_PI_C

40

ADCIN[2]

UART_RX

39

OinB

1k

13

R23

C8

R14

TP13

C1

U9A

-

V_bus_down

VS

S

C4

47k

18

+

TestPoint

R22

GPIO1[3]/PWM[3]

3DIGIN[0]/CCO_clk

10k 0.1%

VDD_3.3V

D1

7

U5A

VlineB.S

38

FAN C5

OUT_PI_B

1.5nF/50V

1nF/25V

29

TP3

56k

R61 10k

19

R8 10k

22

A4.7uF/10V

+

21

4

VDD_3.3V

OinC

+

R58 10k

37

STNRG388A

R60 10k

OUT_PI_A

20

CON40A

35

U7A

TestPoint

REF SIN_B

L1

REF SIN_A

REF SIN_B

15nF/50V

TRIANG REF

VDDA

A

CCO_clk

O-in_B

CPM3

C9

0

C18 100nF/16V

GPIO1[5]/PWM[5]

1

TRIANG REF

23

8

UART_TX

21

I2C_scl/DIGIN[5]

R41 0kCPP[3]

TestPoint

22k

OUT_PI_A

56k

10k 0.1%

TRIANG REF

SWIM

PWM_INP_Q1

C56

C53 1uF/25V

C35

ADCIN[6]

R20

R27

4

-

1

ZVD_C

34

10

PWM_INP_Q2

C40

PWM_INP_Q1OUT_PI_B

6

TestPoint

TestPoint

SWIM I/F

C39

PWM_INP_Q1

ZVD_A

GPIO1[2]/PWM[2]

TP16

8

330pF/50V

TEMP

35

15

U9B

REF SIN_C

R62 10k

TP8

3

10k

R56 0

TestPoint

36

31

TestPoint

2

VDD_3.3VVDD_12V

330pF/50V

TP12

47k

TestPoint

6

2

29

3

A

VDD_3.3V

A

R43

C28

1

10k 0.1%

R30

5

12

O+in_B

24

56k

TP6

TestPoint

R2

REF SIN_A

R55 2.4k

REF SIN_C

38

FAN

REF SIN_B

100pF/50V

LED

O+in_A

14

O+in_B

4

C54

-

+

U5B

GPIO0[4]/DALI_tx/I2C_sda/UART_TX

ADCIN[7]

VOUT

R34

C30

DIGIN[2]

TP17

OinB

WE-CBF

10nF/50V

PWM_INP_Q3

TestPoint

ZVD_C

LMV358IDT

C50

DIGIN[1]

VDD_3.3V

VlineA.S

R46 0

C29 100pF/50V

100pF/50V

REF SIN_C

O+in_C

56k

19

2.2k

2.2nF/50V

V_bus_up

20

ZVD_A

C44

56k

DB

4073 - Rev 1

page 4/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 3. STDES-VIENNARECT schematic diagram - power board: AC current sensing

7

1

V+

V-

10

D3

STPS1L30A

14

+

-

C

U1A

TSV914IDT

2

C31uF/25V

V_line_A_IN_LEM

09

C8100nF/16V

U5D

TSV914IDT

F530Ohm@100MHz

2

C71uF/25V

IN-3

3

C21N.M.

+

-

9

R4168k

R45 0

8

R25

10k

VDD_5V

TP11

TestPoint_Ring

OU

T-3

6

F230Ohm@100MHz

9

R17390

R4010k

OinB_LEM

2

V_line_C

R1568kTP7

TestPoint_Ring

TP8

TestPoint_Ring

U5C

TSV914IDT

1 +

-

R53390

VDD_5V

V_line_B_IN_LEM

13

3

U4B

TSV912IDT

C19N.M.

VDD_5V

5

TP2

TestPoint_Ring

R9390

OU

T-1

4

6

TP21

TestPoint_Ring

1

U3C

TSV914IDT

R2210k

VDD_5V

F430Ohm@100MHz

1

OU

T-1

4

8

3

R3410k

09

IN-2

2

1

U4A

TSV912IDT

V+

V-

3

5V10

IN-1

1

2

2

11

LEM3LTSR 15-NP

R17.5k

5

14

F130Ohm@100MHz

4

R1469.8k 0.1%

C251uF/25V TP19

TestPoint_Ring

V+

V-

R30

36k 0.1%

11

R48

36k 0.1%

IN-2

2

R5168k

R1610k

7

TP6

TestPoint_Ring

TP12

TestPoint_Ring

OU

T-3

6

TP17

TestPoint_Ring2

C10N.M.

R5069.8k 0.1%

6

OUT8

U1D

TSV914IDT

25

V+

V-

1

U5B

TSV914IDT

IN-3

3

C9N.M.

TP16

TestPoint_Ring

+

-

OinA_LEM

V+

V-

C12100nF/16V

TP5

TestPoint_Ring

U3D

TSV914IDT

+

-

V_line_B

U6B

TSV912IDT

+

-

R20

0

C14100nF/16V

R668k

R4N.M.

1

C26

1uF/25V

7

OUT8

VDD_B2.5V

10

13

U3A

TSV914IDT

2

D1

STPS1L30A

5

R1818.7k

TP4

TestPoint_Ring

7

A

2

TP13

TestPoint_Ring

LEM1LTSR 15-NP

C6100nF/16V

+

-

TP20

TestPoint_Ring

TP1

TestPoint_Ring

100

9

4

1

R13

10k

U1B

TSV914IDT

4

8

C29N.M.

12

OUT8

11

U6A

TSV912IDT

C

3

TP9

TestPoint_Ring

7

F3

30Ohm@100MHz

2

C4

100nF/16V

+

-

+

-

R27390

R2368k

R42N.M.

5V10

VDD_C2.5V

R7

10k

Ref7

C20N.M.

1

IN-1

1

1

A

8

D2

STPS1L30A

6

IN-1

1

R3269.8k 0.1%

7

VDD_C2.5V

4

R12

36k 0.1%

C17

100nF/16V

VDD_C2.5V

V_line_A

8

R510k

F730Ohm@100MHz

6

+

-

Ref7

F9

30Ohm@100MHz

5

C11N.M.

VDD_5V

LEM2LTSR 15-NP

R3368k

1

R26

0

VDD_5V

VDD_5V

R5418.7k

IN-2

2

R10 0+

-

R46390

U2B

TSV912IDT

R49

10k

C22100nF/16V

5

+

-

R5210k

C231uF/25V

VDD_5V

R28 0

VDD_5V

OU

T-2

5

C27100nF/16V

4

C131uF/25V

6

2

1U3B

TSV914IDT

2

A

12

1

12

VDD_5V

OU

T-3

6

R24N.M.

OU

T-2

5

R4718.7k

U5A

TSV914IDT

2

+

-

VDD_A2.5V

VDD_5V

1

13

+

-

C2100nF/16V

R37.5k

14

VDD_A2.5V

R8

0

VDD_B2.5V

F830Ohm@100MHz

F6

30Ohm@100MHz +

-

R2918.7k

U1C

TSV914IDT

C24100nF/16V

VDD_A2.5V

TP14

TestPoint_Ring

R2

0

OU

T-1

4

TP10

TestPoint_Ring

C51uF/25V

4

C28

100nF/16V

C1N.M.

R3618.7k

+

-

+

-

2

TP18

TestPoint_Ring

3

C30N.M.

VDD_5V

C

U2A

TSV912IDT

OU

T-2

5IN

-33

VDD_B2.5V

2

+

-

C151uF/25V

R44

0

5V10

V+

V-

96

3

R217.5k

R35390

TP15

TestPoint_Ring

R377.5k

OinC_LEM8

R43

10k

R197.5k

C181uF/25V

R31

10k

R38

0R397.5k

C16100nF/16V

V_line_C_IN_LEM

Ref7

1

R1118.7k

DB

4073 - Rev 1

page 5/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 4. STDES-VIENNARECT schematic diagram - power board: AC voltage sensing

R63

R116

0

C69

C50

GND_MEAS_AC

1

GND1

U8D

JP2

R61

100nF/16V

V+

-

R112

+

R109

8

+

U8C

VOUTN

TP23

TP37

4VlineB.S

R104

U7A

21

2k

Jp_pcb

V-

V+

C63

R102

R69

6

1

3

4.7u/25V

1

TestPoint_Ring

F19

VDD_5V

11.3k 0.1%

10k

C64

+

10k

ZVD_A

C56

VINN

R113

R108

VDD_5V

2TP29

U10B

1uF/25V

1

GND_MEAS_AC10k

TP24

TP33

0

11

-

6.04k

30Ohm@100MHz

-Vo

GND1

5V_MEAS_AC

V-

VDD_5V

-

C53

3.74k 0.1%

C33

2

VDD2

GND_MEAS_AC

1

JP3

VDD1

36k 0.1%

8

4

TestPoint_Ring

100nF/16V

4

U8B

C49

C60

30Ohm@100MHz

TP32

F10

R89

R97

JP6

8

F15

2

4

7

4,3k 0.1%

11.3k 0.1%

R65

6

1uF/25V

8

R82

1M

2

5

U12B

VDD_5V

R117

13

9

U10A

ZVD_C

V+

VINP

C73 JP8

+

0

N.M.

R120

6

U16

1

14

2

10k2

TestPoint_Ring

2

1

6

TSV914IDT

U18

VDD_0.625V_B

100nF/16V

V_line_C

1

R85

TestPoint_Ring

0

1

-

+

100nF/16VC59

U10C

1

C68

1

6.04k

JP10

100nF/16V

5

8

2

100nF/16V

100nF/16V

R111

1uF/25V

13

1uF/25V

GND_MEAS_AC

F22

30Ohm@100MHz

TSV914IDT

30Ohm@100MHz

C48

TP38

GND_MEAS_AC

1

C40

C54

-

2

C75VINN

2

+

Jp_pcb

GND_MEAS_AC

14

U8A

V_line_B

11

TestPoint_Ring

1M

30Ohm@100MHz

C41

R77

10

+

C46

VOUTP

3

1

0

-

R71

2

1M

6.04k

Jp_pcb

C36

5

U11A

2

U9B

R101

TP28

TestPoint_Ring

C71

7

1

GND1

R87

7

TSV914IDT

-

C44R73

GND_MEAS_AC

R119

3

+

0

TestPoint_Ring

100nF/16V

100nF/16V

10k

TestPoint_Ring

2

5V_MEAS_AC

V-

30Ohm@100MHz

N.M.

10k

R105

1M

+

TSV912IDT

2

ZVD_B

DCH010505SN7

N.M.

1

R106

U19

69.8k 0.1%

F18

1M

3

JP9

TSV912IDT

1-

30Ohm@100MHz

1

1

11

5

2

JP4

1uF/25V

R78

VDD_5V

5

R115

+

-

TestPoint_Ring

TP34

VOUTP

R59

R74

1

2

1uF/25V

100nF/16V

C66

2

100nF/16V

VDD_5V

R107

GND_MEAS_AC

3

TP26

2

U12D

0

TP39

12

VDD1

R76

7

9

2

C42VDD1

2

4

3

AMC1301DWVR

2k

+

30Ohm@100MHz

1

12

C74

7

TP35

V-

5V_MEAS_AC

C52

-

100nF/16V4,3k 0.1%

R95

6.04k

100nF/16V

VlineA.S

GND2

AMC1301DWVR

C39

4,3k 0.1%

TestPoint_Ring

VDD_5V

F11

V-

-

+

TSV914IDT

1100nF/16V

C57

R68

-

Jp_pcb

TSV912IDT

1uF/25V

0

JP1

3.74k 0.1% Jp_pcb

GND_MEAS_AC

-

11.3k 0.1%

VDD_0.625V_C

R96

VOUTN

R91

C51

GND_MEAS_AC

F20

VINP

1

C76

N.M.

13

4

R114

R90

C62

R58

VDD2

8

+U11B

VDD_0.625V_C

C55

1

C43

C38

10k

F16

6

7

TP22

R9930,1k 0,1%

100nF/16V

JP7

VDD_0.625V_A

3.74k 0.1%

F14

U9A

R93

5

0

R83

0

F21

U17

R110

1

1uF/25V

100nF/16V

30Ohm@100MHz

+

TestPoint_Ring

6

6

C65

2

R81

7

30Ohm@100MHz

6.04k

-Vi

1M

2k

14

C31

4.7u/25V

TSV914IDT

TSV912IDT

R62

4

1uF/25V

N.M.

TP30

0

8

GND_MEAS_AC

TSV914IDT

R98

VDD_5V

R70

TSV914IDT5V_MEAS_AC

TSV912IDT

30Ohm@100MHz

TSV912IDT

3

TP36

VDD_0.625V_A

1M

C34

VDD2

2

R100

TSV914IDT

7

R84

R118

R56

R86

TestPoint_Ring

GND2

TP25

R92

+

V+

1

GND_MEAS_AC

30Ohm@100MHz

VlineC.S

2

VINN

R94

2

Jp_pcb

1uF/25V

8

R80 30,1k 0,1%

8

Jp_pcb

100nF/16V

69.8k 0.1%

F23

0

Jp_pcb

69.8k 0.1%

1

R67

V+

2

1

R55

TSV914IDT

100nF/16V

C61

N.M.

C47

-

JP5

C45

1

VOUTN

2k

-

TP31

VDD_5V

10k

TestPoint_Ring

2

4.7u/25V

2

V+

100nF/16V

1

TestPoint_Ring

9

+

GND2

Jp_pcb

1M

7

AMC1301DWVR

C72

2

C70

0

VDD_0.625V_B

R75

1

VOUTP

C58

10k -

10

100nF/16V

1

N.M.

2

GND_MEAS_AC

C37

5

VDD_5V

+U7B

3

4

2

30Ohm@100MHz

0

1

TestPoint_Ring

10k

30Ohm@100MHzF17

N.M.

VDD_5V

VDD_5V

6

U12C

6

2k

Jp_pcb

R60

R72

7

V_line_A5

VDD_5V

TestPoint_Ring

TestPoint_Ring

1uF/25V

VINP

2

100nF/16V

C35

2

TP27

6.04k

45

GND_MEAS_AC

+

U10D

1

5

+Vi

100nF/16V

N.M.

36k 0.1%

TSV914IDT

+Vo

C67

R88

R64

R103

Neutral

F12

10k

10k

-

F13

10

R57

TSV914IDT

36k 0.1%

0

30,1k 0,1%

C32

V-

R79

100nF/16V

TestPoint_Ring

U12A

TSV914IDT

2

2k

-

3

12

1M

R66

DB

4073 - Rev 1

page 6/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 5. STDES-VIENNARECT schematic diagram - power board: temp controlC77

100nF/16V

A

11

TP42

TestPoint_Ring

VOUT3

NC1

TP41

TestPoint_Ring

C78100nF/16V

8

R121470

5

R12633k

16

VDD_12V

R12422

2

C79100nF/16V

GND15D4

LED RED

J1

Con2

GND2

TP43

TestPoint_Ring

U20

STLM20W87F

VCC4

C

Q1STS6NF20V

R1235.1k

4

TEMP

VDD_5V

37

FAN

TP40

TestPoint_Ring

R12510k

22

R1225.6k

DB

4073 - Rev 1

page 7/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 6. STDES-VIENNARECT schematic diagram - power board: connectors

14

31A31A

27

11A11A

ADC_7ADP

14A14A

VlineB.SADP

25B25B

26

PWM_7ADP PWM_8ADP

31B31B

29A29A

PWM_6

VlineB.SADP

9B9B

4A4A

5

1B1B

COMP_1/ADC_11/SPI_MOSIADP30B

30B

GPIO_4/EEV_1ADP

23A23A

VDD_7VADP

4B4B

14B14B

21B21B

29A29A

GPIO_4/EEV_1

ADC_5 24A24A

22A22A

VDD_12V

PWM_INP_Q1 6B6B

33

13A13A

SMBus_SCLADP

9B9B

+5V

+3.3V_isoADP

USART_RX

+3.3VADP

OoutADP

ADC_4/DIFF_ADC_2-/OP-AMP_2-

+5VADP

12A12A

GND_isoADP

19A19A

30A30A

17B17B

11B11B

GPIO_10/DAC_4ADP

NULL_2ADP

VlineA.SADP

6A6A

20A20A

11

ADC_3/DIFF_ADC_2+/OP-AMP_2_OUTADP

PWM_9ADP

3B3B

30B30B

ADC_3/DIFF_ADC_2+/OP-AMP_2_OUT

PWM_7

29B29B

ZVD_B GPIO_5/DAC_1/COMP_4

20A20A

37

4 3

ADC_7ADP

17A17A

2122

ADC_2/DIFF_ADC_1-/OP-AMP_2+

38

15A15A

ADC_3/DIFF_ADC_2+/OP-AMP_2_OUT

11B11B

ADC_6/OP-AMP_1-

1A1A

+3.3V

1B1B

14B14B 15

13B13B

5A5A

TEMPADP

GPIO_9/EEV_3ADP

32B32B

PWM_1 SMBus_SDA

15B15B

TEMP

FAULT_1ADP

ZVD_AADP

ADC_8ADP

VlineB.SADP

PWM_4ADP

25

25A25A

+5VADP

10A10A

PWM_2

9A9A

VlineC.S

17A17A

FANADP

26A26A

GND

8A8A

17B17B

2A2A

V_bus_downADP

COMP_3ADP

GPIO_2/COMP_2_OUT/GP_PWM_2ADP

VlineA.SADP

28B28B

17

PWM_5ADP

8B8B

ADC_2/DIFF_ADC_1-/OP-AMP_2+

GPIO_4/EEV_1

22A22A

ADC_6/OP-AMP_1-24B

24B

3B3B

21B21B

28

27B27B

9

7B7B

GPIO_7/DAC_3/OP-AMP_1_OUT/SPI_MISOADP

8

OoutADP

SMBus_SMBAADP

9A9A

NULL_1

GPIO_1/COMP_3_OUT/GP_PWM_1/EEV_4FAULT_1

28A28A

24

PWM_INP_Q2ADP

FAN

ADC_10

OinA_LEM

ZVD_BADP

VlineC.SADP

18B18B

VDD_3.3VADP

PWM_1ADP

VlineA.S

ADC_5ADP

15A15A

12A12A

ZVD_BADP

ADC_3/DIFF_ADC_2+/OP-AMP_2_OUTADP

NULL_2

PWM_INP_Q1ADP

ADC_2/DIFF_ADC_1-/OP-AMP_2+ADP

PWM_1ADP

ADC_9ADP

5B5B

OinB_LEMADP

20B20B

12

ADC_6/OP-AMP_1-ADP

29

VlineC.SADP

PWM_10ADP

ADC_5ADP

ZVD_AADP

GPIO_8/EEV_2

ADC_9ADC_8

3A3A

OinB_LEMADP

32A32A

PWM_1

PWM_9

10B10B

26B26B

VDD_3.3V

PWM_8

2

36

18A18A

ADC_8ADP

PWM_5

3A3A

ADC_4/DIFF_ADC_2-/OP-AMP_2-

15B15B

ADC_9

26B26B

ADC_8

A_VDD

2B2B

+5V

V_bus_up

PWM_INP_Q2

5B5B

19B19B

PWM_INP_Q3ADP

18B18B

VDD_12VADP

SMBus_SMBA

PWM_12

+3.3V_iso

GPIO_1/COMP_3_OUT/GP_PWM_1/EEV_4ADP

OinC_LEMADP

ADC_6/OP-AMP_1-ADP

31B31B

PWM_5ADP

GND

COMP_2/ADC_12/OP-AMP_1+ADP

PWM_INP_Q2ADP

PWM_3

12B12B

PWM_4

GND_iso

GPIO_3/COMP_1_OUT/FAULT_2ADP

FANADP

16B16B

27A27A

GPIO_8/EEV_2ADP

16A16A

31A31A

7B7B

+3.3VADP

18

PWM_3ADP

PWM_11ADP

COMP_2/ADC_12/OP-AMP_1+

32A32A

PWM_10

GPIO_3/COMP_1_OUT/FAULT_2

22B22B

TEMPADP

4A4A

21A21A

1

23B23B

30

28B28B

13

8A8A

J2

Digital Power Connector

ADC_1/DIFF_ADC_1+ADP

7

OinB_LEM

10B10B

USART_RXADP

PWM_3

ADC_5

25A25A

COMP_3

GPIO_6/DAC_2/SPI_SCLKADP

VDD_7V

PWM_INP_Q3ADP

GPIO_7/DAC_3/OP-AMP_1_OUT/SPI_MISOADP

PWM_3ADPPWM_2ADP

VDD_5VADP

24B24B

SMBus_SCL

VDD_3.3VADP

VDD_12VADP

ZVD_AADP

CAN_TX

ADC_2/DIFF_ADC_1-/OP-AMP_2+ADP

NULL_2

NULL_1ADP

13B13B

7A7A

NULL_2ADP

VlineA.SADP

5A5A

PWM_6ADP

ADC_4/DIFF_ADC_2-/OP-AMP_2-ADP

27A27A

GPIO_7/DAC_3/OP-AMP_1_OUT/SPI_MISO

PWM_5

28A28A

11A11A

V_bus_upADP

1A1A

ZVD_A

6

P2

Digital Power Connector

3435

ADC_9ADPADC_10ADP

OinA_LEMADP

GPIO_5/DAC_1/COMP_4ADP

23B23B

21A21A

14A14A

30A30A

GPIO_5/DAC_1/COMP_4

ADC_1/DIFF_ADC_1+

GPIO_6/DAC_2/SPI_SCLK

29B29B

22B22B

2A2A

6A6A

19A19A

V_bus_upADP

GND

VDD_12VADP

V_bus_downADP

GPIO_2/COMP_2_OUT/GP_PWM_2

+3.3V

GPIO_2/COMP_2_OUT/GP_PWM_2

VDD_5V

USART_TXADP

ZVD_CADP

USART_TX

OinC_LEM

NULL_1

V_bus_down

ADC_7

12B12B

ZVD_C

SMBus_SDAADP

ZVD_BADP23

VDD_7VADP

VlineC.SADP

32B32B

ADC_1/DIFF_ADC_1+

13A13A

VlineB.S

GPIO_4/EEV_1ADP

A_VDDADPADC_1/DIFF_ADC_1+ADP

18A18A

ZVD_CADP

NULL_1ADP

6B6B

19B19B

19

ADC_4/DIFF_ADC_2-/OP-AMP_2-ADP

GPIO_2/COMP_2_OUT/GP_PWM_2ADP

OinC_LEMADP

31

PWM_12ADP

OoutADP

2B2B

ADC_726A

26A

PWM_11

GPIO_10/DAC_4

27B27B

OinA_LEMADP

GPIO_9/EEV_3

23A23A

4B4B

20B20B

P3

CON40A

24A24A

COMP_2/ADC_12/OP-AMP_1+ADP

20

8B8B

39

16

10

GPIO_7/DAC_3/OP-AMP_1_OUT/SPI_MISO

40

16A16A

16B16B

10A10A

COMP_2/ADC_12/OP-AMP_1+

7A7A

OinA, OinB, OinC, VlineAs, VlineBs, VlineCs,Out, Vbusup, Vbusdown, TEMP,Fun, GND,V33, V5, V12,RelayA,RelayB,Relay_C__NOOZVDA,ZVDB;ZVDC,___NOOOPWM_IMPQ1,PWM_IMPQ2,PWM_IMPQ3,VIN_A,VIN_B,VIN,C_NOOO

CONNECTOR ADAPTER 64to40pins

PWM_INP_Q1ADP

PWM_INP_Q3

Oout

32

COMP_1/ADC_11/SPI_MOSI

25B25B

GPIO_5/DAC_1/COMP_4ADP

ZVD_CADP

CAN_RX

V_bus_downADP

CAN_TXADP

VDD_5VADP

V_bus_upADP

CAN_RXADP

DB

4073 - Rev 1

page 8/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 7. STDES-VIENNARECT schematic diagram - power board: DC current sensing

+

-

Ref7

1

R13875k

F2530Ohm@100MHz

TP47

TestPoint_RingR1397.5k

U13C

TSV914IDT

TP44

TestPoint_Ring

OU

T-3

6

2

VDD_5V

1

BUS_N_OUT

C83100nF/16V

2

R131

0

C85100nF/16V

C86N.M.

C821uF/25V

R136300k

OU

T-2

5

VDD_5V

VDD_DC2.5V

R134

10k

R12910k

R137

10k

R130300k

LEM4LTSR 15-NP

C801uF/25V

R140

0O

UT-

14

TP46

TestPoint_Ring

72

12

C84N.M.

IN-1

1

TP48

TestPoint_Ring

U13A

TSV914IDT

53

BUS_N

6

+

-

R13530k

IN-2

2

+

-

U13D

TSV914IDT

R133

10k

5V10

+

-

14

4

09

10

IN-3

3

R128 N.M.

U13B

TSV914IDT

R1417.5k

V+

V-

C81100nF/16V

VDD_DC2.5V

13

1

8

OUT8 R132

75k

9

11

VDD_5V

R12710k

F2430Ohm@100MHz

Oout

TP45

TestPoint_Ring

DB

4073 - Rev 1

page 9/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 8. STDES-VIENNARECT schematic diagram - power board: DC voltage sensing

2

1

GND_MEAS_DC

R149

0

1

C90100nF/16V

GND_MEAS_DC

U22

AMC1301DWVR

3U15A

TSV912IDT

5V_MEAS_DC

R155

8.2k

1

F27

30Ohm@100MHz

F33

30Ohm@100MHz

+

-

1

2

R1421M

R161

10k

R168

1.6k

VINN3

TP52

TestPoint_Ring

VDD28

2

VDD_5V

7

C894.7u/25V

V_bus_down

F29

30Ohm@100MHz

R169

8.2k

TP51

TestPoint_RingVDD11

C99100nF/16V

8

R150

11.3k 0.1%

C871uF/25V

C101100nF/16V

C93100nF/16V

R1673.74k 0.1%

F28

30Ohm@100MHz

2

GND_MEAS_DC

1

+

-

VOUTP7

R1571M

1

2

VINP2

C91100nF/16V

+Vo7

C1061uF/25V

VOUTN6

C88100nF/16V

R1523.74k 0.1%

4

R1561M

GND25

2

R1458.2k

C974.7u/25V

+Vi1

R146

10k

F3230Ohm@100MHz

VDD_5V

8

GND_MEAS_DC

5V_MEAS_DC

VDD11

GND_MEAS_DC

2

R153

1.6k

-Vo5

R147

10k

2

GND14

BUS_P

C94N.M.

R154

10k

6

-Vi2

TP53

TestPoint_Ring

F31

30Ohm@100MHz

C96100nF/16V

F30

30Ohm@100MHz

C102N.M.

VDD_5V

4

VINN3

R1481.6k

7

R165

10k

1

U21

AMC1301DWVR

VINP2

GND25

C1001uF/25V

R1441M

+

-

U14B

TSV912IDT

CENTRO_BUS

5

+

-

2C104100nF/16V

1

2

2

C951uF/25V

3

R164

11.3k 0.1%

C98100nF/16V

F26

30Ohm@100MHz

GND14

R1431M

R1581M

V+

V-

5V_MEAS_DC

R163

0

TP49

TestPoint_Ring

BUS_N

U23

DCH010505SN7

TP54

TestPoint_Ring

GND_MEAS_DC

6

JP11

Jp_pcb

GND_MEAS_DCVOUTP

7

5

GND_MEAS_DC

R166

10k

GND_MEAS_DC

VDD_5V

1

VDD_5V

R1598.2k

C921uF/25V

U14A

TSV912IDTR151

10k

1

C1031uF/25V

C105100nF/16V

V+

V-

VOUTN6

U15B

TSV912IDT

VDD28

V_bus_up

GND_MEAS_DC

1

R160

10kR1621.6k

TP50

TestPoint_Ring

Figure 9. STDES-VIENNARECT schematic diagram - power board: input EMI filter

R179

N.M. 0.02

C1111 uF

F35

Fuse10X38

1

V_line_B_IN_LEM

2

C1164.7nF

TP59

TestPoint_Ring

2

V_AC_C

11

3

TP57

TestPoint_Ring

C1194.7nF

Earth

2

1

TP58

TestPoint_Ring

L1 3.22uH

1

R171N.M.C107

4.7nF

1

1 2

R177N.M.

V_AC_B

RT1

5Ohms 2

22

Cambiato Pin_OUT

C1144.7nF

V_line_C_IN_LEM

1

2

1

RT2

5Ohms

Neutral

2

2

1

2

4

C1184.7nF

1

C1204.7nF

L2 3.22uH

1

C1214.7nF

J3

Con3_32A 1

TP56

TestPoint_Ring

5

C1151 uF

1

6

2

LCM1

3Phase_Cm_Choke

1

CENTRO_BUS

1

R174N.M.

1

2

11

5

2

t

F36

Fuse10X38

2

C1091 uF

JP12

Con2

2

R175N.M.

4

R176N.M.

C1121 uF

3

C1131 uF

1

L3 3.22uH

1

1

2

R173N.M.

F34

Fuse10X38

R178N.M.

LCM2

3Phase_Cm_Choke

V_line_A_IN_LEM

R172N.M.

RT3

5Ohms

1

2

6

2

2

Neutral

C1084.7nF

C122

4.7nF

R170N.M.

V_AC_A

2

C1101 uF

1tt

C1174.7nF

TP55

TestPoint_Ring

2

3

2

2

DB

4073 - Rev 1

page 10/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 10. STDES-VIENNARECT schematic diagram - power board: gate drivers (x6)

-VOUT5

C133

1nF/50VR185

12

A

R1801k

2

R186

100

C

1

1

C138

2.2uF/50V

F39

30Ohm@100MHz

D5

LED RED

VDD_12V

4

IN-3

GON6

TP60

TestPoint_Ring

C140

100nF/25V

R182

1k

2

C

R198N.M.

2

VH_Q1_L

C

L11IND

1

IN+2

GNDISO8

JP25

Jp_pcb

JP21Jp_pcb TP68

TestPoint_Ring

VDD_DRIVER

1

A

R190

0

GND

VDD_DRIVER

GATE1_L

JP13

Jp_pcb

1

1

1

VIN+1

2

2

C137

2.2uF/50V

C

Q22STF1360

C129

100nF/25VPROBE2

Current_ProbE

2

D11TZMB3V3-GS08

GOFF7

A

TP62

TestPoint_Ring

GND_ISO_Q1

VH5

A

R191N.M.

TP64

TestPoint_Ring

J4Con3

D17

LED RED

C

C146470nF/50V

F38

30Ohm@100MHz

R187

0

D12TZMB20-GS08

COM6

C1241uF/25V

VL_Q1_L

C139

1nF/50V

JP23Jp_pcb

D7TZMB20-GS08

A

R196N.M.

TP67

TestPoint_Ring

2

C243

1nF

R202

1k

VL_Q1_L

1

+VOUT7

2

D15TZMB3V3-GS08

U25

STGAP2SM

1

2

C145

2.2uF/50V

3

1

TP100

TestPoint_Ring

C

2

VH_Q1_L

DC2

R12P22005D

C128

2.2uF/50V

A

2

PWM_INP_Q1

VIN-2

1

C125

100nF/16V

JP19

Jp_pcb

VDD1

R194

221

C149N.M.

C132

2.2uF/50V

JP15Jp_pcb

JP17

3JP_pcb

R20147k

2GND_ISO_Q1

C136220pF/50V

Figure 11. STDES-VIENNARECT schematic diagram - power board: power section

2

BUS_N

R253240k

D52STPSC20H12D

AA

GATE1_L

PROBE15Current_ProbE

AA

1

GATE3_L

+

L5

506uH

2

1

1 2

2

C210100nF 630V

1 1

AA

TW2

CON1

2

2

2

CC

VnC

AA

1

1

BUS_P

R257240k

C213100nF 630V

R252240k

GND_ISO_Q2

2

GATE3_R

TP98

TestPoint_Ring

PROBE7Current_ProbE

2PROBE12Current_ProbE

TW4

CON1

1

2

2

CC

CC

TP95

TestPoint_Ring

BUS_N_OUT

2

HeatSink

1

R256240k

1

L4

506uH

1C207100nF 630V

1

Q11SCTW35N65G2V

TW5

CON1

TP91

TestPoint_Ring

1

1

PROBE11

Current_ProbE

2

TP93

TestPoint_Ring

AA

BUS_N

1

1

C217100nF 630V

V_line_A

CC

CENTRO_BUS

PROBE14

Current_ProbE

C211100nF 630V

1

R255240k

Q10SCTW35N65G2V

Q8SCTW35N65G2V

1

1

Q12SCTW35N65G2V

3

PROBE9Current_ProbE

D47STPSC20H12D

L6

506uH

+

1

Q13SCTW35N65G2V

CC

C215470uF 500V

J10

Con3_32A

2

C216100nF 630V

3

C209470uF 500V

2

1

3

L_PFC

C208

470uF 500V1

D50STPSC20H12D

R254240k

PROBE8

Current_ProbE

CENTRO_BUS

VnA

D48STPSC20H12D

1

1

2

2

TP96

TestPoint_Ring

BUS_P

2

1

3 3V_line_B

1

Q9SCTW35N65G2V

2

TP92

TestPoint_Ring

2

CENTRO_BUS

1

L_PFC

GATE1_R

1

TP97

TestPoint_Ring

2

2

2

C214470uF 500V

1

+

1

+

PROBE10Current_ProbE

AA

1

VnB

3

CC

TW3

CON1

D51STPSC20H12D

2

2

GATE2_R

TW1

CON1

C2441nF 3kV

GATE2_L

2

TP94

TestPoint_Ring

D49STPSC20H12D

C212

100nF

V_line_C 3

GND_ISO_Q1

1

L_PFC

2

2

TP90

TestPoint_Ring

PROBE13Current_ProbE

1

GND_ISO_Q3

DB

4073 - Rev 1

page 11/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 12. STDES-VIENNARECT schematic diagram - power board: aux power DC/DC

1

F50

30Ohm@100MHz

2

1

A

VDD

_7V_

INT

C

A

C21810uF/50V

C

Rled21k

1

1

U31LD29080S33R

VDD_12V_EXT

D57LED RED

C

TW10

CON1

C219470nF/50V

VIN1

TW6

CON1

C

U33LD29080S33R

Rled51k

A

VDD_5V_EXT_DRIVER

VDD

_7V_

EXT

11

D56LED RED

Rled71k

C

D60LED RED

A

C225470nF/50V

R258750

F51

30Ohm@100MHz

JP56

Con2

Rled31k

11

2

1

11

VDD_5V_DRIVER

VDD

_7V

VIN1

C226470nF/50V A

VDD_12V2

J12Dev3

Rled11k G

ND

14

TW7

CON1

11

TW13

CON1

VDD_12V_INT

R260750

GN

D2

A

1

VDD

_12V

_IN

T

VDD_3.3V_DRIVER

C22710uF/50V

VDD_5V_INT_DRIVER

1

3

3

U30

LD29080DT50R

C223470nF/50V

GN

D2

1

VIN1 VOUT

3

TW8

CON1

2

JP59

3JP_pcb

VDD

_12V

_EXT

VDD_3.3V

D59LED RED

VOUT3

Rled41k

VOUT3

C

VDD_5V_INT_DRIVER

VDD_5V_DRIVER

2

C

GN

D2

JP57

Con2A

VOUT3

TW9

CON1

D66LED RED

F52

30Ohm@100MHz

22

1

C22110uF/50V

1

VDD_5V

GN

D2

A

C

D67LED RED

A

1

VDD_5V

C228470nF/50V

GN

D1

4

C22210uF/50V

U32

LD29080DT50R

D54LED RED

1

TW11

CON1

VIN1

F49

30Ohm@100MHzVDD_7V_EXT

Rled61k

A

C

D55LED RED

TW12

CON1

VDD_7V_INT

VDD_5V_DRIVER

1

VDD_12V

VDD

_12V

JP55

Con2

VDD_3.3V_DRIVER

TW14

CON1

J11Dev3

1

22

JP58

3JP_pcb

2VDD_7V

C22910uF/50V

C

D53LED RED

22

VDD_5V_EXT_DRIVER

D58LED RED

C22410uF/50V

R259750

C220470nF/50V

TW15

CON1

VDD_DRIVER

DB

4073 - Rev 1

page 12/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Figure 13. STDES-VIENNARECT schematic diagram - power board: aux power VIPER

R26727k/0.1%

C234

TBD

A

11N

.C.3

C237

TBD

CENTRO_BUS

1

R26310/0.1%

C23610uF/50V

BUS_N

T1

TRANSFORMER FLAT COMPACT

D62

STTH1L06A

A

13D

RAI

N1

10N

.C.2

8

+

R266110k/0.1%

C231560uF 16V

C23515UF 450V

14D

RAI

N2

C230

3,3nF/200VL7TBD

C

9

BUS_N

2G

ND

2

VDD_7V_INT

R26151k/0.1%

2

10

1

C

3

+

A

BUS_N

CC

D61

STPS2H100A

D64

STPS2L60A

D63

STPS1150A

7

3x.

C.

9N

.C.1

BUS_N

+

C

C233

TBD

C242

220pF/100V

+

AA

C

26

4x.

A.

1

VDD_12V_INT

2

2

C239

15uF/35V

R26510.2k/0.1%

BUS_N1

+

6LI

M

+C238

680uF/10V

5VD

D

C232

TBD

C240

N.M.

C241

100nF/50V

8C

OM

P

4

JP60

Jp_pcb

12N

.C.4

D65STPS1150A

7 FB

1G

ND

1

JP61

Jp_pcb

U34

VIPER26HD

BUS_N

21

15D

RAI

N3

16D

RAI

N4

A

R26427k/0.1%

5R26251k/0.1%

DB

4073 - Rev 1

page 13/15

STDES-VIEN

NA

REC

TSchem

atic diagrams

Revision history

Table 1. Document revision history

Date Version Changes

05-Dec-2019 1 Initial release.

STDES-VIENNARECT

DB4073 - Rev 1 page 14/15

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to STproducts and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. STproducts are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design ofPurchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or servicenames are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

© 2019 STMicroelectronics – All rights reserved

STDES-VIENNARECT

DB4073 - Rev 1 page 15/15