dale & lewis chapter 5 computing components. let’s design a computer generic cpu with...
TRANSCRIPT
![Page 1: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/1.jpg)
Dale & Lewis Chapter 5Computing components
![Page 2: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/2.jpg)
Let’s design a computer• Generic CPU with registers
− Program counter (PC) – 5 bits (size of addresses)− Instruction register (IR) – 8 bits (op code + address)− Memory Address Register (MAR) – 5 bits Main Memory− Memory Data Register (MDR) – 8 bits (byte addressable)− Accumulator (A or Acc) – 8 bits
![Page 3: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/3.jpg)
Instructions
• Instruction format: 3-bit op code, 5-bit address• Instructions and their op codes
op code Instruction
000 HALT (HLT)
001 LOAD (LDA)
010 STORE (STA)
011 ADD (ADD)
100 SUBTRACT (SUB)
101 BRANCH (BR)
110 BRANCH ON ZERO (BRZ)
111 BRANCH ON POSITIVE (BRP)
![Page 4: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/4.jpg)
Types of instructions
• Data movement− Move data between memory and CPU− Move data between different memory locations− Input, output
• Arithmetic and logic operations− Integer arithmetic− Comparing two quantities− Shifting or rotating bits in a quantity− Testing, comparing and converting bits
• Program control− Starting a program− Halting a program− Skipping to another location− Testing data to decide whether to skip to another instruction
![Page 5: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/5.jpg)
Instructions• LOAD instruction (LDA)
− PC MAR− MDR IR− IR [address] MAR− MDR A− PC + 1 PC
• ADD instruction (ADD)− PC MAR− MDR IR− IR [address] MAR− A + MDR A− PC + 1 PC
• STORE instruction (STA)− PC MAR− MDR IR− A MDR− IR [address] MAR− PC + 1 PC
• HALT instruction (HLT)− PC MAR− MDR IR− stop
FETCH – DECODE – GET DATA – EXECUTE
![Page 6: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/6.jpg)
FETCH
• Address of next instruction is transferred from PC to MAR and the instruction is located in the memory
![Page 7: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/7.jpg)
FETCH
• Instruction is copied from memory to the MDR
![Page 8: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/8.jpg)
DECODE
• Decode the instruction
![Page 9: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/9.jpg)
EXECUTE
• Execute the instruction – control unit sends signals to appropriate devices to carry out execution of the instruction
![Page 10: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/10.jpg)
A small computer program
LOAD A 00100 00101000
ADD B 00101 01101001
STORE C 00110 01001010
HLT 00111 00000000
A DATA +5 01000 00000101
B DATA -3 01001 11111101
C DATA 01010
Program
Assembly language
Main memory
Address Contents
op code
Data
![Page 11: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/11.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
PC
IR
Acc
MAR
MDR
CPU
![Page 12: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/12.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00100
PC
IR
Acc
MAR
MDR
CPU
The program starts
![Page 13: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/13.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00100
00100
00101000
PC
IR
Acc
MAR
MDR
CPU
Fetch 1st instruction
![Page 14: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/14.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00100
00101000 00100
00101000
PC
IR
Acc
MAR
MDR
CPU
Decode 1st instruction: LOAD A
![Page 15: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/15.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00100
00101000
00000101
01000
00000101
PC
IR
Acc
MAR
MDR
CPU
Execute1st instruction: LOAD A
![Page 16: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/16.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00101
00101000
00000101
01000
00000101
PC
IR
Acc
MAR
MDR
CPU
Advance PC
![Page 17: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/17.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00101
00101000
00000101
00101
01101001
PC
IR
Acc
MAR
MDR
CPU
Fetch 2nd instruction
![Page 18: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/18.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00101
01101001
00000101
00101
01101001
PC
IR
Acc
MAR
MDR
CPU
Decode 2nd instruction: ADD B
![Page 19: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/19.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00101
01101001
100000010
01001
11111101
PC
IR
Acc
MAR
MDR
CPU
Execute 2nd instruction: ADD B
![Page 20: Dale & Lewis Chapter 5 Computing components. Let’s design a computer Generic CPU with registers −Program counter (PC) – 5 bits (size of addresses) −Instruction](https://reader030.vdocuments.mx/reader030/viewer/2022032705/56649d825503460f94a6771e/html5/thumbnails/20.jpg)
00000
00001
00010
00011
00100 00101000
00101 01101001
00110 01001010
00111 00000000
01000 00000101
01001 11111101
01010
01011
01100
01101
etc…
Address Contents
00110
01101001
00000010
01001
11111101
PC
IR
Acc
MAR
MDR
CPU
Advance PC, etc…