d9b19 compal jbl00 la-3801p - dell e6400 laptop schematics

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet o fLA-3801P 0.8

Cover Sheet

1 66Thursday, June 12, 2008

Compal Electronics, Inc.

BOM P/N : PCB NO :

COMPAL CONFIDENTIALMODEL NAME : JBL00

M09 Roush UMAuFCPGA Mobile PenrynIntel Cantiga GM + ICH9M

REV : 1.0(A00)

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

LA-3801P ( DA800009P1L)43152331L01

2@ : Use Express card only1@ : Use PCMCIA card only @ : Nopop Component

3@ : Use ATG only4@ : Use China TPM only5@ : Use BROADCOM TPM only

2008-06-12

6@ : All TPM Disabled for CCC - Depop D70, Pop R4837@ : Non- ATG only

Part Number DescriptionDA800009P0L PCB 03I LA-3801P REV0 M/B UMA

MB PCB

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title


Date: Sheet o fLA-3801P 0.8Block Diagram



Clock Generator

DMI

Compal confidentialModel : JBL00

CK505+3.3V_M

CPU ITP Port+FAN1_VOUT GUARDIAN III

EMC4002

Thermal

+3.3V_SUS

FAN+1.05V_VCCP


page 18page 18 page6page 7uFCPGA CPU

INTEL

H_A#(3..35) H_D#(0..63)

Pentium-M

System BusFSB 800/1066 MHz

1329pin BGA

Cantiga+1.8V_MEM

+VCC_CORE+1.05V_VCCP

+1.5V_RUN

+1.05V_VCCP

478pin

Penryn -4MB (Socket P)

+3.3V_RUN

+VCC_GFXCORE

page 7,8,9

page 10,11,12,13,14,15

Block Diagram

page 38

page 39Touch Pad

SMSC KBC

+3.3V_ALW+RTC_CELL

MEC5035

VCORE (IMVP-6)

CHARGER

1.8V/1.25V/0.9Vpage 52

page 47

page 48 page 431.5V/1.05V

BATT IN3V/5V

page 45

page 43page 44

page 40

RJ11

Stick

Power On/OffSW & LED

Power Sequencepage 41

page 42

page 33Biometric

+3.3V_RUN

USBH

PCI BUS +3VRUN 33MHz

On IO/B

Vedio SwitchTS3DV520ERHUR

page 20

DP SwitchTS2DP512DPB

RGB +3.3V_RUN

+1.05V_M

Mini Card 1

+3.3V_RUNWLAN

PCI Express BUS

MDC

Azalia I/F

+1.5V_RUN +1.5V_RUN+3.3V_RUNWPAN/BT/Robson

page 34 page 34WWAN

+3.3V_RUN/ +1.5V_RUN 100MHz

IEEE1394

HeadPhone &MIC Jack

+RTC_CELL

+1.5V_RUN

+3.3V_ALW_ICH+3.3V_RUN

+1.05V_VCCP page 22,23,24,25

676pin BGAICH9-M

INTEL

page 34+1.5V_RUN

page 42

Mini Card3

page 26+3V_SUS

+3.3V_RUN

On IO/B

page 26+5V_HDD

S-HDD

USB[4] USB[5]USB[6]

+3.3V_RUN

RJ45

+3V_RUN/ +1.5V_RUN 100MHzGLCI/LCI

+1.5V_RUN 100MHz

S-ATA 0/1/4/5

CardBus

page 31,32

+3.3V_WLAN

Mini Card2

+3.3V_RUN

IDSEL:AD17(PIRQD#,GNT#1,REQ#1)

R5C847

USB[7]

LPC BUS+3V_RUN33MHz

+1.2V_RUN page 36

BCM5880

USB[10]

USH

+3.3V_RUN+2.5V_RUNSmart Cardpage 36

RFIDpage 36

+5V_MOD

E-Module

page 26

BC BUSTrough Cable

page 19Dig. MIC

Trough LVDS Cable

AMP & INT.Speaker

page 28+5V_RUN

+3.3V_ALW

ECE5028page 37

DOCK LPC BUS

+5V_RUN_DP page 21DPB

page 20+5V_RUNCRT CONN

SVID

TPM1.2

For ChinaTPM1.2

DAI+3.3V_RUN page 27 DOCK

page 21+5V_RUNDP CONN

SSM2602

page 27

92HD71BAzalia Codec

+3.3V_RUN+VDDA

48MHz USB0 : Right side pair top

USB2 : Left side pair top

USB Ports X2+5V_ALW

USB[0,1] R SIDEpage 26

+0.9V_DDR_VTT

Trough LVDS Cable

+5V_ALW page 33USB Ports X2USB[2,3] L SIDE

+5V_RUNCamera

USB[11]page 19

Memory BUS(DDR2) +1.8V_MEM 533 / 667MHz BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8

DDRII-DIMM X2

+1.8V_MEMpage 16,17

USB1 : Right side pair bottom

USB3 Rear Right pair bottom

BC BUS

+3.3V_ALW pg 30

LAN SWITCHPI3L500-AZFEX

82567LMIntel Boaz

page 29+1.8V_LAN_M+1V_LAN_M+3.3V_ALW

On IO/B

page 26

+1.5V_RUN

DPB

Trough Cable

PCIE3 PCIE2 PCIE1

73S8009CNpage 36+3.3V_RUN+5V_RUN

DC IN DC/DC Interface

Int.KBD &Stick

page 39

ECE1077+3.3V_ALW

SMBUS

SATA1 SATA0

E-SATASATA4

SLG8LP554

SNIFFER

RGBSVID

DPC

LVDS CONN+PWR_SRC

page 19+5V_ALW+3.3V_RUNLVDS

RGB

DOCKINGPORT

page 35SD/MMC

page 31CONN+3.3V_RUN

Option

SPI

page 24+3.3V_MW25X32VSSIG

32M 4K sector

Trough Cable

SMSC SIO

page 26

page 39

SATA5USB[8,9]

DOCK LPC BUS

DAI

SSX35BCB

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title



Index and Config.



PM TABLE



MINI CARD-2 WLAN

MINI CARD-3 BT/UWB

PCI EXPRESS

Lane 1

DESTINATION

Lane 2

Lane 3

Lane 4

MINI CARD-1 WWAN

POWER STATES

S0 (Full ON) / M0

SLP S3#

SLPS5#

HIGH

SignalState

SLPS4#

HIGH HIGH HIGH

S4STATE#

ALWAYSPLANE

ON

MPLANE

ON

SUSPLANE

RUNPLANE

CLOCKS

ON ON ON

S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH ON ON ON ONOFF

S4 (Suspend to DISK) / M1 ON ON ON ONOFF

SLPM#

HIGH

HIGH

LOW HIGH HIGH HIGHLOW

S5 (SOFT OFF) / M1 ON ON ON ONOFFLOW HIGH LOW HIGHLOW

S3 (Suspend to RAM) / M-OFF

S5 (SOFT OFF) / M-OFF

LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF

LOW LOW LOW LOW ON OFF OFF OFF OFF

LOW LOW LOW LOW LOW ON OFF OFF OFF OFF

S4 (Suspend to DISK) / M-OFF HIGH

Lane 5

Lane 6

None

10/100/1G LAN

+3.3V_M +3.3V_M

(M-OFF)

ON

ON

ON

ON

OFF

OFF

OFFOFF

+1.05V_VCCP

+3.3V_SUS+5V_ALW

+5V_RUN+3.3V_RUN

+3.3V_ALW_ICH+1.8V_MEM

+0.9V_DDR_VTT+1.5V_RUN

+VCC_GFXCORE

S0

S3

S5 S4/AC don't exist

+VCC_CORE

ON

powerplane

S5 S4/AC

State

OFFON

ON

ON

ON ON

OFF

OFF

OFF

OFFOFF

+15V_ALW

+3.3V_RTC_LDO

+1.05V_M +1.05V_M

EXPRESS CARD

JESA1 (Ext Left Side Bottom)

JESA1 (Ext Left Side Top)

WLAN

WPAN

WWAN

DOCKING8

9

USH->BIO10

Card Bus/Express card

11

JUSB1 (Ext Right Side Top)

2

3

1

4

USB PORT#

0

DESTINATION

6

5

7

DOCKING

Camera

JUSB1 (Ext Right Side Bottom)

ICH9-M

PIRQ[B..D]

PIRQPCI DEVICE IDSEL

PCI TABLE

REQ#/GNT#

R5C847 REQ#1 / GNT#1AD17

+1.8V_RUN

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet o fLA-3801P 0.8Power Rail



+5V_ALW

BATTERY+PWR_SRC

ADAPTER

+VDDA

MAX9789A

FDS4435 +INV_PWR_SRCRUN_ON

SI3456BDVSI3456BDV

H

D

D

C

_

E

N



+5V_MOD

M

O

D

C

_

E

N

CHARGER

R

U

N

_

O

N

ALW_ON

+3.3V_ALWALWON

ISL6236

+15V_ALW+5V_ALW

ALWON

STS11NF30L

E

N

A

B

_

3

V

L

A

N

+3.3V_LAN

+3.3V_SUS

RUN_ON

+1V_LAN_M +1.8V_LAN_M

R

E

G

C

T

L

_

P

N

P

1

SI4336DY

3

.

3

V

_

R

U

N

_

O

N

+3.3V_RUN

+5V_HDD

Q16

(Q29)(Q32) (U22)

(PU2)

(Q44)

BCP69 BCP69(Q45)(Q46)

(Q61)

R

E

G

C

T

L

_

P

N

P

1

8

ADP3209 +VGFX_COREP

+5V_RUNSTS11NF30L(Q55)

GFX_CORE_ON

+VCC_CORE

ISL6260

(PU7)

+1.8V_MEM +0.9V_DDR_VTTD

D

R

_

O

N

0

.

9

V

_

D

D

R

_

V

T

T

_

O

N

ISL88550(PU16)

M

_

O

N

+1.05V_M +1.5V_RUN

1

.

5

V

_

R

U

N

_

O

N

(PU3)ISL6236

3

.

3

V

_

S

U

S

_

O

N

STS11NF30L

(Q60)

ISL6236

(PU2)

On IO/B

(PU15)

I

M

V

P

_

V

R

_

O

N

EMC4002LDO Out

+1.8V_RUN

(U3)

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet o fLA-3801P 0.8SMBUS TOPOLOGY



MEC 5035

ICH9-M

ICH_SMBDATA

ICH_SMBCLK

KBC

A13G16

+3.3V_ALW2.2K

2.2K

2N7002MEM_SCLK

MEM_SDATA 195 DIMMA

SMBUS Address [TBD]

197

2N7002

+3.3V_M2.2K

2.2K

DIMMB

SMBUS Address [TBD]

195197

C17B18

+3.3V_ALW_ICH10K

10KAMT_SMBCLK

AMT_SMBDAT

9493

2A 2A

+3.3V_ALW

56

SMBUS Address [TBD]DOCK_SMB_CLK

DOCK_SMB_DAT DOCKING

6

51A

1A

(JLVDS)78

56

SMBUS Address [TBD]

+3.3V_ALWLCD_SMBCLK

LCD_SMDATAINVERTER1B

1B

1C1C

111112

+3.3V_ALW2.2K

2.2K

100 ohm100 ohm BATTERYCONN

34 SMBUS Address [TBD]

PBAT_SMBCLKPBAT_SMBDAT

1D1D

1E1E

10099

1F1F

961G1H 95

1061051J1J

1031021K1K

Dedicated JTAG

Dedicated JTAG

12

13

+3.3V_M2.2K2.2K

+3.3V_ALW2.2K2.2K

CLK_SDATA

2N7002

2N7002

DAISMBUS Address [TBD]

2.2K

2.2K +3.3V_RUN

USH

SMBUS Address [TBD]

1H

1HCLK_SCLK 16

17CKG_SMBDAT

CKG_SMBCLK CLK GEN SMBUS Address [TBD]2N7002

2N7002

SMBUS Address [TBD]Charger10

9

3032 WLAN2N7002

2N7002

WLAN_SMBCLK

WLAN_SMBDATA

+3.3V_WLAN

SMBUS Address [TBD]

2N7002

2N7002

WWANSMBUS Address [TBD]

2.2K

30

2.2K

32

BT/UWB SMBUS Address [TBD]

+3.3V_RUN2.2K2.2KMINI_SMBCLK

MINI_SMBDATA

78 Express card

EXP_SMBCLK

EXP_SMBDATA

+3.3V_SUS

SMBUS Address [TBD]

2.2K2.2K

2N7002

2N7002

3032

9897

CARD_SMBCLK

CARD_SMBDAT

109

+3.3V_ALW2.2K

2.2K

2.2K

2.2K

2.2K

2.2K

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+CK_VDD_MAIN

+CK_VDD_A

+CK_VDD_REF

+CK_VDD_48

+CK_VDD_REF+CK_VDD_48

CLK_XTAL_IN

CLK_ICH_14M

CLK_SIO_14MCLKREF

CLK_PWRGD

CLK_SCLK

CLK_SDATA

PCI_ICHCLK_PCI_ICH

CLK_PCI_5035 PCI_EC

CLK_ICH_48M FSA

CPU_MCH_BSEL1

FSC

CPU_MCH_BSEL0

CPU_MCH_BSEL2

CLK_XTAL_OUTCLK_CPU_ITP

CLK_CPU_ITP#

CPU_ITP

CPU_ITP#

CLK_MCH_BCLK#

CLK_CPU_BCLK#

CLK_CPU_BCLK

CPU_BCLK#

CPU_BCLK

MCH_BCLK#

MCH_BCLK CLK_MCH_BCLK

PCIE_MINI1

PCIE_MINI1#

CLK_PCIE_MINI1

CLK_PCIE_MINI1#

MINI1CLK_REQ#

CLK_PCIE_MINI2

CLK_PCIE_MINI2#

PCIE_MINI2

MINI2CLK_REQ#

PCIE_MINI2#

PCIE_ICH

CLK_PCIE_ICH#

CLK_PCIE_ICH

PCIE_ICH#

CLK_PCIE_SATA#

PCIE_SATA CLK_PCIE_SATA

PCIE_SATA#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#MCH_3GPLL#

MCH_3GPLL

CLK_3GPLLREQ#

H_STP_PCI#

H_STP_CPU#

CLK_3GPLLREQ#_R

MINI1CLK_REQ#

MINI2CLK_REQ#

CLK_3GPLLREQ#

SATA_CLKREQ#

PCI_ICH

PCI_DOCKING

FSA

PCI_SIOCLK_PCI_5028

SATA_CLKREQ#_R

PCI_SIO

MINI3CLK_REQ#

CLK_PCIE_MINI3#PCIE_MINI3#

CLK_PCIE_MINI3PCIE_MINI3

MINI3CLK_REQ#

DOT96#

DOT96

MCH_DREFCLK#

MCH_DREFCLK

DOT96_SSC

DOT96_SSC#

EXPCLK_REQ#

PCIE_EXP#

CLK_PCIE_EXPPCIE_EXP

CLK_PCIE_EXP#

EXPCLK_REQ#

PCI_DOCKINGCLK_PCI_DOCK

CLK_PCI_PCM

CLK_SDATA

CLK_SCLK

CLK_PCI_TPM_CHAPCI_TPMCLK_PCI_TPM

FSB

+CK_VDD_MAIN2

+CK_VDD_MAIN+3.3V_M

+3.3V_RUN

+3.3V_M

+3.3V_M

+3.3V_M

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

CLK_ICH_14M

CLK_SIO_14M

CLK_PCI_ICH

CLK_PWRGD

CLK_PCI_5035

CLK_ICH_48M

CPU_MCH_BSEL1

CPU_MCH_BSEL2

CPU_MCH_BSEL0

CLK_MCH_BCLK#

CLK_MCH_BCLK

CLK_CPU_BCLK#

CLK_CPU_BCLK

CLK_CPU_ITP

CLK_CPU_ITP#

H_STP_CPU#

H_STP_PCI#

CLK_PCIE_MINI1

CLK_PCIE_MINI1#

MINI1CLK_REQ#

CLK_PCIE_MINI2

CLK_PCIE_MINI2#

MINI2CLK_REQ#

CLK_PCIE_ICH#

CLK_PCIE_ICH

CLK_PCIE_SATA

CLK_PCIE_SATA#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

CLK_3GPLLREQ#

CKG_SMBDAT

CKG_SMBCLK

CLK_PCI_5028

MINI3CLK_REQ#

CLK_PCIE_MINI3#

CLK_PCIE_MINI3

SATA_CLKREQ#

MCH_DREFCLK

MCH_DREFCLK#

DREF_SSCLK

DREF_SSCLK#

CLK_PCIE_EXP#

EXPCLK_REQ#

CLK_PCIE_EXP

CLK_PCI_PCM

CLK_PCI_DOCKCLK_PCI_TPM_CHA

CLK_PCI_TPM

Title


Date: Sheet o fLA-3801P 0.8Clock Generator



Place crystal within500 mils of CK505

*

*

ITP_EN0

PIN 37Pin 5/6 as SRC_10

*

0=UMA1=Disc. GRFX down

FCTSEL1 PIN43 PIN44 PIN47 PIN48

0=UMA

1=DIS

DOT96T DOT96C 96/100M_T 96/100M_C

27M_out 27M SSout SRCT0 SRCC0

TME01

PIN 32



*

CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU

MHzSRCMHz

PCIMHz

266133200166333100400

100100100100100100100

33.333.333.333.333.333.333.3

0 0 000

00

0

000

0

111 1

111 1

1

overclocking enabledoverclocling disabled

1 Pin 5/6 as CPU_ITP

C5

0.1U_0402_16V4Z~D

1

2

R27 33_0402_5%~D12

C15

0.047U_0402_16V4Z~D

1

2

R14 0_0603_5%~D1 2 R13 33_0402_5%~D

1 2

R43

10K_0402_5%~D1

2

C3

0.1U_0402_16V4Z~D

1

2

R17 0_0402_5%~D1 2

R15 33_0402_5%~D1 2

R21 33_0402_5%~D@1 2

C11

4.7U_0603_6.3V

4Z~D

@1

2

C1

0.1U_0402_16V4Z~D

1

2

R47 33_0402_5%~D1 2

C12

0.047U_0402_16V4Z~D

1

2

R35 22_0402_5%~D1 2

R50

10K_0402_5%~D

@

1

2

R22 2.2K_0402_5%~D1 2

R6 10K_0402_5%~D1 2

R38 33_0402_5%~D1 2

C4

0.1U_0402_16V4Z~D

1

2

R30 22_0402_5%~D12

R30_0402_5%~D@

1 2

R24 10K_0402_5%~D1 2

R12 0_0603_5%~D1 2

SLG8LP554VTR

U1

SLG8LP554VTR_QFN72_10X10~D

VDD_SRC1VDD_SRC49

VDD_SRC65

VDD_PCI30VDD_PCI36

VDD_4840

VDD_CPU12

VDD_REF18

USB_48MHz/FSLA41

FSL_B/TEST_MODE45

XTAL_OUT19

XTAL_IN20

VSS_PCI31

PCICLK2/TME32

REF_0/FSL_C/TEST_SEL23

SMBDAT17

SMBCLK16

PCICLK_F0/ITP_EN37

NC9

CPU_STP# 24

CPU_1 11

CPU_1# 10

CPU_ITP/SRC_10 6

PCICLK333

PCICLK4/FCT_SEL34

CPU_0# 13

CPU_0 14

PCI_STP# 25

VSS_A 8

VDD_A 7

VSS_PCI35

CPU_ITP#/SRC_10# 5

VSS_REF21

VSS_CPU15

VSS_SRC4

VSS_4842

VSS_SRC68

DOT_96/27M43

DOT_96#/27M_SS44

CKPWRGD/PD#39

REF_122SRC_7 66

SRC_7# 67

SRC_8 70

SRC_8# 69

SRC_9 3

SRC_9# 2

SRC_1#/SATA# 51

LCD_CLK/SRC_0 47

SRC_2 52

SRC_4 58

SRC_1/SATA 50

CLKREQ_4# 57

SRC_2# 53

SRC_5# 61

SRC_4# 59

SRC_5 60

LCD_CLK#/SRC_0# 48

SRC_3# 56

SRC_3 55

SRC_6 63

SRC_6# 64

CLKREQ_6# 62

CLKREQ_8# 71

CLKREQ_9# 72

CLKREQ_1# 46

CLKREQ_5# 29

CLKREQ_3# 28

CLKREQ_2# 26

CLKREQ_7# 38

VDD_SRC54

PCICLK127

THRM_PAD73

R1044 0_0402_5%~D1 2

R356 10K_0402_5%~D1 2

R16 33_0402_5%~D1 2

C6

0.1U_0402_16V4Z~D

1

2

R90_0402_5%~D@

1 2

R29 22_0402_5%~D5@ 12

R523 33_0402_5%~D1 2

R5510K_0402_5%~D@

1

2

C13

0.047U_0402_16V7K~D

1

2

C9

0.1U_0402_16V4Z~D

1

2

R31 33_0402_5%~D1 2

R45 33_0402_5%~D1 2

R23 33_0402_5%~D1 2

R37 33_0402_5%~D1 2

R670 33_0402_5%~D1 2

R53 475_0402_1%~D1 2

R32 33_0402_5%~D12

Q1B2N7002DW-7-F_SOT363-6~D

3

5

4

R52 33_0402_5%~D1 2

R34 33_0402_5%~D1 2

R408 33_0402_5%~D1 2

R2

2.2K_0402_5%

~D

1

2

R854 22_0402_5%~D4@1 2R51

10K_0402_5%~D@

1

2

R415 33_0402_5%~D1 2

C14

4.7U_0603_6.3V

4Z~D

1

2

C1633P_0402_50V8J~D

12

R33 22_0402_5%~D1 2

L1BK2125HS601-T 0805~D

1 2

R40 33_0402_5%~D1 2

R48 475_0402_1%~D1 2

C1733P_0402_50V8J~D

12

R49 33_0402_5%~D1 2

Q1A2N7002DW-7-F_SOT363-6~D

6 1

2

R8 10K_0402_5%~D1 2

R1

2.2K_0402_5%

~D

1

2

C2

10U_0805_10V4Z~D

1

2

R851

0_0805_5%~D

1

2

R41 33_0402_5%~D12

R4 10K_0402_5%~D1 2

R36 33_0402_5%~D1 2

R19 33_0402_5%~D12

R11 33_0402_5%~D1 2

R54

10K_0402_5%~D

1

2

R46

10K_0402_5%~D1

2

R39 33_0402_5%~D1 2

C10

0.1U_0402_16V4Z~D

1

2

L2BLM21PG600SN1D_0805~D

@1 2

R7 10K_0402_5%~D1 2

R18 33_0402_5%~D@1 2

R28 33_0402_5%~D1 2

C7

0.1U_0402_16V4Z~D

1

2

X114.31818MHz_20P_1BX14318CC1A~D

5.2

1

2

R10 2.2_0603_5%~D1 2

R25 33_0402_5%~D1 2

R5 10K_0402_5%~D1 2

C8

10U_0805_10V4Z~D

@1

2

R26 33_0402_5%~D12

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_THERMTRIP#

H_A#35

H_NMI

H_BR0#

ITP_BPM#3

H_A#9

H_A#27

H_A#24H_A#23

H_A#18

H_A#11

ITP_TRST#

H_IGNNE#

H_DRDY#H_A#7

H_A#16

H_A#14

H_RESET#

H_FERR#

H_A#8

H_A#4

ITP_TMS

H_INTR

H_A20M#

H_A#15

ITP_TDI

H_SMI#

ITP_BPM#4

H_DBSY#

H_ADSTB#1

H_ADSTB#0

H_A#29

H_A#26

H_A#20

H_TRDY#H_REQ#3

ITP_DBRESET#

H_A#10

H_RS#0

ITP_BPM#0

H_A#25 ITP_TCK

H_A#32

H_REQ#2

ITP_BPM#5

ITP_BPM#1

H_A#3

H_A#28

H_A#33

H_REQ#4

H_DEFER#

H_BPRI#

ITP_BPM#2

H_A#30

ITP_TDO

H_A#6

H_A#21

H_RS#2H_RS#1

H_REQ#0

H_HIT#

H_A#12

H_INIT#

H_ADS#

H_A#31

H_A#22

H_A#17

H_A#34

H_IERR#

H_BNR#H_A#5

H_A#19

H_STPCLK#

H_REQ#1

CLK_CPU_BCLK#CLK_CPU_BCLK

H_LOCK#

H_HITM#

H_A#13

H_THERMDA

H_THERMDC

EC_CPU_PROCHOT#

H_THERMTRIP#

ITP_BPM#5

ITP_TDO

ITP_TMS

ITP_TCK

ITP_DBRESET#

ITP_TRST#

H_RESET#

ITP_TDI

ITP_BPM#3R

ITP_BPM#5R

ITP_TCK_R

ITP_TCK_R

ITP_TRST#RITP_TMS_RITP_TDI_R

H_RESET#R

ITP_DBRESET#R

CLK_CPU_ITPCLK_CPU_ITP#

ITP_BPM#0R

ITP_BPM#1R

ITP_BPM#2R

ITP_BPM#4R

ITP_TDO_R

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP +3.3V_ALW_ICH

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

H_BNR#

H_IGNNE#

H_DEFER#

H_SMI#H_NMI

H_BPRI#

H_STPCLK#

H_ADS#

H_INTR

H_REQ#2H_REQ#3

H_REQ#0

H_ADSTB#0

H_A#[3..35]

H_REQ#4

H_REQ#1

H_A20M#

H_ADSTB#1

H_FERR#

H_THERMTRIP#

CLK_CPU_BCLK#

H_INIT#

H_TRDY# H_RS#2 H_RS#1

H_DBSY#

H_LOCK#

H_HITM#

H_RS#0

H_DRDY#

H_RESET#

ITP_DBRESET#

CLK_CPU_BCLK

H_BR0#

H_HIT#

H_THERMDA

H_THERMDC

CLK_CPU_ITPCLK_CPU_ITP#

Title


Date: Sheet o fLA-3801P 0.8Penryn Processor(1/2)


Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY


H_THERMDA, H_THERMDC routing together,Trace width / Spacing = 10 / 10 mil

Place near JITP

Place close to JITP within 200ps = 1000 mil

Place close to CPU within 200 milThis shall place near CPU

Place close to CPU within 200ps = 1000 mil

R1105 0_0402_5%~D1 2

R65 150_0402_5%~D1 2

C18100P_0402_50V8K~D@

1

2

JCPU1D

TYCO_1-1674770-2_Penryn~D

VSS[082] P6

VSS[148] AE11

VSS[002]A8VSS[003]A11VSS[004]A14VSS[005]A16VSS[006]A19VSS[007]A23VSS[008]AF2VSS[009]B6VSS[010]B8VSS[011]B11VSS[012]B13VSS[013]B16VSS[014]B19VSS[015]B21VSS[016]B24VSS[017]C5VSS[018]C8VSS[019]C11VSS[020]C14VSS[021]C16VSS[022]C19VSS[023]C2VSS[024]C22VSS[025]C25VSS[026]D1VSS[027]D4VSS[028]D8VSS[029]D11VSS[030]D13VSS[031]D16VSS[032]D19VSS[033]D23VSS[034]D26VSS[035]E3VSS[036]E6VSS[037]E8VSS[038]E11VSS[039]E14VSS[040]E16VSS[041]E19VSS[042]E21VSS[043]E24VSS[044]F5VSS[045]F8VSS[046]F11VSS[047]F13VSS[048]F16VSS[049]F19VSS[050]F2VSS[051]F22VSS[052]F25VSS[053]G4VSS[054]G1VSS[055]G23VSS[056]G26VSS[057]H3VSS[058]H6VSS[059]H21VSS[060]H24VSS[061]J2VSS[062]J5VSS[063]J22VSS[064]J25VSS[065]K1VSS[066]K4VSS[067]K23VSS[068]K26VSS[069]L3VSS[070]L6VSS[071]L21VSS[072]L24VSS[073]M2VSS[074]M5VSS[075]M22VSS[076]M25VSS[077]N1VSS[078]N4VSS[079]N23VSS[080]N26VSS[081]P3 VSS[162] A25

VSS[161] AF21VSS[160] AF19VSS[159] AF16VSS[158] AF13VSS[157] AF11VSS[156] AF8VSS[155] AF6VSS[154] A2VSS[153] AE26VSS[152] AE23VSS[151] AE19

VSS[083] P21VSS[084] P24VSS[085] R2VSS[086] R5VSS[087] R22VSS[088] R25VSS[089] T1VSS[090] T4VSS[091] T23VSS[092] T26VSS[093] U3VSS[094] U6VSS[095] U21VSS[096] U24VSS[097] V2VSS[098] V5VSS[099] V22VSS[100] V25VSS[101] W1VSS[102] W4VSS[103] W23VSS[104] W26VSS[105] Y3

VSS[107] Y21VSS[108] Y24VSS[109] AA2VSS[110] AA5VSS[111] AA8VSS[112] AA11VSS[113] AA14VSS[114] AA16VSS[115] AA19VSS[116] AA22VSS[117] AA25VSS[118] AB1VSS[119] AB4VSS[120] AB8VSS[121] AB11VSS[122] AB13VSS[123] AB16VSS[124] AB19VSS[125] AB23VSS[126] AB26VSS[127] AC3VSS[128] AC6VSS[129] AC8VSS[130] AC11VSS[131] AC14VSS[132] AC16VSS[133] AC19VSS[134] AC21VSS[135] AC24VSS[136] AD2VSS[137] AD5VSS[138] AD8VSS[139] AD11VSS[140] AD13VSS[141] AD16VSS[142] AD19VSS[143] AD22VSS[144] AD25VSS[145] AE1VSS[146] AE4

VSS[106] Y6

VSS[001]A4

VSS[149] AE14VSS[150] AE16

VSS[147] AE8

VSS[163] AF25

R780 0_0402_5%~D@ 1 2

R60 150_0402_5%~D1 2

R62 56_0402_5%~D1 2

R57 124_0402_1%~D1 2

R782 0_0402_5%~D@ 1 2

R785 0_0402_5%~D@ 1 2

R63 51_0402_1%~D@

R5956_0402_5%~D

1

2

R781 0_0402_5%~D@ 1 2R5656_0402_5%~D

12

R784 0_0402_5%~D@ 1 2

C20

0.1U_0402_16V4Z~D

1

2

R783 0_0402_5%~D@ 1 2

R66 649_0402_1%~D1 2

C19

0.1U_0402_16V4Z~D

1

2

R1106 0_0402_5%~D1 2

R1113 0_0402_5%~D@ 1 2

R912 51_0402_5%~D@1 2

R67 27_0402_5%1 2

ADDR GRO

UP_0ADDR G

ROUP_1

C

O

N

T

R

O

L

X

D

P

/

I

T

P

S

I

G

N

A

L

S

H CLK

THERMAL

R

E

S

E

R

V

E

D

ICH

JCPU1A


A[10]#N3A[11]#P5A[12]#P2A[13]#L2A[14]#P4A[15]#P1A[16]#R1

A[17]#Y2A[18]#U5A[19]#R3A[20]#W6A[21]#U4A[22]#Y5A[23]#U1A[24]#R4A[25]#T5A[26]#T3A[27]#W2A[28]#W5A[29]#Y4

A[3]#J4

A[30]#U2A[31]#V4

RSVD[01]M4RSVD[02]N5RSVD[03]T2RSVD[04]V3RSVD[05]B2RSVD[06]D2RSVD[07]D22

A[4]#L5A[5]#L4A[6]#K5A[7]#M3A[8]#N2A[9]#J1

A20M#A6

ADS# H1

ADSTB[0]#M1

ADSTB[1]#V1

RSVD[08]D3

BCLK[0] A22BCLK[1] A21

BNR# E2

BPM[0]# AD4BPM[1]# AD3BPM[2]# AD1BPM[3]# AC4

BPRI# G5

BR0# F1

DBR# C20

DBSY# E1

DEFER# H5DRDY# F21

FERR#A5

HIT# G6HITM# E4

IERR# D20

IGNNE#C4

INIT# B3

LINT0C6LINT1B4

LOCK# H4

PRDY# AC2PREQ# AC1

PROCHOT# D21

REQ[0]#K3REQ[1]#H2REQ[2]#K2REQ[3]#J3REQ[4]#L1

RESET# C1RS[0]# F3RS[1]# F4RS[2]# G3

SMI#A3

STPCLK#D5

TCK AC5TDI AA6

TDO AB3

THERMTRIP# C7

THERMDA A24THERMDC B25

TMS AB5

TRDY# G2

TRST# AB6

A[32]#W3A[33]#AA4A[34]#AB2A[35]#AA3

RSVD[09]F6

JITP1

MOLEX_52435-2891_28P~D

TDI1TMS2TRST#3NC14TCK5NC26TDO7BCLKN8BCLKP9GND010FBO11RESET#12BPM5#13

BPM4#15

BPM3#17

BPM2#19

BPM1#21

BPM0#23DBA#24DBR#25VTAP26VTT027VTT128

GND114

GND216

GND318

GND420

GND522

G

N

D

6

2

9

G

N

D

7

3

0

R1109 0_0402_5%~D@ 1 2

R1111 0_0402_5%~D@ 1 2

R1108 0_0402_5%~D1 2

R61 56_0402_5%~D1 2

R1104 0_0402_5%~D1 2

R64 39_0402_5%~D1 2

R1103 0_0402_5%~D@ 1 2

R1112 0_0402_5%~D@ 1 2R1107 0_0402_5%~D1 2

R58 22.6_0402_1%~D1 2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VID4

VID1

VSSSENSE

VID3

VID0

VID2

VID6

VCCSENSE

VID5

TEST3TEST5

H_D#56

H_D#52

H_D#36

H_D#24

H_DINV#0

H_D#3

H_DPRSTP#

H_D#48

H_DINV#2

H_D#35

H_DINV#1

H_D#14

H_DPSLP#

H_DSTBN#3

H_D#53

H_D#49

H_DSTBP#2

H_DSTBP#1

H_D#12

H_D#2

H_DSTBN#1

H_DSTBN#0

H_D#13

H_D#10

H_D#62

H_D#60

H_D#46

H_D#11

H_PSI#

H_D#20

H_D#4

H_D#57

H_D#50

H_D#27

H_D#19

H_D#7

H_D#45

H_D#40

H_D#26

H_D#23

H_D#17H_D#16

H_CPUSLP#

H_D#54H_D#22H_D#21

H_PWRGOOD

H_D#29

H_D#18

H_D#6H_D#5

H_D#39

H_D#25

H_D#8

H_DINV#3

H_D#63

H_D#59

H_D#37

H_D#34

H_D#47

H_D#38

H_D#33

H_D#15

H_DPWR#

H_D#58

H_D#51

H_D#32

H_D#30

H_DSTBP#0

H_D#0

H_D#43H_D#42

H_D#28

H_DSTBP#3

H_D#61

H_DSTBN#2

H_D#41

H_D#55

H_D#44

H_D#9

H_D#1

H_D#31

TEST2TEST3

TEST5

CPU_MCH_BSEL2

CPU_MCH_BSEL1

CPU_MCH_BSEL0

TEST6

TEST1

TEST4

TEST7

COMP0

COMP2COMP3

COMP1

VSSSENSE

TEST2TEST1

VCCSENSE

+VCC_CORE +VCC_CORE

+1.05V_VCCP

+1.5V_RUN

+V_CPU_GTLREF

+VCC_CORE

+1.05V_VCCP

+V_CPU_GTLREF

H_D#[0..63]

VCCSENSE

VSSSENSE

VID0 VID1 VID2 VID3 VID4 VID5 VID6

H_DSTBP#1H_DSTBN#1

H_DINV#0

H_DSTBN#0

H_DINV#1

H_DSTBP#0

H_CPUSLP# H_PSI#

H_DINV#3 H_DSTBP#3

H_PWRGOOD

H_DPRSTP#

H_DINV#2 H_DSTBP#2

H_DPWR# H_DPSLP#

H_DSTBN#2

H_DSTBN#3

CPU_MCH_BSEL1

CPU_MCH_BSEL2

CPU_MCH_BSEL0

Title


Date: Sheet o fLA-3801P 0.8Penryn Processor(2/2)



Length match within 25 mils, Z0=27.4 ohm



FSB

533

For the purpose of testability, route these signalsthrough a ground referenced Z0 = 55ohm trace thatends in a via that is near a GND via and isaccessible through an oscilloscope connection.

BCLK BSEL2 BSEL1 BSEL0

667

800

133

166

200

0 0 1

110

1 00

CRB was 270uF

Resistor placed within 0.5" ofCPU pin.Trace should be at least25 mils away from any othertoggling signal. COMP0, COMP2trace should be 27.4 ohm.COMP1, COMP3 should be 55ohm. Place R75 and R76 near CPU

Route VCCSENSE and VSSSENSE trace at27.4 ohms, 7 mils spacing and R75 & R76 keep to pad max 1 inch

Layout close CPU PIN AD2655 ohm, 0.5 inch (max)

1067 266 0 0 0

Reserve for testingonly

VCCSENSE=18 mils

R75 100_0402_1%~D1 2

T3PAD~D@

C23

10U_0805_10V4Z~D

1

2

+ C21

220U_D

2_4VY

_R15M

~D

1

2

R70

54.9_0402_1%~D

1

2

T1PAD~D@

R1042 0_0402_5%~D1 2

T4PAD~D@

R1041 0_0402_5%~D1 2

R73

1K_0402_5%~D

@

1

2

R1043 0_0402_5%~D1 2

DATA G

RP 0

DATA G

RP 1

D

A

T

A

G

R

P

2

D

A

T

A

G

R

P

3

MISC

JCPU1B


COMP[0] R26COMP[1] U26COMP[2] AA1COMP[3] Y1

D[0]#E22D[1]#F24

D[10]#J24D[11]#J23D[12]#H22D[13]#F26D[14]#K22D[15]#H23

D[16]#N22D[17]#K25D[18]#P26D[19]#R23

D[2]#E26

D[20]#L23D[21]#M24D[22]#L22D[23]#M23D[24]#P25D[25]#P23D[26]#P22D[27]#T24D[28]#R24D[29]#L25

D[3]#G22

D[30]#T25D[31]#N25

D[32]# Y22D[33]# AB24D[34]# V24D[35]# V26D[36]# V23D[37]# T22D[38]# U25D[39]# U23

D[4]#F23

D[40]# Y25D[41]# W22D[42]# Y23D[43]# W24D[44]# W25D[45]# AA23D[46]# AA24D[47]# AB25

D[48]# AE24D[49]# AD24

D[5]#G25

D[50]# AA21D[51]# AB22D[52]# AB21D[53]# AC26D[54]# AD20D[55]# AE22D[56]# AF23D[57]# AC25D[58]# AE21D[59]# AD21

D[6]#E25

D[60]# AC22D[61]# AD23D[62]# AF22D[63]# AC23

D[7]#E23D[8]#K24D[9]#G24

TEST5AF1

DINV[0]#H25

DINV[1]#N24

DINV[2]# U22

DINV[3]# AC20

DPRSTP# E5DPSLP# B5DPWR# D24

DSTBN[0]#J26

DSTBN[1]#L26

DSTBN[2]# Y26

DSTBN[3]# AE25

DSTBP[0]#H26

DSTBP[1]#M26

DSTBP[2]# AA26

DSTBP[3]# AF24

GTLREFAD26

PSI# AE6

PWRGOOD D6SLP# D7

TEST3C24

BSEL[0]B22BSEL[1]B23BSEL[2]C21

TEST2D25

TEST4AF26

TEST6A26

TEST1C23

TEST7C3

R72

1K_0402_5%~D

@

1

2

T138PAD~D@

R782K_0402_1%~D

1

2

C22

0.01U_0402_16V7K~D

1

2

JCPU1C


VCC[001]A7VCC[002]A9VCC[003]A10VCC[004]A12VCC[005]A13VCC[006]A15VCC[007]A17VCC[008]A18VCC[009]A20VCC[010]B7VCC[011]B9VCC[012]B10VCC[013]B12VCC[014]B14VCC[015]B15VCC[016]B17VCC[017]B18VCC[018]B20VCC[019]C9VCC[020]C10VCC[021]C12VCC[022]C13VCC[023]C15VCC[024]C17VCC[025]C18VCC[026]D9VCC[027]D10VCC[028]D12VCC[029]D14VCC[030]D15VCC[031]D17VCC[032]D18VCC[033]E7VCC[034]E9VCC[035]E10VCC[036]E12VCC[037]E13VCC[038]E15VCC[039]E17VCC[040]E18VCC[041]E20VCC[042]F7VCC[043]F9VCC[044]F10VCC[045]F12VCC[046]F14VCC[047]F15VCC[048]F17VCC[049]F18VCC[050]F20VCC[051]AA7VCC[052]AA9VCC[053]AA10VCC[054]AA12VCC[055]AA13VCC[056]AA15VCC[057]AA17VCC[058]AA18VCC[059]AA20VCC[060]AB9VCC[061]AC10VCC[062]AB10VCC[063]AB12VCC[064]AB14VCC[065]AB15VCC[066]AB17VCC[067]AB18

VCC[068] AB20VCC[069] AB7VCC[070] AC7VCC[071] AC9VCC[072] AC12VCC[073] AC13VCC[074] AC15VCC[075] AC17VCC[076] AC18VCC[077] AD7VCC[078] AD9VCC[079] AD10VCC[080] AD12VCC[081] AD14VCC[082] AD15VCC[083] AD17VCC[084] AD18VCC[085] AE9VCC[086] AE10VCC[087] AE12VCC[088] AE13VCC[089] AE15VCC[090] AE17VCC[091] AE18VCC[092] AE20VCC[093] AF9VCC[094] AF10VCC[095] AF12VCC[096] AF14VCC[097] AF15VCC[098] AF17VCC[099] AF18VCC[100] AF20

VCCA[01] B26

VCCP[03] J6VCCP[04] K6VCCP[05] M6VCCP[06] J21VCCP[07] K21VCCP[08] M21VCCP[09] N21VCCP[10] N6VCCP[11] R21VCCP[12] R6VCCP[13] T21VCCP[14] T6VCCP[15] V21VCCP[16] W21

VCCSENSE AF7

VID[0] AD6VID[1] AF5VID[2] AE5VID[3] AF4VID[4] AE3VID[5] AF3VID[6] AE2

VSSSENSE AE7

VCCA[02] C26

VCCP[01] G21VCCP[02] V6

R771K_0402_1%~D

1

2

R76 100_0402_1%~D1 2

R71

27.4_0402_1%~D

1

2

R69

27.4_0402_1%~D

1

2

R833 27.4_0402_1%~D@1 2

T2PAD~D@

R68

54.9_0402_1%~D

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+1.05V_VCCP

Title



CPU Bypass



ESR 1320uF



10uF 0805 X6S -> 85 degree C

High Frequence Decoupling

Place these insidesocket cavity on L8(North sideSecondary)

Place these insidesocket cavity on L8(Sorth sideSecondary)

Place these insidesocket cavity on L8(North sidePrimary)

Place these insidesocket cavity on L8(Sorth sidePrimary)

North Side Secondary

Near VCORE regulator.

South Side Secondary

Place these insidesocket cavity on L8(North sideSecondary)

C630.1U_0402_10V7K~D

1

2

C4010U_0805_4VAM~D

1

2

C4410U_0805_4VAM~D

1

2

C3210U_0805_4VAM~D

1

2

C4910U_0805_4VAM~D

1

2

+ C59

270U_X_2VM

_R4.5M

~D

@

1

2

+ C60

270U_X_2VM

_R4.5M

~D

@

1

2

C4710U_0805_4VAM~D

1

2

C2610U_0805_4VAM~D

1

2

C4210U_0805_4VAM~D

1

2

C5110U_0805_4VAM~D

1

2

C3810U_0805_4VAM~D

1

2

C5310U_0805_4VAM~D

1

2

+ C58

270U_X_2VM

_R4.5M

~D

1

2

C3410U_0805_4VAM~D

1

2

C3610U_0805_4VAM~D

1

2

C4810U_0805_4VAM~D

1

2

C3910U_0805_4VAM~D

1

2

C2810U_0805_4VAM~D

1

2

C670.1U_0402_10V7K~D

1

2

C4510U_0805_4VAM~D

1

2

C3110U_0805_4VAM~D

1

2

C5410U_0805_4VAM~D

1

2

C4310U_0805_4VAM~D

1

2

C2410U_0805_4VAM~D

1

2

C2510U_0805_4VAM~D

1

2

C2710U_0805_4VAM~D

1

2

C640.1U_0402_10V7K~D

1

2

C5010U_0805_4VAM~D

1

2

C3010U_0805_4VAM~D

1

2

C620.1U_0402_10V7K~D

1

2

C4610U_0805_4VAM~D

1

2

C5510U_0805_4VAM~D

1

2

C3710U_0805_4VAM~D

1

2

C2910U_0805_4VAM~D

1

2

+ C57

270U_X_2VM

_R4.5M

~D

1

2

+ C61

270U_X_2VM

_R4.5M

~D

@

1

2

+ C56

270U_X_2VM

_R4.5M

~D

1

2

C4110U_0805_4VAM~D

1

2

C3310U_0805_4VAM~D

1

2

C650.1U_0402_10V7K~D

1

2

C5210U_0805_4VAM~D

1

2

C660.1U_0402_10V7K~D

1

2

C3510U_0805_4VAM~D

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_DSTBP#1

H_DINV#1

H_A#30

H_A#8

H_D#57

H_D#53

H_D#40

H_D#35

H_D#17

H_A#17

H_A#3

H_D#56

H_D#51

H_D#43

H_D#16H_D#15

H_A#32

H_A#16

H_A#7

H_D#58

H_D#54

H_A#27

H_A#19

H_D#24

H_D#2

H_SWNG

H_A#21

H_RESET#

H_D#61

H_D#10

H_D#8

H_DSTBP#3

H_A#25

H_A#5

H_D#55

H_D#41

H_D#20H_D#19

H_D#5

H_DINV#2

H_A#33

H_A#12

H_A#10H_A#9

H_D#60

H_D#47

H_D#1

+H_VREF

H_DSTBN#2

H_A#18

H_A#11

H_A#6

H_D#63

H_D#48

H_D#36

H_D#32

H_D#13

H_RS#2

H_RS#0

H_D#59

H_D#49

H_D#39

H_D#34

H_D#23

H_D#9

H_D#0

H_REQ#3

H_DSTBP#2

H_A#34

H_A#4

H_SWNG

H_D#46

H_D#27

H_D#18

H_D#12

H_DSTBN#0

H_A#20

H_A#14

H_D#30

H_D#25

H_DINV#3

H_A#29

H_A#22

H_A#15

H_D#38

H_D#33

H_D#31

H_D#26

H_REQ#2

H_D#21

H_D#14

H_D#4

H_DSTBN#3

H_DINV#0

H_A#35

H_A#28

H_CPUSLP#

+H_RCOMP

H_D#52

H_D#37

H_D#3

H_RS#1

H_DSTBP#0

H_DSTBN#1

H_A#26

H_A#24H_A#23

H_D#62

H_D#22

H_D#7H_D#6

H_REQ#1

H_A#31

H_D#50

H_D#28

H_REQ#4

H_REQ#0

H_A#13

H_D#45H_D#44

H_D#42

H_D#29

H_D#11

DMI_MRX_ITX_N1

SMRCOMP

DMI_MTX_IRX_P2

CL_DATA0

CFG10

CFG19

M_ODT1

SMRCOMP_VOH

CFG12

M_CLK_DDR2

DDR_CS0_DIMMA#

DMI_MRX_ITX_P1

CL_RST0#+CL_VREF

CFG16

DDR_CKE2_DIMMB

CLK_3GPLLREQ#

CFG7

DMI_MRX_ITX_N2

M_CLK_DDR1

DMI_MTX_IRX_P0

PM_SYNC#

ICH_PWRGD

DDR_CKE1_DIMMA

MCH_ICH_SYNC#

M_CLK_DDR3

DDR_CKE0_DIMMA

DMI_MRX_ITX_P0

DMI_MRX_ITX_P3

DDR_CS1_DIMMA#

CL_CLK0PM_EXTTS#

DMI_MRX_ITX_N0

DMI_MTX_IRX_N1

CFG3

H_DPRSTP#

DDR_CKE3_DIMMB

DDR_CS2_DIMMB#

PLTRST1#_R

DMI_MRX_ITX_P2

DMI_MTX_IRX_P3

CFG20

M_ODT3

DMI_MTX_IRX_N3CFG8

THERMTRIP_MCH#

DMI_MTX_IRX_N2

ICH_CL_PWROK

SMRCOMP_VOL

DMI_MRX_ITX_N3

CFG5

M_CLK_DDR#3

SMRCOMP_VOL

CLK_MCH_3GPLL#

DMI_MTX_IRX_P1

DPRSLPVR

M_CLK_DDR#2

DDR_CS3_DIMMB#

CFG6

M_CLK_DDR0

M_CLK_DDR#0

M_ODT2

SMRCOMP_VOH

DMI_MTX_IRX_N0

CFG9

M_CLK_DDR#1

M_ODT0

CLK_MCH_3GPLL

THERMTRIP_MCH#

MCH_TSATN#

TP_MCH_RSVD15

TP_MCH_RSVD20

TP_MCH_RSVD24

PLTRST1#_R

+H_VREF

H_ADSTB#1

H_HIT#

H_BNR#

CLK_MCH_BCLK#

H_BPRI#

H_DPWR#

H_ADS#

CLK_MCH_BCLK

H_ADSTB#0

H_LOCK#

H_DBSY#

H_BR0#

H_HITM#

H_DRDY#

H_DEFER#

H_TRDY#

SMRCOMP#

+V_DDR_MCH_REFSM_PWROK

MCH_TSATN#

DDPC_CTRLDATADDPC_CTRLCLK

SMRCOMP#

SMRCOMP

SDVO_CTRLDATASDVO_CTRLCLK

MCH_DREFCLKMCH_DREFCLK#DREF_SSCLKDREF_SSCLK#

GMCH_HDA_BITCLK_RGMCH_HDA_RST_R#GMCH_HDA_SDIN2_RGMCH_HDA_SDOUT_RGMCH_HDA_SYNC_R

GFX_VID0GFX_VID1

GFX_VID3GFX_VID4

GFX_VID2

GFX_VR_ON

GFX_VR_ON

ME_JTAG_TDIME_JTAG_TCK

ME_JTAG_TDOME_JTAG_TMS

SDVO_CTRLDATA

SDVO_CTRLCLK

DDPC_CTRLCLK

DDPC_CTRLDATA

SM_PWROK

TP_MCH_RSVD2TP_MCH_RSVD3

TP_MCH_RSVD6TP_MCH_RSVD7TP_MCH_RSVD8

TP_MCH_RSVD25

PM_EXTTS#

GMCH_HDA_BITCLKICH_AZ_MCH_BITCLKICH_AZ_MCH_RST#ICH_AZ_MCH_SDOUTICH_AZ_MCH_SYNC

GMCH_HDA_RST#

ICH_AZ_MCH_SDIN2

GMCH_HDA_SDOUTGMCH_HDA_SYNCGMCH_HDA_SDIN2

CFG4

CFG14CFG15

CFG17CFG18

CFG13

CFG11

TP_MCH_RSVD14

Q153_GATEU67_OD_DELAY

Q153_GATE

+1.05V_VCCP

+1.05V_VCCP

+1.8V_MEM

+3.3V_RUN

+1.05V_M

+1.05V_VCCP

+1.05V_VCCP

+3.3V_RUN

+V_DDR_MCH_REF

+1.8V_MEM

+3.3V_RUN

+3.3V_RUN

+1.5V_RUN

+1.05V_VCCP

+3.3V_RUN

+3.3V_ALW

+3.3V_RUN_D

+15V_ALW

+3.3V_RUN_D

+3.3V_ALW +3.3V_RUN_D

+3.3V_ALW2

H_A#[3..35]

H_DINV#1 H_DINV#0

H_DINV#2 H_DINV#3

H_D#[0..63]

H_RS#1 H_RS#2

H_RS#0

H_DSTBP#1 H_DSTBP#0

H_DSTBP#3 H_DSTBP#2

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_DSTBN#0

H_DSTBN#2 H_DSTBN#1

H_DSTBN#3

H_RESET#H_CPUSLP#

DMI_MTX_IRX_P3

DMI_MTX_IRX_P0 CFG9

CFG20

M_ODT0

CFG19

DMI_MRX_ITX_P0

PM_SYNC#

ICH_CL_PWROK

DMI_MRX_ITX_N3

DDR_CKE2_DIMMB

DPRSLPVR

ICH_PWRGD

DMI_MTX_IRX_N0

DMI_MTX_IRX_P2

M_ODT1

H_DPRSTP#

M_ODT2

DMI_MRX_ITX_P1

THERMTRIP_MCH#

M_CLK_DDR0

DMI_MRX_ITX_N1

CL_DATA0

DDR_CKE3_DIMMB

CLK_3GPLLREQ#

CLK_MCH_3GPLL

DMI_MTX_IRX_N1

M_CLK_DDR2

DMI_MTX_IRX_P1

MCH_ICH_SYNC#

CL_CLK0

M_CLK_DDR#3

DMI_MRX_ITX_P3

M_CLK_DDR3

M_CLK_DDR1

M_CLK_DDR#0

DMI_MRX_ITX_N2

M_ODT3

M_CLK_DDR#2

DMI_MTX_IRX_N2

CFG16

DDR_CKE0_DIMMA

DDR_CS0_DIMMA#DDR_CS1_DIMMA#

DMI_MRX_ITX_P2

M_CLK_DDR#1

CFG5

CLK_MCH_3GPLL#

DDR_CS2_DIMMB#

CL_RST0#

DMI_MRX_ITX_N0

DMI_MTX_IRX_N3

DDR_CKE1_DIMMA

DDR_CS3_DIMMB#

CPU_MCH_BSEL0 CPU_MCH_BSEL1 CPU_MCH_BSEL2

CFG6 CFG7

PLTRST1#

MCH_TSATN_EC

H_ADSTB#1 H_ADSTB#0

H_TRDY#

H_HIT#

H_LOCK#

H_DEFER#

H_BPRI# H_BR0#

H_DPWR# H_DRDY#

H_DBSY#

CLK_MCH_BCLK# CLK_MCH_BCLK

H_BNR#

H_ADS#

H_HITM#

SDVO_CTRLDATASDVO_CTRLCLK

DREF_SSCLKDREF_SSCLK#

MCH_DREFCLKMCH_DREFCLK#

GFX_VID3GFX_VID4

GFX_VID2GFX_VID1GFX_VID0

GFX_VR_ON

DDPC_CTRLDATADDPC_CTRLCLK

PM_EXTTS#

ICH_AZ_MCH_BITCLKICH_AZ_MCH_RST#ICH_AZ_MCH_SDOUTICH_AZ_MCH_SYNCICH_AZ_MCH_SDIN2

ICH_PWRGD

Title



Cantiga(1 of 6)


Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.


HD support 1.5V

When pop R314, then R42,R44, R685, R686, R687should be no stuff

Notes referpage 12

Place close to U2.N28,M28,G36,E36

Use for DDR3 signls,if support DDR2 needconnect to GND

Reserve 100ohmand Test pointfor ME JTAGdebug

T18 PAD~D@

R686 33_0402_5%~D 1 2

U67

FXL2SD106BQX_DQFN16_2P5X3P5~D

VCCA 1

CMD_B14CLK_IN 2CMD_A 3

A0 4A1 5

B013B112B211B310

A2 6

GND9 OE 8A3 7

CLK_OUT15VCCB16

R8910K_0402_5%~D

12

R804 100_0402_5%~D@ 1 2

C76

2.2U_0603_6.3V

6K~D

1

2

R181 2.2K_0402_5%~D12

T155PAD~D@

R806 100_0402_5%~D@ 1 2

R1120

100K_0402_5%

~D

1

2

R94

2K_0402_1%

~D

1

2

T14 PAD~D@

R157100K_0402_5%~D

1

2

R83

1K_0402_1%

~D

1

2

T6 PAD~D@

R687 33_0402_5%~D 1 2

R901K_0402_1%~D

1

2

T156PAD~D@

R807 100_0402_5%~D@ 1 2

H

O

S

T

U2A

CANTIGA ES_FCBGA1329~D

H_A#_10 P16H_A#_11 R16H_A#_12 N17H_A#_13 M13H_A#_14 E17H_A#_15 P17H_A#_16 F17H_A#_17 G20H_A#_18 B19H_A#_19 J16H_A#_20 E20H_A#_21 H16H_A#_22 J20H_A#_23 L17H_A#_24 A17H_A#_25 B17H_A#_26 L16H_A#_27 C21H_A#_28 J17H_A#_29 H20

H_A#_3 A14

H_A#_30 B18H_A#_31 K17

H_A#_4 C15H_A#_5 F16H_A#_6 H13H_A#_7 C18H_A#_8 M16H_A#_9 J13

H_ADS# H12H_ADSTB#_0 B16H_ADSTB#_1 G17

H_BNR# A9H_BPRI# F11

H_BREQ# G12

HPLL_CLK# AH6

H_CPURST#C12

HPLL_CLK AH7

H_D#_0F2

H_REQ#_2 F13H_REQ#_3 B13

H_D#_1G8

H_D#_10M9

H_D#_20L6

H_D#_30N10

H_D#_40AA8

H_D#_50AA2

H_D#_60AE11

H_D#_8D4H_D#_9H3

H_DBSY# B10

H_D#_11M11H_D#_12J1H_D#_13J2H_D#_14N12H_D#_15J6H_D#_16P2H_D#_17L2H_D#_18R2H_D#_19N9

H_D#_2F8

H_D#_21M5H_D#_22J3H_D#_23N2H_D#_24R1H_D#_25N5H_D#_26N6H_D#_27P13H_D#_28N8H_D#_29L7

H_D#_3E6

H_D#_31M3H_D#_32Y3H_D#_33AD14H_D#_34Y6H_D#_35Y10H_D#_36Y12H_D#_37Y14H_D#_38Y7H_D#_39W2

H_D#_4G2

H_D#_41Y9H_D#_42AA13H_D#_43AA9H_D#_44AA11H_D#_45AD11H_D#_46AD10H_D#_47AD13H_D#_48AE12H_D#_49AE9

H_D#_5H6

H_D#_51AD8H_D#_52AA3H_D#_53AD3H_D#_54AD7H_D#_55AE14H_D#_56AF3H_D#_57AC1H_D#_58AE3H_D#_59AC3

H_D#_6H2

H_D#_61AE8H_D#_62AG2H_D#_63AD6

H_D#_7F6

H_DEFER# E9

H_DINV#_0 J8H_DINV#_1 L3H_DINV#_2 Y13H_DINV#_3 Y1

H_DPWR# J11H_DRDY# F9

H_DSTBN#_0 L10H_DSTBN#_1 M7H_DSTBN#_2 AA5H_DSTBN#_3 AE6

H_DSTBP#_0 L9H_DSTBP#_1 M8H_DSTBP#_2 AA6H_DSTBP#_3 AE5

H_AVREFA11H_DVREFB11

H_TRDY# C9

H_HIT# H9H_HITM# E12

H_LOCK# H11

H_REQ#_0 B15H_REQ#_1 K13

H_REQ#_4 B14

H_A#_32 B20H_A#_33 F21H_A#_34 K21H_A#_35 L20

H_SWINGC5

H_CPUSLP#E11

H_RCOMPE3

H_RS#_0 B6H_RS#_1 F12H_RS#_2 C8

G

D S

Q155NTR4003NT1G_SOT23-3

@

2

1 3R44 33_0402_5%~D 1 2

R180 2.2K_0402_5%~D12

R183 2.2K_0402_5%~D12

R1030_0402_5%~D

12

T152PAD~D@

R1123

8.2K_0402_5%

~D

1

2

C72

2.2U_0603_6.3V

6K~D

1

2

C1049

100P_0402_50V

8J~D

1

2

T23 PAD~D@

Q154A

2N7002D

W-7-F_S

OT363-6~D

6

1

2

T17 PAD~D@

R1121

470K_0402_5%

~D

@12

R97

1K_0402_1%

~D

1

2

R81499_0402_1%~D

1 2

R15630K_0402_5%~D

1

2

S

G

D

Q153SI3456BDV-T1-E3_TSOP6~D

3

6

245

1

C74

0.1U_0402_16V

7K~D

1

2

T151PAD~D@

R104330_0402_5%~D

1 2

R42 33_0402_5%~D 1 2

R91221_0402_1%~D

1

2

R98

1K_0402_5%

~D

1

2

PM

M

I

S

C

NC

D

D

R

C

L

K

/

C

O

N

T

R

O

L

/

C

O

M

P

E

N

S

A

T

I

O

N

C

L

K

D

M

I

CFG

RSVD

G

R

A

P

H

I

C

S

V

I

D

M

E

H

D

A

U2B


SA_CK_0AP24SA_CK_1AT21SB_CK_0AV24

SA_CK#_0AR24SA_CK#_1AR21SB_CK#_0AU24

SA_CKE_0BC28SA_CKE_1AY28SB_CKE_0AY36SB_CKE_1BB36

SA_CS#_0BA17SA_CS#_1AY16SB_CS#_0AV16SB_CS#_1AR13

SM_DRAMRST#BC36

SA_ODT_0BD17SA_ODT_1AY17SB_ODT_0BF15SB_ODT_1AY13

SM_RCOMPBG22SM_RCOMP#BH21

CFG_18 P29CFG_19 R28

CFG_2 P25

CFG_0 T25CFG_1 R25

CFG_20 T28

CFG_3 P20CFG_4 P24CFG_5 C25CFG_6 N24CFG_7 M24CFG_8 E21CFG_9 C23

CFG_10 C24CFG_11 N21CFG_12 P21CFG_13 T21CFG_14 R20CFG_15 M20CFG_16 L21CFG_17 H21

PM_SYNC# R29

PM_EXT_TS#_0 N33PM_EXT_TS#_1 P32

PWROK AT40RSTIN# AT11

DPLL_REF_CLKB38DPLL_REF_CLK#A38DPLL_REF_SSCLKE41DPLL_REF_SSCLK#F41

DMI_RXN_0AE41DMI_RXN_1AE37DMI_RXN_2AE47DMI_RXN_3AH39

DMI_RXP_0AE40DMI_RXP_1AE38DMI_RXP_2AE48DMI_RXP_3AH40

DMI_TXN_0AE35DMI_TXN_1AE43DMI_TXN_2AE46DMI_TXN_3AH42

DMI_TXP_0AD35DMI_TXP_1AE44DMI_TXP_2AF46DMI_TXP_3AH43

RSVD10 AL34

RSVD12 AN35RSVD11 AK34

RSVD13 AM35

RSVD22 BG23RSVD23 BF23RSVD24 BH18RSVD25 BF18

PM_DPRSTP# B7

SB_CK_1AU20

SB_CK#_1AV20

RSVD20 AY21

RSVD5 AH9RSVD6 AH10RSVD7 AH12RSVD8 AH13

RSVD1 M36RSVD2 N36RSVD3 R33RSVD4 T33

GFX_VID_0B33GFX_VID_1B32GFX_VID_2G33GFX_VID_3F33

GFX_VR_ENC34

SM_RCOMP_VOHBF28SM_RCOMP_VOLBH28

THERMTRIP# T20DPRSLPVR R32

RSVD9 K12

CL_CLKAH37CL_DATAAH36CL_PWROKAN36CL_RST#AJ35CL_VREFAH34

NC_26 A47

NC_1 BG48NC_2 BF48NC_3 BD48NC_4 BC48NC_5 BH47NC_6 BG47NC_7 BE47NC_8 BH46NC_9 BF46

NC_10 BG45NC_11 BH44NC_12 BH43NC_13 BH6NC_14 BH5NC_15 BG4

SDVO_CTRLCLKG36SDVO_CTRLDATAE36CLKREQ#K36

RSVD14 T24

ICH_SYNC#H36

TSATN#B12

PEG_CLK#E43PEG_CLKF43

NC_16 BH3

GFX_VID_4E33

RSVD15 B31

DDPC_CTRLCLKN28

NC_17 BF3NC_18 BH2NC_19 BG2NC_20 BE2NC_21 BG1NC_22 BF1NC_23 BD1NC_24 BC1NC_25 F1

SM_VREFAV42SM_PWROKAR36SM_REXTBF17

RSVD17 M1

HDA_BCLKB28HDA_RST#B30HDA_SDIB29HDA_SDOC29HDA_SYNCA28

DDPC_CTRLDATAM28

RSVD16 B2

T125PAD~D@

R100 100_0402_5%~D12

R79 80.6_0402_1%~D12

R93

3.01K_0402_1%

~D

1

2

R182 2.2K_0402_5%~D12

T16 PAD~D@

R10154.9_0402_1%~D

1

2

T9 PAD~D@

T24 PAD~D@

R84 10K_0402_5%~D12

R99

1K_0402_5%

~D

1

2

T15 PAD~D@

EB

C

Q4MMST3904-7-F_SOT323-3~D

2

3

1

R805 100_0402_5%~D@ 1 2

R11180_0603_5%~D

@

1 2

T157PAD~D@

R82 24.9_0402_1%~D1 2

R1119

100K_0402_5%

~D

1

2

R80 80.6_0402_1%~D12

C68

0.1U_0402_16V

4Z~D

1

2

R685 0_0402_5%~D 1 2

C70

0.1U_0402_16V

4Z~D

1

2

T159PAD~D@

T22 PAD~D@

T20 PAD~D@

C10460.1U_0402_16V4Z~D

1

2

C75

0.01U_0402_16V

7K~D

1

2

C71

0.01U_0402_16V

7K~D

1

2

T21 PAD~D@

C73

0.1U_0402_16V

7K~D

@1

2

R881K_0402_1%~D

1

2

R95

100_0402_1%~D

1

2

R1088 51K_0402_1%~D@ 1 2

R102 56_0402_5%~D1 2

EB

C

Q3MMST3904-7-F_SOT323-3~D

2

3

1

C10470.1U_0402_16V4Z~D

1

2

T12 PAD~D@

Q154B2N7002DW-7-F_SOT363-6~D

3

5

4

C69

0.1U_0402_16V

4Z~D

1

2

T19 PAD~D@

R87

499_0402_1%~D

1

2

R86 0_0402_5%~D12

R1122

10K_0402_5%

~D

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_BS1DDR_B_BS0

DDR_B_BS2

DDR_B_D35

DDR_B_D11

DDR_B_D39

DDR_B_D1

DDR_B_D40

DDR_B_D36

DDR_B_D22

DDR_B_D59

DDR_B_D51

DDR_B_D8

DDR_B_D21

DDR_B_D44

DDR_B_D2

DDR_B_D4

DDR_B_D15

DDR_B_D31

DDR_B_D48

DDR_B_D41DDR_B_D42

DDR_B_D17

DDR_B_D47

DDR_B_D19

DDR_B_D45

DDR_B_D50

DDR_B_D61

DDR_B_D7

DDR_B_D58

DDR_B_D10

DDR_B_D56

DDR_B_D49

DDR_B_D26

DDR_B_D53

DDR_B_D0

DDR_B_D43

DDR_B_D14

DDR_B_D9

DDR_B_D23

DDR_B_D46

DDR_B_D12

DDR_B_D63

DDR_B_D38

DDR_B_D57

DDR_B_D27

DDR_B_D34

DDR_B_D29

DDR_B_D54

DDR_B_D25

DDR_B_D55

DDR_B_D13

DDR_B_D18

DDR_B_D52

DDR_B_D30

DDR_B_D24

DDR_B_D37

DDR_B_D60

DDR_B_D62

DDR_B_D5

DDR_B_D20

DDR_B_D32

DDR_B_D28

DDR_B_D6

DDR_B_D33

DDR_B_D16

DDR_B_D3

DDR_B_DM1DDR_B_DM0

DDR_B_DM3

DDR_B_DM5DDR_B_DM6DDR_B_DM7

DDR_B_DM2

DDR_B_DM4

DDR_B_DQS7

DDR_B_DQS5

DDR_B_DQS1DDR_B_DQS0

DDR_B_DQS4DDR_B_DQS3DDR_B_DQS2

DDR_B_DQS6

DDR_B_DQS#1

DDR_B_DQS#7

DDR_B_DQS#5

DDR_B_DQS#0

DDR_B_DQS#4DDR_B_DQS#3

DDR_B_DQS#6

DDR_B_DQS#2

DDR_B_RAS#DDR_B_CAS#DDR_B_WE#

DDR_B_MA14

DDR_B_MA9

DDR_B_MA0

DDR_B_MA7

DDR_B_MA2

DDR_B_MA13

DDR_B_MA4DDR_B_MA3

DDR_B_MA11

DDR_B_MA5

DDR_B_MA10

DDR_B_MA6

DDR_B_MA8

DDR_B_MA12

DDR_B_MA1

DDR_A_D62

DDR_A_D35

DDR_A_D21

DDR_A_DQS#3

DDR_A_CAS#

DDR_A_D57DDR_A_D56

DDR_A_D40

DDR_A_D38

DDR_A_D19

DDR_A_D5DDR_A_RAS#

DDR_A_DM2DDR_A_DM1

DDR_A_D16

DDR_A_D4

DDR_A_DQS#4

DDR_A_DM5

DDR_A_D59

DDR_A_D43

DDR_A_D25

DDR_A_D23DDR_A_D22

DDR_A_D17

DDR_A_DM4

DDR_A_D12

DDR_A_DQS#0

DDR_A_DQS5

DDR_A_DQS1

DDR_A_DM7

DDR_A_D50

DDR_A_D44

DDR_A_D29DDR_A_D28

DDR_A_D10

DDR_A_DQS4

DDR_A_DQS2

DDR_A_DM3

DDR_A_D45

DDR_A_D14

DDR_A_D1

DDR_A_DQS#2

DDR_A_DQS7

DDR_A_D58

DDR_A_D48

DDR_A_D46

DDR_A_D32

DDR_A_DQS6

DDR_A_DQS3

DDR_A_DQS0

DDR_A_DM6

DDR_A_DM0 DDR_A_D11

DDR_A_D0

DDR_A_DQS#5

DDR_A_BS1

DDR_A_D55

DDR_A_D36

DDR_A_D34DDR_A_D33

DDR_A_D15

DDR_A_D13

DDR_A_D7DDR_A_D6DDR_A_WE#

DDR_A_DQS#6

DDR_A_D63

DDR_A_D51

DDR_A_D3

DDR_A_DQS#7

DDR_A_BS2

DDR_A_D53

DDR_A_D47

DDR_A_D37

DDR_A_D24

DDR_A_D8

DDR_A_BS0

DDR_A_D52

DDR_A_D18

DDR_A_D61DDR_A_D60

DDR_A_D26

DDR_A_D20

DDR_A_D9

DDR_A_D42

DDR_A_D30DDR_A_DQS#1

DDR_A_D39

DDR_A_D54

DDR_A_D49

DDR_A_D41

DDR_A_D31

DDR_A_D27

DDR_A_D2

DDR_A_MA14

DDR_A_MA7

DDR_A_MA5

DDR_A_MA2

DDR_A_MA13

DDR_A_MA4

DDR_A_MA9

DDR_A_MA0

DDR_A_MA8

DDR_A_MA10DDR_A_MA11

DDR_A_MA6

DDR_A_MA1

DDR_A_MA12

DDR_A_MA3

DDR_B_D[0..63] DDR_A_D[0..63]

DDR_B_BS2

DDR_B_BS0DDR_B_BS1

DDR_A_BS0DDR_A_BS1DDR_A_BS2

DDR_A_DM[0..7]

DDR_A_DQS[0..7]

DDR_A_RAS#DDR_A_CAS#DDR_A_WE#

DDR_B_DM[0..7]

DDR_B_DQS[0..7]

DDR_B_DQS#[0..7]

DDR_B_RAS#DDR_B_CAS#DDR_B_WE#

DDR_B_MA[0..14]

DDR_A_DQS#[0..7]

DDR_A_MA[0..14]

Title



Cantiga(2 of 6)




D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

A

U2D


SA_DQ_0 AJ38SA_DQ_1 AJ41

SA_DQ_10 AU40SA_DQ_11 AT38SA_DQ_12 AN41SA_DQ_13 AN39SA_DQ_14 AU44SA_DQ_15 AU42SA_DQ_16 AV39SA_DQ_17 AY44SA_DQ_18 BA40SA_DQ_19 BD43

SA_DQ_2 AN38

SA_DQ_20 AV41SA_DQ_21 AY43SA_DQ_22 BB41SA_DQ_23 BC40SA_DQ_24 AY37SA_DQ_25 BD38SA_DQ_26 AV37SA_DQ_27 AT36SA_DQ_28 AY38SA_DQ_29 BB38

SA_DQ_3 AM38

SA_DQ_30 AV36SA_DQ_31 AW36SA_DQ_32 BD13SA_DQ_33 AU11SA_DQ_34 BC11SA_DQ_35 BA12SA_DQ_36 AU13SA_DQ_37 AV13SA_DQ_38 BD12SA_DQ_39 BC12

SA_DQ_4 AJ36

SA_DQ_40 BB9SA_DQ_41 BA9SA_DQ_42 AU10SA_DQ_43 AV9SA_DQ_44 BA11SA_DQ_45 BD9SA_DQ_46 AY8SA_DQ_47 BA6SA_DQ_48 AV5SA_DQ_49 AV7

SA_DQ_5 AJ40

SA_DQ_50 AT9SA_DQ_51 AN8SA_DQ_52 AU5SA_DQ_53 AU6SA_DQ_54 AT5SA_DQ_55 AN10SA_DQ_56 AM11SA_DQ_57 AM5SA_DQ_58 AJ9SA_DQ_59 AJ8

SA_DQ_6 AM44

SA_DQ_60 AN12SA_DQ_61 AM13SA_DQ_62 AJ11SA_DQ_63 AJ12

SA_DQ_7 AM42SA_DQ_8 AN43SA_DQ_9 AN44

SA_BS_0BD21SA_BS_1BG18SA_BS_2AT25

SA_CAS#BD20

SA_DM_0AM37SA_DM_1AT41SA_DM_2AY41SA_DM_3AU39SA_DM_4BB12SA_DM_5AY6SA_DM_6AT7

SA_DQS_0AJ44SA_DQS_1AT44SA_DQS_2BA43SA_DQS_3BC37SA_DQS_4AW12SA_DQS_5BC8SA_DQS_6AU8SA_DQS_7AM7

SA_DM_7AJ5

SA_DQS#_0AJ43SA_DQS#_1AT43SA_DQS#_2BA44SA_DQS#_3BD37SA_DQS#_4AY12SA_DQS#_5BD8SA_DQS#_6AU9SA_DQS#_7AM8

SA_MA_0BA21SA_MA_1BC24

SA_MA_10BC21SA_MA_11BG26SA_MA_12BH26SA_MA_13BH17

SA_MA_2BG24SA_MA_3BH24SA_MA_4BG25SA_MA_5BA24SA_MA_6BD24SA_MA_7BG27SA_MA_8BF25SA_MA_9AW24

SA_RAS#BB20

SA_WE#AY20

SA_MA_14AY25

D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

B

U2E


SB_DQ_0 AK47SB_DQ_1 AH46

SB_DQ_10 BA48SB_DQ_11 AY48SB_DQ_12 AT47SB_DQ_13 AR47SB_DQ_14 BA47SB_DQ_15 BC47SB_DQ_16 BC46SB_DQ_17 BC44SB_DQ_18 BG43SB_DQ_19 BF43

SB_DQ_2 AP47

SB_DQ_20 BE45SB_DQ_21 BC41SB_DQ_22 BF40SB_DQ_23 BF41SB_DQ_24 BG38SB_DQ_25 BF38SB_DQ_26 BH35SB_DQ_27 BG35SB_DQ_28 BH40SB_DQ_29 BG39

SB_DQ_3 AP46

SB_DQ_30 BG34SB_DQ_31 BH34SB_DQ_32 BH14SB_DQ_33 BG12SB_DQ_34 BH11SB_DQ_35 BG8SB_DQ_36 BH12SB_DQ_37 BF11SB_DQ_38 BF8SB_DQ_39 BG7

SB_DQ_4 AJ46

SB_DQ_40 BC5SB_DQ_41 BC6SB_DQ_42 AY3SB_DQ_43 AY1SB_DQ_44 BF6SB_DQ_45 BF5SB_DQ_46 BA1SB_DQ_47 BD3SB_DQ_48 AV2SB_DQ_49 AU3

SB_DQ_5 AJ48

SB_DQ_50 AR3SB_DQ_51 AN2SB_DQ_52 AY2SB_DQ_53 AV1SB_DQ_54 AP3SB_DQ_55 AR1SB_DQ_56 AL1SB_DQ_57 AL2SB_DQ_58 AJ1SB_DQ_59 AH1

SB_DQ_6 AM48

SB_DQ_60 AM2SB_DQ_61 AM3SB_DQ_62 AH3SB_DQ_63 AJ3

SB_DQ_7 AP48SB_DQ_8 AU47SB_DQ_9 AU46

SB_BS_0BC16SB_BS_1BB17SB_BS_2BB33

SB_CAS#BG16

SB_DM_0AM47SB_DM_1AY47SB_DM_2BD40SB_DM_3BF35SB_DM_4BG11SB_DM_5BA3SB_DM_6AP1SB_DM_7AK2

SB_DQS_0AL47SB_DQS_1AV48SB_DQS_2BG41SB_DQS_3BG37SB_DQS_4BH9SB_DQS_5BB2SB_DQS_6AU1SB_DQS_7AN6SB_DQS#_0AL46SB_DQS#_1AV47SB_DQS#_2BH41SB_DQS#_3BH37SB_DQS#_4BG9SB_DQS#_5BC2SB_DQS#_6AT2SB_DQS#_7AN5

SB_MA_0AV17SB_MA_1BA25

SB_MA_10BB16SB_MA_11AW33SB_MA_12AY33SB_MA_13BH15

SB_MA_2BC25SB_MA_3AU25SB_MA_4AW25SB_MA_5BB28SB_MA_6AU28SB_MA_7AW28SB_MA_8AT33SB_MA_9BD33

SB_MA_14AU33

SB_RAS#AU17

SB_WE#BF14

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEGCOMP

DPC_DOCK_HPD#DPC_DOCK_AUX

DPC_DOCK_AUX#

DPB_HPD#

DPB_AUX#

DPB_AUX

DPC_LANE_N3DPC_LANE_N2DPC_LANE_N1DPC_LANE_N0

DPB_LANE_N2DPB_LANE_N1DPB_LANE_N0

DPB_LANE_N3

DPC_LANE_P3DPC_LANE_P2DPC_LANE_P1DPC_LANE_P0DPB_LANE_P3DPB_LANE_P2DPB_LANE_P1DPB_LANE_P0

G_DAT_DDC2G_CLK_DDC2

LCD_BCLK+_MCHLCD_BCLK-_MCHLCD_ACLK+_MCHLCD_ACLK-_MCH

LCD_A2-_MCH

LCD_A0-_MCHLCD_A1-_MCH

LCD_A0+_MCH

LCD_A2+_MCHLCD_A1+_MCH

LCD_B0+_MCH

LCD_B2+_MCHLCD_B1+_MCH

LCD_B2-_MCH

LCD_B0-_MCHLCD_B1-_MCH

CRT_HSYNC CRT_HSYNC_R

CRT_VSYNC CRT_VSYNC_R

L_IBG

BIA_PWMPANEL_BKEN_MCH

ENVDD

LDDC_CLK_MCHLDDC_DATA_MCH

CRT_IREF

CRT_BLU

CRT_GRN

CRT_RED

CLK_DDC2G_CLK_DDC2

G_DAT_DDC2 DAT_DDC2ENVDD

CRT_BLU

CRT_GRN

CRT_RED

+VCC_PEG

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

CFG5

CFG9

CFG16

CFG6

CFG7

DPB_AUX#

DPB_AUX

DPC_DOCK_AUX#

DPC_DOCK_AUX

DPB_HPD#

DPC_DOCK_HPD#

DPB_LANE_N0_C DPB_LANE_N1_C DPB_LANE_N2_C DPB_LANE_N3_C DPC_LANE_N0_C DPC_LANE_N1_C DPC_LANE_N2_C DPC_LANE_N3_C

DPB_LANE_P0_C DPB_LANE_P1_C DPB_LANE_P2_C DPB_LANE_P3_C DPC_LANE_P0_C DPC_LANE_P1_C DPC_LANE_P2_C DPC_LANE_P3_C

PANEL_BKEN_MCHBIA_PWM

ENVDD

CRT_BLU

CRT_GRN

CRT_RED

CRT_HSYNC

CRT_VSYNC

LCD_ACLK-_MCHLCD_ACLK+_MCHLCD_BCLK-_MCH

LCD_A0-_MCHLCD_A1-_MCHLCD_A2-_MCH

LCD_BCLK+_MCH

LCD_A2+_MCH

LCD_A0+_MCHLCD_A1+_MCH

LCD_B2+_MCH

LCD_B0+_MCHLCD_B1+_MCH

LCD_B0-_MCHLCD_B1-_MCHLCD_B2-_MCH

LDDC_DATA_MCHLDDC_CLK_MCH

DAT_DDC2

CLK_DDC2

CFG19

CFG20

DDPC_CTRLDATA

Title



Cantiga(3 of 6)



CFG[19:20] have internal pulldown

Low = DMI x 2High = DMI x 4 (Default)

CFG[5:16] have internal pullup

Low = Reverse LaneCFG9

High = Normal Operation(Default)



Strap Pin Table

CFG16

CFG19

CFG5 DMI X2 Select

PCI ExpressGraphic Lane

FSB DynamicODT

Low=Dynamic ODT DisableHigh=Dynamic ODT Enable(default)

DMI LaneReversal

Low=Normal (default)High=Lane Reversed

CFG20High=SDVO and PCIEx1 are operatingsimultaneously via PEG port

Low=Only SDVO or PCIEx1 isoperational (default)

SDVO/PCIEConcurrentOperation

SDVO_CRTL_DATALow=No SDVO Device Present(default)High=SDVO Device Present

CFG6iTPM HostInterface

Low = iTPM enableHigh = iTPM disable(Defult)

CFG7ManagementEngine CryptoStrap

Low = TLS cipher suite with no confidentialityHigh = TLS cipher suite withconfidentiality(Default)

DDPC_CTRLDATALow=DisplayPort disabled (default)High=DisplayPort device present

The value is recommended per Intel

NO CONNECT FOR DISCRETE

C727 0.1U_0402_10V7K~D12

R105

49.9_0402_1%~D1

2

R1116

75_0402_5%~D

1

2

R112 4.02K_0402_1%~D@ 1 2

R673 30_0402_1%~D1 2

R480 30_0402_1%~D1 2

C729 0.1U_0402_10V7K~D12

LVDS

P

C

I

-

E

X

P

R

E

S

S

G

R

A

P

H

I

C

S

TVVGA

U2C


PEG_COMPI T37PEG_COMPO T36

PEG_RX#_0 H44PEG_RX#_1 J46PEG_RX#_2 L44PEG_RX#_3 L40PEG_RX#_4 N41PEG_RX#_5 P48PEG_RX#_6 N44PEG_RX#_7 T43PEG_RX#_8 U43PEG_RX#_9 Y43

PEG_RX#_10 Y48PEG_RX#_11 Y36PEG_RX#_12 AA43PEG_RX#_13 AD37PEG_RX#_14 AC47PEG_RX#_15 AD39

PEG_RX_0 H43PEG_RX_1 J44PEG_RX_2 L43PEG_RX_3 L41PEG_RX_4 N40PEG_RX_5 P47PEG_RX_6 N43PEG_RX_7 T42PEG_RX_8 U42PEG_RX_9 Y42

PEG_RX_10 W47PEG_RX_11 Y37PEG_RX_12 AA42PEG_RX_13 AD36PEG_RX_14 AC48PEG_RX_15 AD40

PEG_TX#_0 J41

PEG_TX#_10 Y40

PEG_TX#_3 M40PEG_TX#_4 M42PEG_TX#_5 R48PEG_TX#_6 N38PEG_TX#_7 T40PEG_TX#_8 U37PEG_TX#_9 U40

PEG_TX#_1 M46

PEG_TX#_11 AA46PEG_TX#_12 AA37PEG_TX#_13 AA40PEG_TX#_14 AD43PEG_TX#_15 AC46

PEG_TX#_2 M47

PEG_TX_0 J42PEG_TX_1 L46PEG_TX_2 M48PEG_TX_3 M39PEG_TX_4 M43PEG_TX_5 R47PEG_TX_6 N37PEG_TX_7 T39PEG_TX_8 U36PEG_TX_9 U39

PEG_TX_10 Y39PEG_TX_11 Y46PEG_TX_12 AA36PEG_TX_13 AA39PEG_TX_14 AD42PEG_TX_15 AD46

L_CTRL_CLKM32

L_CTRL_DATAM33L_DDC_CLKK33L_DDC_DATAJ33

L_VDD_ENM29LVDS_IBGC44LVDS_VBGB43LVDS_VREFHE37LVDS_VREFLE38LVDSA_CLK#C41LVDSA_CLKC40

LVDSA_DATA#_0H47LVDSA_DATA#_1E46LVDSA_DATA#_2G40

LVDSA_DATA_1D45LVDSA_DATA_2F40

LVDSB_CLK#B37LVDSB_CLKA37

LVDSB_DATA#_0A41LVDSB_DATA#_1H38LVDSB_DATA#_2G37

LVDSB_DATA_1G38LVDSB_DATA_2F37

L_BKLT_ENG32

TVA_DACF25TVB_DACH25TVC_DACK25

TV_RTNH24

CRT_BLUEE28

CRT_DDC_CLKH32CRT_DDC_DATAJ32

CRT_GREENG28

CRT_HSYNCJ29CRT_TVO_IREFE29

CRT_REDJ28

CRT_IRTNG29

CRT_VSYNCL29

LVDSA_DATA_0H48

LVDSB_DATA_0B42

L_BKLT_CTRLL32

TV_DCONSEL_0C31TV_DCONSEL_1E32

LVDSA_DATA#_3A40

LVDSA_DATA_3B40

LVDSB_DATA#_3J37

LVDSB_DATA_3K37

C731 0.1U_0402_10V7K~D12 R113 4.02K_0402_1%~D@ 1 2

R106 2.21K_0402_1%~D@ 1 2

R8610_0402_5%~D@

1 2

R1115

75_0402_5%~D

1

2

C723 0.1U_0402_10V7K~D12

C728 0.1U_0402_10V7K~D12R111 4.02K_0402_1%~D@ 1 2

R672 976_0402_1%~D12

C725 0.1U_0402_10V7K~D12

R680 150_0402_1%~D1 2

C718 0.1U_0402_10V7K~D12

Q123A2N7002DW-7-F_SOT363-6~D

61

2

R108 2.21K_0402_1%~D@ 1 2

C717 0.1U_0402_10V7K~D12

R682 100K_0402_5%~D1 2

C721 0.1U_0402_10V7K~D12C720 0.1U_0402_10V7K~D12

R681 150_0402_1%~D1 2

C716 0.1U_0402_10V7K~D12

C719 0.1U_0402_10V7K~D12R107 2.21K_0402_1%~D@ 1 2

C724 0.1U_0402_10V7K~D12

Q123B2N7002DW-7-F_SOT363-6~D

3

5

4

R688 2.4K_0402_1%~D

1 2

C726 0.1U_0402_10V7K~D12

R109 2.21K_0402_1%~D@ 1 2

R6752.2K_0402_5%~D

1

2

R679 150_0402_1%~D1 2

R1114

75_0402_5%~D

1

2

R6762.2K_0402_5%~D

1

2

C722 0.1U_0402_10V7K~D12

C730 0.1U_0402_10V7K~D12

C77

0.1U_0402_10V7K~D

1

2

R110 2.21K_0402_1%~D@ 1 2

R8600_0402_5%~D@

1 2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCC_HV

GMCH_VTTLF3

+1.05V_M_A_SM

GMCH_VTTLF1

+VCCA_PEG_BG

GMCH_VTTLF2

+VCC_AXF

+3.3V_CRT_DAC

+VCC_TX_LVDS

+1.05V_M_MPLL

+VCC_PEG

+1.05V_M

+1.05V_M_PEGPLL

+3.3V_RUN+1.05V_VCCP

+1.05V_M_HPLL +1.05V_M +1.05V_M

+1.8V_MEM +1.8V_SM_CK

+3.3V_RUN

+1.05V_VCCP

+VCC_DMI

+VCC_PEG

+1.05V_M_PEGPLL

+1.05V_M_MPLL

+1.05V_M_SM_CK

+1.05V_M_HPLL

+VCC_DMI

+1.8V_SM_CK

+VCC_PEG

+1.05V_VCCP

+1.05V_M

+1.05V_M

+1.05V_M

+1.05V_M

+1.05V_M

+1.05V_M

+3.3V_CRT_DAC

+3.3V_RUN+3.3V_CRT_DAC

+1.05V_M_DPLLB

+1.05V_M_DPLLA

+VCC_TX_LVDS

+1.8V_MEM

+VCC_TX_LVDS+1.8V_MEM

+VCC_TX_LVDS

+1.05V_M_DPLLA +1.05V_M_DPLLB +1.05V_M+1.05V_M

+1.5V_RUN_QDAC +1.5V_RUN

+3.3V_RUN

+1.5V_RUN

+1.5V_RUN

+1.05V_M_PEGPLL

Title



Cantiga(4 of 6)





139.2mA Max.24mA Max.

CRB 270uF

Follow CRB toVCC_HV(C35,B35,A35)

Follow ERB,CRB optionto select +1.05V_M or+1.05V_VCCP

Rdc=0.1~0.2,ratedcurrent=220mA(MAX)

118.8mA Max.

64.8mA Max. 64.8mA Max.

C732

0.01U_0402_25V7K~D

1

2

POWERC

R

T

P

L

L

A

P

E

G

A

S

M

T

V

D

T

V

/

C

R

T

L

V

D

S

V

T

T

L

F

P

E

G

S

M

C

K

A

X

F

V

T

T

D

M

I

H

V

A

C

K

A

L

V

D

S

H

D

A

U2H


VTT_19V3VTT_20U3VTT_21V2VTT_22U2

VCCA_PEG_BG AD48

VCCA_PEG_PLL AA48

VCCA_CRT_DAC_1 B27VCCA_CRT_DAC_2 A26

VCCA_DPLLA F47

VCCA_DPLLB L48

VCCA_HPLL AD1

VCCA_LVDS J48

VCCA_MPLL AE1

VCCA_TV_DAC_1 B24VCCA_TV_DAC_2 A24

VCCD_PEG_PLL AA47

VTT_15U6VTT_16T6VTT_17U5VTT_18T5

VTT_12T8VTT_13U7VTT_14T7

VCCD_HPLL AF1

VTT_1U13VTT_2T13

VTT_4T12VTT_5U11VTT_6T11VTT_7U10VTT_8T10VTT_9U9VTT_10T9VTT_11U8

VTT_3U12

VCCA_SM_CK_1 AP28VCCA_SM_CK_2 AN28

VCCA_DAC_BG A25

VCCD_TVDAC M25

VTTLF1A8VTTLF2L1VTTLF3AB2

VCC_DMI_1AH48VCC_DMI_2AF48

VCC_SM_CK_1BF21VCC_SM_CK_2BH20VCC_SM_CK_3BG20VCC_SM_CK_4BF20

VCCD_LVDS_1 M38

VCCD_QDAC L28

VCC_AXF_1B22VCC_AXF_2B21VCC_AXF_3A21

VCCA_SM_1 AR20VCCA_SM_2 AP20VCCA_SM_3 AN20VCCA_SM_4 AR17VCCA_SM_5 AP17

VCCA_SM_7 AT16VCCA_SM_8 AR16VCCA_SM_9 AP16

VCC_TX_LVDSK47

VSSA_LVDS J47

VCC_HV_1C35VCC_HV_2B35

VCC_PEG_1V48

VCCD_LVDS_2 L37

VCC_PEG_2U48VCC_PEG_3V47VCC_PEG_4U47VCC_PEG_5U46

VCCA_SM_6 AN17

VCCA_SM_CK_3 AP25VCCA_SM_CK_4 AN25VCCA_SM_CK_5 AN24

VCCA_SM_CK_NCTF_1 AM28VCCA_SM_CK_NCTF_2 AM26VCCA_SM_CK_NCTF_3 AM25VCCA_SM_CK_NCTF_4 AL25VCCA_SM_CK_NCTF_5 AM24VCCA_SM_CK_NCTF_6 AL24VCCA_SM_CK_NCTF_7 AM23

VTT_23T2VTT_24V1VTT_25U1

VCC_HV_3A35

VCC_DMI_3AH47VCC_DMI_4AG47

VSSA_DAC_BG B25

VCCA_SM_CK_NCTF_8 AL23

VCC_HDA A32

D1RB751V_SOD323-2~D@

2 1

C113

22U_0805_6.3V6M

~D

1

2

C745

22U_0805_6.3V6M

~D

1

2

+ C111

220U_D

2_4VY

_R15M

~D

1

2

R1180_1210_5%~D

12

C735

0.1U_0402_16V4Z~D

1

2

C116

2.2U_0603_10V7K~D

1

2

R1200_0603_5%~D

1

2

C1170.1U_0402_16V4Z~D

1

2

C110

0.47U_0402_10V4Z~D

1

2

R116

0_0805_5%~D

1 2

+C145

220U_D2_4VY_R15M~D

@

1

2

C136

0.1U_0402_16V4Z~D

1

2

L44BLM18PG181SN1_0603~D

12

C127

0.1U_0402_16V4Z~D

1

2

C126

1U_0603_10V4Z~D

1

2

C128

22U_0805_6.3V6M

~D

1

2

C123

22U_0805_6.3V6M

~D

1

2

L47HK1608R10J-T_0603~D

12

+ C120

100U_D

2E_6.3VM

_R15M

~D

1

2

C144

0.47U_0402_10V4Z~D

1

2

+ C739

220U_D

2_4VY

_R15M

~D

1

2

C742

0.1U_0402_16V4Z~D

1

2

L7LQM21FN1R0N00 _0805~D

12

R117 1_0402_5%~D

C129

2.2U_0603_6.3V6K~D

@1

2

C131

4.7U_0603_6.3V6M

~D

1

2

C738

0.1U_0402_16V4Z~D

1

2

C743

1U_0603_10V4Z~D

1

2

C13322U_0805_6.3VAM~D

1

2

C736

1000P_0402_50V7K~D

1

2

L4

BLM18AG121SN1D_0603~D12

C11810U_0805_4VAM~D

12

C121

1U_0603_10V4Z~D

1

2

C998

0.1U_0402_16V4Z~D

1

2

R1140_1210_5%~D

1 2

C130

0.1U_0402_16V4Z~D

1

2

C124

22U_0805_6.3V6M

~D@1

2

C114

4.7U_0603_6.3V6M

~D

1

2

C119

0.1U_0402_16V4Z~D

1

2

C744

1000P_0402_50V7K~D

1

2

PJP1PAD-OPEN1x1m

@

12

C122

4.7U_0603_6.3V6M

~D

1

2

C142

0.47U_0402_10V4Z~D

1

2

C737

0.01U_0402_25V7K~D

1

2

C140

0.1U_0402_16V4Z~D

1

2

C734

0.01U_0402_25V7K~D

1

2

R121

1_0603_5%~D

1

2

C143

0.47U_0402_10V4Z~D

1

2

R1076 0_0603_5%~D1 2

+ C109

220U_D

2_4VY

_R15M

~D

1

2

R779 0_0402_5%~D

@ 1 2R778 0_0402_5%~D

1 2

C14710U_0805_4VAM~D

12

R119 0_1210_5%~D1 2

C733

0.1U_0402_16V4Z~D

1

2

L6LBC2518T91NM_1210~D

@ 12

L46

10UH_LB2012T100MR_20%_0805~D12

L43

BLM18PG181SN1_0603~D12

C137

0.1U_0402_16V4Z~D

1

2

L3BLM21PG221SN1D_0805~D

1 2

C125

10U_0805_4VAM

~D@1

2

C741

0.1U_0402_16V4Z~D

1

2

+ C740

220U_D

2_4VY

_R15M

~D

1

2

L5LQH32CNR15M33L_1210~D

12

C141

0.1U_0402_16V4Z~D

1

2

C146

0.1U_0402_16V4Z~D

1

2

L45

10UH_LB2012T100MR_20%_0805~D12

R1150_1210_5%~D

@ 1 2

C112

4.7U_0603_6.3V6M

~D

1

2

C115

4.7U_0603_6.3V6M

~D

1

2

R12210_0603_5%~D@

1 2

C132

0.1U_0402_16V4Z~D

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSM_LF2VCCSM_LF3VCCSM_LF4VCCSM_LF5

VCCSM_LF1

VCCSM_LF7VCCSM_LF6

VSS_AXG_SENSEVCC_AXG_SENSE

+1.05V_M

+1.05V_M

+1.8V_MEM

+VCC_GFXCORE

+VCC_GFXCORE

VCC_AXG_SENSEVSS_AXG_SENSE

Title



Cantiga(5 of 6)




Layout Note: Place close to GMCH

Layout Note: Inside GMCH cavity.

CRB 270uFLayout Note: Place close to GMCH

Layout Note: Place on the edge

Layout Note: Inside GMCHcavity for VCC_AXG.

Place close to GMCHLayout Note:

C749

1U_0603_10V4Z~D

1

2

C159

0.22U_0402_10V4Z~D

1

2

C151

22U_0805_6.3V6M

~D

1

2C

7510.1U

_0402_10V7K~D

1

2

C161

0.47U_0402_10V4Z~D

1

2

C750

0.1U_0402_10V7K~D

1

2

+ C747330U

_D2_2.5V

Y_R

15M@1

2

P

O

W

E

R

V

C

C

S

M

V

C

C

G

F

X

V

C

C

G

F

X

N

C

T

F

V

C

C

S

M

L

F

U2G


VCC_SM_10AY32

VCC_SM_20BF31

VCC_SM_30AW29

VCC_SM_6BD32VCC_SM_7BC32VCC_SM_8BB32VCC_SM_9BA32

VCC_SM_11AW32VCC_SM_12AV32VCC_SM_13AU32VCC_SM_14AT32VCC_SM_15AR32VCC_SM_16AP32VCC_SM_17AN32VCC_SM_18BH31VCC_SM_19BG31

VCC_SM_2AN33

VCC_SM_21BG30VCC_SM_22BH29VCC_SM_23BG29VCC_SM_24BF29VCC_SM_25BD29VCC_SM_26BC29VCC_SM_27BB29VCC_SM_28BA29VCC_SM_29AY29

VCC_SM_3BH32

VCC_SM_31AV29VCC_SM_32AU29VCC_SM_33AT29VCC_SM_34AR29

VCC_AXG_NCTF_10 V23VCC_AXG_NCTF_11 AM21VCC_AXG_NCTF_12 AL21VCC_AXG_NCTF_13 AK21VCC_AXG_NCTF_14 W21VCC_AXG_NCTF_15 V21VCC_AXG_NCTF_16 U21VCC_AXG_NCTF_17 AM20VCC_AXG_NCTF_18 AK20VCC_AXG_NCTF_19 W20

VCC_AXG_NCTF_2 V28

VCC_AXG_NCTF_20 U20VCC_AXG_NCTF_21 AM19VCC_AXG_NCTF_22 AL19VCC_AXG_NCTF_23 AK19VCC_AXG_NCTF_24 AJ19VCC_AXG_NCTF_25 AH19VCC_AXG_NCTF_26 AG19VCC_AXG_NCTF_27 AF19VCC_AXG_NCTF_28 AE19VCC_AXG_NCTF_29 AB19

VCC_AXG_NCTF_3 W26

VCC_AXG_NCTF_30 AA19VCC_AXG_NCTF_31 Y19VCC_AXG_NCTF_32 W19VCC_AXG_NCTF_33 V19VCC_AXG_NCTF_34 U19VCC_AXG_NCTF_35 AM17VCC_AXG_NCTF_36 AK17VCC_AXG_NCTF_37 AH17VCC_AXG_NCTF_38 AG17VCC_AXG_NCTF_39 AF17

VCC_AXG_NCTF_4 V26

VCC_AXG_NCTF_40 AE17VCC_AXG_NCTF_41 AC17VCC_AXG_NCTF_42 AB17VCC_AXG_NCTF_43 Y17VCC_AXG_NCTF_44 W17VCC_AXG_NCTF_45 V17VCC_AXG_NCTF_46 AM16VCC_AXG_NCTF_47 AL16VCC_AXG_NCTF_48 AK16VCC_AXG_NCTF_49 AJ16

VCC_AXG_NCTF_5 W25

VCC_AXG_NCTF_50 AH16VCC_AXG_NCTF_51 AG16VCC_AXG_NCTF_52 AF16VCC_AXG_NCTF_53 AE16VCC_AXG_NCTF_54 AC16VCC_AXG_NCTF_55 AB16VCC_AXG_NCTF_56 AA16

VCC_AXG_NCTF_6 V25VCC_AXG_NCTF_7 W24VCC_AXG_NCTF_8 V24VCC_AXG_NCTF_9 W23

VCC_SM_35AP29

VCC_SM_4BG32VCC_SM_5BF32

VCC_AXG_NCTF_1 W28VCC_SM_1AP33

VCC_AXG_1Y26VCC_AXG_2AE25VCC_AXG_3AB25VCC_AXG_4AA25VCC_AXG_5AE24VCC_AXG_6AC24VCC_AXG_7AA24VCC_AXG_8Y24VCC_AXG_9AE23VCC_AXG_10AC23VCC_AXG_11AB23VCC_AXG_12AA23VCC_AXG_13AJ21VCC_AXG_14AG21VCC_AXG_15AE21VCC_AXG_16AC21VCC_AXG_17AA21VCC_AXG_18Y21VCC_AXG_19AH20VCC_AXG_20AF20VCC_AXG_21AE20VCC_AXG_22AC20VCC_AXG_23AB20VCC_AXG_24AA20VCC_AXG_25T17

VCC_AXG_27AM15VCC_AXG_28AL15

VCC_AXG_30AJ15VCC_AXG_31AH15

VCC_AXG_33AF15VCC_AXG_34AB15

VCC_SM_LF1 AV44VCC_SM_LF2 BA37VCC_SM_LF3 AM40VCC_SM_LF4 AV21VCC_SM_LF5 AY5VCC_SM_LF6 AM10VCC_SM_LF7 BB13

VCC_AXG_26T16

VCC_AXG_32AG15

VCC_AXG_35AA15VCC_AXG_36Y15VCC_AXG_37V15VCC_AXG_38U15VCC_AXG_39AN14VCC_AXG_40AM14VCC_AXG_41U14VCC_AXG_42T14

VCC_AXG_SENSEAJ14VSS_AXG_SENSEAH14

VCC_AXG_NCTF_57 Y16VCC_AXG_NCTF_58 W16VCC_AXG_NCTF_59 V16VCC_AXG_NCTF_60 U16

VCC_SM_36/NCBA36VCC_SM_37/NCBB24VCC_SM_38/NCBD16VCC_SM_39/NCBB21VCC_SM_40/NCAW16VCC_SM_41/NCAW13VCC_SM_42/NCAT13

VCC_AXG_29AE15

P

O

W

E

R

V

C

C

N

C

T

F

V

C

C

C

O

R

E

U2F


VCC_NCTF_1 AM32

VCC_NCTF_20 AC30

VCC_NCTF_29 AJ29

VCC_NCTF_42 AK25

VCC_NCTF_9 AA32VCC_NCTF_10 Y32VCC_NCTF_11 W32VCC_NCTF_12 U32VCC_NCTF_13 AM30VCC_NCTF_14 AL30VCC_NCTF_15 AK30

VCC_NCTF_17 AG30VCC_NCTF_18 AF30VCC_NCTF_19 AE30

VCC_NCTF_2 AL32

VCC_NCTF_24 W30VCC_NCTF_25 V30

VCC_NCTF_3 AK32

VCC_NCTF_30 AH29VCC_NCTF_31 AG29VCC_NCTF_32 AE29

VCC_NCTF_38 AL28VCC_NCTF_39 AK28VCC_NCTF_40 AL26VCC_NCTF_41 AK26

VCC_NCTF_4 AJ32

VCC_NCTF_43 AK24

VCC_NCTF_5 AH32VCC_NCTF_6 AG32VCC_NCTF_7 AE32VCC_NCTF_8 AC32

VCC_NCTF_33 AC29VCC_NCTF_34 AA29VCC_NCTF_35 Y29VCC_NCTF_36 W29VCC_NCTF_37 V29

VCC_NCTF_26 U30VCC_NCTF_27 AL29VCC_NCTF_28 AK29

VCC_NCTF_16 AH30

VCC_NCTF_21 AB30VCC_NCTF_22 AA30VCC_NCTF_23 Y30

VCC_1AG34VCC_2AC34VCC_3AB34VCC_4AA34VCC_5Y34VCC_6V34VCC_7U34VCC_8AM33VCC_9AK33VCC_10AJ33VCC_11AG33VCC_12AF33

VCC_13AE33VCC_14AC33VCC_15AA33VCC_16Y33VCC_17W33VCC_18V33VCC_19U33VCC_20AH28VCC_21AF28VCC_22AC28VCC_23AA28VCC_24AJ26VCC_25AG26VCC_26AE26VCC_27AC26VCC_28AH25VCC_29AG25VCC_30AF25VCC_31AG24VCC_32AJ23VCC_33AH23VCC_34AF23

VCC_35T32

VCC_NCTF_44 AK23

C162

1U_0402_6.3V4Z~D

1

2

C156

0.1U_0402_10V7K~D

1

2

C748

0.47U_0402_16V4Z~D

1

2

+ C152220U

_D2_4V

Y_R

15M~D

1

2

+ C746330U

_D2_2.5V

Y_R

15M@1

2

C153

22U_0805_6.3VAM

~D

1

2

C163

1U_0402_6.3V4Z~D

1

2

C752

10U_0805_10V4Z~D

1

2

C154

0.22U_0402_10V4Z~D

1

2

+ C148330U

_D2_2.5V

Y_R

15M

1

2

C753

22U_0805_6.3VAM

~D

1

2

C150

22U_0805_6.3V6M

~D

1

2

C149

0.1U_0402_10V7K~D

1

2

C157

0.1U_0402_10V7K~D

1

2

R1230_0402_5%~D

1 2

C155

0.22U_0402_10V4Z~D

1

2

C160

0.22U_0402_10V4Z~D

1

2

C158

0.1U_0402_10V7K~D

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title



Cantiga(6 of 6)




VSS

V

S

S

N

C

T

F

V

S

S

S

C

B

N

C

U2J


VSS_199BG21

VSS_201AW21VSS_202AU21VSS_203AP21VSS_204AN21VSS_205AH21VSS_206AF21VSS_207AB21VSS_208R21VSS_209M21VSS_210J21VSS_211G21VSS_212BC20VSS_213BA20VSS_214AW20VSS_215AT20VSS_216AJ20VSS_217AG20VSS_218Y20VSS_219N20VSS_220K20VSS_221F20VSS_222C20VSS_223A20VSS_224BG19VSS_225A18VSS_226BG17VSS_227BC17VSS_228AW17VSS_229AT17VSS_230R17VSS_231M17VSS_232H17VSS_233C17

VSS_235BA16

VSS_237AU16VSS_238AN16VSS_239N16VSS_240K16VSS_241G16VSS_242E16VSS_243BG15

VSS_245W15VSS_246A15VSS_247BG14VSS_248AA14VSS_249C14VSS_250BG13VSS_251BC13VSS_252BA13

VSS_255AN13VSS_256AJ13VSS_257AE13VSS_258N13VSS_259L13VSS_260G13VSS_261E13VSS_262BF12VSS_263AV12VSS_264AT12VSS_265AM12VSS_266AA12VSS_267J12VSS_268A12VSS_269BD11VSS_270BB11VSS_271AY11VSS_272AN11VSS_273AH11

VSS_275Y11VSS_276N11VSS_277G11VSS_278C11VSS_279BG10VSS_280AV10VSS_281AT10VSS_282AJ10VSS_283AE10VSS_284AA10

VSS_293BH8VSS_292B9VSS_291G9VSS_290AD9VSS_289AM9VSS_288AN9VSS_287BC9

VSS_285M10VSS_286BF9

VSS_297 AH8VSS_298 Y8VSS_299 L8VSS_300 E8VSS_301 B8VSS_302 AY7VSS_303 AU7VSS_304 AN7VSS_305 AJ7VSS_306 AE7VSS_307 AA7VSS_308 N7VSS_309 J7VSS_310 BG6VSS_311 BD6VSS_312 AV6VSS_313 AT6

VSS_244AC15

VSS_314 AM6VSS_315 M6VSS_316 C6VSS_317 BA5VSS_318 AH5VSS_319 AD5VSS_320 Y5VSS_321 L5VSS_322 J5VSS_323 H5VSS_324 F5VSS_325 BE4

VSS_327 BC3VSS_328 AV3VSS_329 AL3

VSS_NCTF_1 AF32VSS_NCTF_2 AB32VSS_NCTF_3 V32VSS_NCTF_4 AJ30VSS_NCTF_5 AM29VSS_NCTF_6 AF29VSS_NCTF_7 AB29VSS_NCTF_8 U26VSS_NCTF_9 U23

VSS_NCTF_10 AL20VSS_NCTF_11 V20VSS_NCTF_12 AC19VSS_NCTF_13 AL17VSS_NCTF_14 AJ17VSS_NCTF_15 AA17VSS_NCTF_16 U17

VSS_SCB_1 BH48VSS_SCB_2 BH1VSS_SCB_3 A48VSS_SCB_4 C1VSS_SCB_5 A3

NC_26 E1NC_27 D2NC_28 C3NC_29 B4NC_30 A5NC_31 A6NC_32 A43NC_33 A44NC_34 B45NC_35 C46NC_36 D47NC_37 B47NC_38 A46NC_39 F48NC_40 E48NC_41 C48NC_42 B48

VSS_330 R3VSS_331 P3

VSS_333 BA2

VSS_336 AR2VSS_335 AU2

VSS_337 AP2

VSS_332 F3

VSS_334 AW2

VSS_341 AE2VSS_340 AF2VSS_339 AH2VSS_338 AJ2

VSS_342 AD2VSS_343 AC2VSS_344 Y2VSS_345 M2VSS_346 K2VSS_347 AM1VSS_348 AA1VSS_349 P1VSS_350 H1

VSS_294BB8VSS_295AV8VSS_296AT8

VSS_351 U24VSS_352 U28VSS_353 U25VSS_354 U29

VSS_200L12

VSS

U2I


VSS_1AU48

VSS_198 A23

VSS_2AR48VSS_3AL48VSS_4BB47VSS_5AW47VSS_6AN47VSS_7AJ47VSS_8AF47VSS_9AD47VSS_10AB47VSS_11Y47VSS_12T47VSS_13N47VSS_14L47VSS_15G47VSS_16BD46VSS_17BA46

VSS_19AV46VSS_20AR46VSS_21AM46VSS_22V46VSS_23R46VSS_24P46VSS_25H46VSS_26F46VSS_27BF44VSS_28AH44VSS_29AD44VSS_30AA44VSS_31Y44VSS_32U44VSS_33T44VSS_34M44VSS_35F44VSS_36BC43VSS_37AV43VSS_38AU43VSS_39AM43VSS_40J43VSS_41C43VSS_42BG42VSS_43AY42VSS_44AT42VSS_45AN42VSS_46AJ42VSS_47AE42VSS_48N42VSS_49L42VSS_50BD41VSS_51AU41VSS_52AM41VSS_53AH41VSS_54AD41VSS_55AA41VSS_56Y41VSS_57U41VSS_58T41VSS_59M41VSS_60G41VSS_61B41VSS_62BG40VSS_63BB40VSS_64AV40VSS_65AN40VSS_66H40VSS_67E40VSS_68AT39VSS_69AM39VSS_70AJ39VSS_71AE39VSS_72N39VSS_73L39VSS_74B39VSS_75BH38VSS_76BC38VSS_77BA38VSS_78AU38VSS_79AH38VSS_80AD38VSS_81AA38VSS_82Y38VSS_83U38VSS_84T38VSS_85J38VSS_86F38VSS_87C38

VSS_97BD36

VSS_100 AM36VSS_101 AE36VSS_102 P36VSS_103 L36VSS_104 J36VSS_105 F36VSS_106 B36VSS_107 AH35VSS_108 AA35VSS_109 Y35VSS_110 U35VSS_111 T35VSS_112 BF34VSS_113 AM34VSS_114 AJ34VSS_115 AF34VSS_116 AE34VSS_117 W34VSS_118 B34VSS_119 A34VSS_120 BG33VSS_121 BC33VSS_122 BA33VSS_123 AV33VSS_124 AR33VSS_125 AL33VSS_126 AH33VSS_127 AB33VSS_128 P33VSS_129 L33VSS_130 H33VSS_131 N32VSS_132 K32VSS_133 F32VSS_134 C32VSS_135 A31VSS_136 AN29VSS_137 T29VSS_138 N29VSS_139 K29VSS_140 H29VSS_141 F29VSS_142 A29VSS_143 BG28VSS_144 BD28VSS_145 BA28VSS_146 AV28VSS_147 AT28VSS_148 AR28VSS_149 AJ28VSS_150 AG28VSS_151 AE28VSS_152 AB28VSS_153 Y28VSS_154 P28VSS_155 K28VSS_156 H28VSS_157 F28VSS_158 C28VSS_159 BF26VSS_160 AH26VSS_161 AF26VSS_162 AB26VSS_163 AA26VSS_164 C26VSS_165 B26VSS_166 BH25VSS_167 BD25VSS_168 BB25VSS_169 AV25VSS_170 AR25VSS_171 AJ25VSS_172 AC25VSS_173 Y25VSS_174 N25VSS_175 L25VSS_176 J25VSS_177 G25VSS_178 E25VSS_179 BF24

VSS_88BF37VSS_89BB37VSS_90AW37VSS_91AT37VSS_92AN37VSS_93AJ37VSS_94H37VSS_95C37VSS_96BG36

VSS_99AU36

VSS_182 AT24

VSS_184 AH24

VSS_186 AB24

VSS_188 L24

VSS_18AY46

VSS_191 G24

VSS_193 E24

VSS_195 AG23

VSS_197 B23

VSS_181 AY24

VSS_183 AJ24

VSS_185 AF24

VSS_187 R24

VSS_189 K24VSS_190 J24

VSS_192 F24

VSS_194 BH23

VSS_196 Y23VSS_98AK15

VSS_180 AD12

VSS_199 AJ6

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_CKE0_DIMMA

DDR_A_MA10DDR_A_BS0

DDR_A_WE#DDR_A_CAS#

DDR_A_BS2

DDR_A_MA5

DDR_CKE1_DIMMA

DDR_A_D41

DDR_A_D61

DDR_A_D40

DDR_A_D60DDR_A_D56

DDR_A_D20

DDR_A_D45

DDR_A_D43DDR_A_D42

DDR_A_D57

DDR_A_D27

DDR_A_MA14

DDR_A_D8

DDR_A_D32DDR_A_D33

DDR_A_D54

DDR_A_D38

+V_DDR_MCH_REF

M_CLK_DDR0

M_CLK_DDR1

M_CLK_DDR#0

M_CLK_DDR#1

DDR_CKE1_DIMMA

DDR_CS0_DIMMA#

MEM_SCLK

d9b19 compal jbl00 la-3801p - dell e6400 laptop schematics

Documents