copyright 2007 sun microsystems, inc snzi: scalable non-zero indicator yossi lev (brown university...
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Copyright 2007 Sun Microsystems, Inc
SNZI: ScalableNon-Zero Indicator
Yossi Lev (Brown University & Sun Microsystems Laboratories)Joint work with:
Faith Ellen (University of Toronto)Victor Luchangco and
Mark Moir (Sun Microsystems Laboratories)
Presence Indicator
• Threads Arrive and Depart a room
• Query: Is there anybody in there?
Room
Room01
Simple Solution: Counter
• Threads Arrive and Depart a room
• Query: Is there anybody in there?
• Problem: Not Scalable
210Counter
Simple Solution: Counter
• Problem: Not Scalable– Arrive/Depart nonscalable– Query nonscalable
• Observation: Counter Semantics too strong– Answers: how many threads in room– All we asked: are there any threads in room
• Task: Exploit weaker semantics to develop A Scalable Non-Zero Indicator (SNZI)
SNZI Specification
• State: – Surplus: a nonnegative integer
• Operations:– Arrive: increment surplus– Depart: decrement surplus– Query: return whether surplus ≠ 0
• Well Formedness: Surplus ≥ 0
Solution’s Requirements
• Linearizable• Lock Free• Query reads a 1-bit indicator in a given word
– Update using LL/SC• Captures modifications by the outside world
(spurious failures)
– Scalability: Minimize modifications to indicator bit
Agenda
• Two SNZI solutions– Base solution:
Separate indicator and surplus data (Query scalability)– Hierarchical solution:
Implement one SNZI using the other (Arrive/Depart scalability)
• Applications• Performance
Room
Separate Surplus and Indicator:Naïve Attempt
• A simple counter and an indicator bit• Set or UnSet bit after updating counter
– 0 1 transition: set the bit– 1 0 transition: unset the bit
01210Counter
Indicator
Room
Separate Surplus and Indicator:Naïve Attempt
• A simple counter and an indicator bit• Set or UnSet bit after updating counter• What can go wrong?
01210Counter
Indicator
Oh oh…I’m in the
dark!
Zzzz…
Zzzz…
Separate Surplus and Indicator:Naïve Attempt
• A simple counter and an indicator bit• Set or UnSet bit after updating counter• What can go wrong?
– Delay in setting bit causes unnoticed arrivals– Delay in unsetting bit causes obsolete writes
Separate Surplus and Indicator:Our solution
• 1. Add an “Announce” bit to the counter word:Says: “Indicator needed to be set”– Set announce on 0 1 transition– Clear announce after setting indicator– “Help” setting indicator if announce bit set
Room
Separate Surplus and Indicator:Our solution
01210
false
Counter &Announce bit Indicator
• 1. Add an “Announce” bit to the counter word:Says: “Indicator needed to be set”– Set announce on 0 1 transition– Clear announce after setting indicator– “Help” setting indicator if announce bit set
Room
Separate Surplus and Indicator:Our solution
01211true
Counter &Announce bit Indicator
• 1. Add an “Announce” bit to the counter word:Says: “Indicator needed to be set”– Set announce on 0 1 transition– Clear announce after setting indicator– “Help” setting indicator if announce bit setZzzz…
Room
Separate Surplus and Indicator:Our solution
• 1. Add an “Announce” bit to the counter word:Says: “Indicator needed to be set”– Set announce on 0 1 transition– Clear announce after setting indicator– “Help” setting indicator if announce bit set
01212true
Counter &Announce bit Indicator
Zzzz…
Room
Separate Surplus and Indicator:Our solution
• 1. Add an “Announce” bit to the counter word:Says: “Indicator needed to be set”– Set announce on 0 1 transition– Clear announce after setting indicator– “Help” setting indicator if announce bit set
01212
false
Counter &Announce bit Indicator
Zzzz…
Room
Separate Surplus and Indicator:Our solution
• 2. Prevent obsolete writes:Unset the indicator using LL/SC– Read counter in between, unset only if still 0
01211
false
Counter &Announce bit Indicator
Room
LL( )
Read Counter,If still 0
SC( , false)
Separate Surplus and Indicator:Our solution
• 2. Prevent obsolete writes:Unset the indicator using LL/SC– Read counter in between, unset only if still 0
01210
false
Counter &Announce bit Indicator
Indicatorwasn’t writtenin between
Wasn’t writtenbefore LL
Hierarchical SNZI
• Base SNZI took care of Query Scalability• Hierarchical SNZI: Arrive/Depart Scalability
– Implement SNZI using a parent SNZI– Parent surplus > 0 iff a child surplus > 0
• Arrange solution in treeArrive/Depart at leaves, Query the root
Base SNZI
Hierarchical SNZI Filter
Hierarchical SNZI:The Basics
• Invariant: Parent surplus > 0 iff child surplus > 0• Similar to base SNZI, use a counter
– 0 1 transition triggers Arrive at parent– 1 0 transition triggers Depart at parent– Help arriving at parent during 0 1 transition
• Unlike base SNZI– Use intermediate value ½ : 0 ½ 1– Parent is not a bit: it has a surplus
• Undo extra arrivals
Room
Hierarchical SNZI
0Counter Parent SNZI
Surplus
0
• Invariant: Parent surplus > 0 iff child surplus > 0
Increment Counter
Room
Hierarchical SNZI
½Counter Parent SNZI
Surplus
0
• Invariant: Parent surplus > 0 iff child surplus > 0
Increment Counter: 0 ½
Room
Hierarchical SNZI
½Counter Parent SNZI
Surplus
1
• Invariant: Parent surplus > 0 iff child surplus > 0
Increment Counter: 0 ½
Arrive at Parent
Try ½ 1 transition
Room
Hierarchical SNZI
1Counter Parent SNZI
Surplus
1
• Invariant: Parent surplus > 0 iff child surplus > 0
Increment Counter: 0 ½
Arrive at Parent
Try ½ 1 transition
Room
Hierarchical SNZI
½Counter Parent SNZI
Surplus
1
• Invariant: Parent surplus > 0 iff child surplus > 0
Increment Counter: 0 ½
Arrive at Parent
Try ½ 1 transition
Room
Hierarchical SNZI
½Counter Parent SNZI
Surplus
1
• Invariant: Parent surplus > 0 iff child surplus > 0
Increment Counter: 0 ½
Arrive at Parent
Read Counter as ½:
Help Arrive at Parent
Room
Hierarchical SNZI
½Counter Parent SNZI
Surplus
2
• Invariant: Parent surplus > 0 iff child surplus > 0
Increment Counter: 0 ½
Arrive at Parent
Read Counter as ½:
Help Arrive at Parent
Try ½ 1 transition
Room
Hierarchical SNZI
1Counter Parent SNZI
Surplus
2
• Invariant: Parent surplus > 0 iff child surplus > 0
Increment Counter: 0 ½
Arrive at Parent
Try ½ 1 transition
Undo: Depart at Parent
Read Counter as ½:
Help Arrive at Parent
Try ½ 1 transition
Update counter for myself
Only one succeeds: single contribution to parent per 01
1
Caveats
• Counter must have a version number– Avoid the ABA problem– Also in Base algorithm
• Undoing arrives at parent must happen after the executing Arrive incremented the counter– Helper defers undoing an Arrive operation until after
incrementing the counter for itself– Otherwise indicator might “flicker”
Detailed scenarios in the paper
Applications
• Hybrid Transactional Memory (ASPLOS 06)– HW and SW transactions run concurrently– HW transactions pay overhead for conflict detection
with SW transactions– Avoid overhead if no SW transactions are running:
Are there any SW transactions out there?
– Query performance is importantExecuted by HW transactions
Read Indicators
• STM: Read Ownership Is any transaction reading this location?
• In addition:– Reset operation:
• All readers logically “disappear”• New readers can arrive and depart
before old readers departed
• Indicator should work as if old readers are not there
– Needed because writer invalidate old readers
Room
SNZI-R• Added an Epoch to the indicator
– Indicator set iff someone in room that arrived in the current epoch• Operations:
– Reset starts a new epoch– Arrive at current epoch– Depart at the epoch we arrived at– Query returns bit and current epoch
Indicator
1975
Epoch1975Reset2007
Room
SNZI-R• Added an Epoch to the indicator
– Indicator set iff someone in room that arrived in the current epoch• Operations:
– Reset starts a new epoch– Arrive at current epoch– Depart at the epoch we arrived at– Query returns bit and current epoch
Indicator
2007
Epoch
1975
2007
Evaluation
• System: 48-processor Sun FireTM 6800• Experiment:
– Visiting threads: keep arriving and departing.– Query thread: keeps querying the indicator.
• Various tree depths• Measured:
– Visit (Arrive+Depart) and Query throughput
when varying #visiting threads
• Compared with a simple counter implementation
Performance: Query Scalability
SNZI: Query Throughput
0.1
1
10
100
1000
0 8 16 24 32 40 48
Number of Visiting Threads
Que
ries/
us
Simple
Depth 0
Depth 1
Depth 2
Depth 3
Depth 4
Depth 5
g
Performance: Visiting Scalability
SNZI: Visit Throughput (per thread)
1
10
100
1000
10000
0 8 16 24 32 40 48
Number of Visiting Threads
Vis
its/m
s
Simple
Depth 0
Depth 1
Depth 2
Depth 3
Depth 4
Depth 5
Performance: Visiting Scalability
SNZI: Visit Throughput (per thread)
100
1000
10000
1 2 3 4 5 6
Number of Visiting Threads
Vis
its/m
s
Simple
Depth 0
Depth 1
Depth 2
Depth 3
Depth 4
Depth 5
• SuperSNZI: Simple counter with a SNZI indicator
• Arrive by modifying counter if not contended• Use SNZI otherwise• Depart accordingly
Performance: SuperSNZI
SuperSNZI: Visits Throughput (per thread)
100
1000
10000
1 2 3 4 5 6
Numbe of Visiting Threads
Vis
its/m
s
Simple
Depth 0
Depth 1
Depth 2
Depth 3
Depth 4
Depth 5
• SuperSNZI: Simple counter with a SNZI indicator
• Arrive by modifying counter if not contended• Use SNZI otherwise• Depart accordingly
Conclusion
• Presence indicator– Can be implemented using a simple counter– Counter semantics too strong Doesn’t scale
– Exploits the weaker semantics we needto provide SNZI: A Scalable Non-Zero Indicator
Perform much better than a simple counter
– Useful in practice
Thank You!