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Page 1: Control Pp t
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Modeling and Simulation of a DC Modeling and Simulation of a DC Motor Control System with Digital Motor Control System with Digital

PID Controller and Encoder in PID Controller and Encoder in FPGA Using Xilinx System FPGA Using Xilinx System

GeneratorGenerator

Group MembersSonia Shafiq 2010-EE-08

Attiyia Farzeen 2010-EE-25Zunaira Anum 2010-EE-47

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Outlines

Introduction DC Motor Closed Loop Control System. PID Controller. Controller DSP Architecture. FPGA Simulation. MATLAB Xilinx System Generator. Incremental Optical Shaft Encoder. Results and Conclusions. References.

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Introduction

A control system consists of a plant, driver, controller,

sensor and signal condition. The plant has the mathematical

model. Digital controllers need to use microcontrollers or

microprocessors, and their memories need to decode, fetch

and execute the program instructions. All these need to go

through many machine cycles to be executed. But FPGA

based PID controller is proposed because the operations on

FPGA are hardware compatible operations in comparison with

other types of controllers

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Objective

The objective is to develop a digital PID implementation and measuring the RPM for DC motor speed control system by the use of FPGA. The simulation results show that the proposed system has an appropriate response.

The proposed system leads to lower the steady state and transient error.

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Control System

The structure of the control system has the form shown in the figure below.

Here

Plant is a system to be controlled.

Controller provides the excitation for the plant.

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DC Motor Control System

Physical setupA common actuator in control systems is the DC motor. It directly provides

rotary motion and, coupled with wheels or drums and cables, can provide translational motion. The electric equivalent circuit of the armature and the free-body diagram of the rotor are shown in the following figure.

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System Equations

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System Equations

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System Equations

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MATLAB Representation

Transfer FunctionWe can represent the above open-loop transfer function of the motor in

MATLAB by defining the parameters and transfer function as follows. Running this code in the command window produces the output shown below.

%DC motor controll model

J = 27.8; %moment of inertia of the rotor

b = 0.2; %motor viscous friction constant

K =39.3; % motor torque constant

R =7.94; %electric resistance

L =1.54; % electric inductance

s = tf('s');

P_motor = K/((J*s+b)*(L*s+R)+K^2)

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MATLAB Representation

State SpaceWe can also represent the system using the state-space equations. The

following additional MATLAB commands create a state-space model of the motor and produce the output shown below when run in the MATLAB command window.

%state space;

A = [-b/J K/J -K/L -R/L]

B = [0 1/L]

C = [1 0]

D = 0

The above state-space model can also be generated by converting your existing transfer function model into state-space form. This is again accomplished with the ss command as shown below.

motor_ss = ss(A,B,C,D)

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Simulink model of the DC motor

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Industrial Modeled Motor Specifications

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PID Controller

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Simulink Modeling of PID Controller

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Controller DSP Architecture

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Controller DSP Architecture

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Cont….

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PID Controller

The main features of PID Controller are

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FPGA-Field Programmable Gate Array

Digital controllers need to use microcontrollers or microprocessors, and their memories need to decode, fetch and execute the program instructions. All these need to go through many machine cycles to be executed. But FPGA based PID controller is proposed because the operations on FPGA are hardware compatible operations in comparison with other types of controllers

FPGAs are programmable digital logic chips. What that means is that you can program them to do almost any digital function.

The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC)

The FPGA designs can run much faster than if you were to design a board with discrete components, since everything runs within the FPGA, on its silicon die.

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Xilinx FPGA

Who makes FPGAs?There are (at least) four companies making FPGAs in the world. The first

two (Xilinx and Altera) hold the bulk of the market.

• Xilinx invented FPGAs and is the biggest name in the FPGA world.

• Altera is the second FPGA heavyweight, also a well-known name.

• Lattice and Actel are smaller players.

Xilinx

Xilinx has traditionally been the density and technology leader. Their general philosophy is to be very open about their devices architecture and to provide lots of (useful) features at the cost of a bit more complexity.

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Basic FPGA Architecture

The main architectural components, as illustrated in the figureLogic BlocksProgrammable I/OProgrammable Interconnect

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Cont….

Logic blocks Logic block is a generic term for a circuit that implements various logic

functions. A logic block in Xilinx FPGAs is called Slice. A Slice in FPGA contains look-up tables (LUTs), registers, and multiplexers.

Block RAMBlock RAM, or block memory, is RAM that is embedded throughout the

FPGA for storing data.

DSP FPGAs provide dedicated Digital Signal Processing (DSP) primitives to

implement various functions used in DSP applications, such as multipliers, accumulators, and signed arithmetic operations. The main advantage of using DSP primitives instead of general-purpose LUTs and registers is high performance.

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FPGA Operation

User writes configuration memory which defines the function of the system. This includes: the connectivity between the CLBs and the I/O cells, the logic to be implemented onto the CLBs, and the I/O blocks.

By changing the data in the configuration memory, the function of the system changes as well. This change in data can be implemented at anytime during FPGA operation (run-time configuration).

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FPGA Simulation

System Generator Can simulates and generates VHDL code for design by considering the correct hardware platform and also takes care of the synchronization and interfacing problems.

There is a modeled DC motor control system in Simulink and outstanding results are obtained from this simulation.

There is also a comparison between the digital model and an analog one. The parameters of both models are the same and only the PID is changed. Also the analog PID control system has a unit feedback.

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The Digital Control model in Matlab Simulink

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The Analog PID Control model in Matlab Simulink

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Cont…..

The input signal is a repeating sequence which is sweeping among 0, 500, -1000.

By using sample frequency f=1 MHz or T= 1 μs and PID Tuning program, and trying different numbers, the coefficients of gains compatible with the ramp input result is:

Kp =1 Ki =2 Kd =0

The derivative term would transform the step input signals of encoder to the impulse. This would cause the system to become instable; therefore the output of the system has to be zero.

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Xilinx System Generator

Introduction to SimulinkSimulink, which runs in MATLAB, is an interactive tool for modeling,

simulating, and analyzing dynamical systems. The Xilinx System Generator, a high-performance design tool, runs as part of Simulink. The System Generator elements bundled as the Xilinx Blockset, appear in the Simulink library browser.

MATLAB Xilinx system generatorMATLAB Xilinx system generator toolbox based on Fixed-Point Arithmetic is

used to design the digital PID controller using DSP architecture, plot the responses of the control system and generate the VHDL source code.

The use of Xilinx System generator and Simulink provides a powerful modeling tool that has the ability to model the controller, DC motor, encoder, driver and algorithm for measuring the RPM from the encoder output.

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Discrete PID model created with Sysgen toolbox in Simulink

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Xilinx Resource Estimator

It results the device resource summary. It provides the information regarding the number of needed Slices, Flip-Flops, lOBs and LUTs which gives us estimation for choosing the best FPGA.

Resource Estimator Outputs

Slices 3835

Flip Flops 3145

BRAMs 0

LUTs 7402

IOBs 190

Mults/DSP48S 0

TBUFs 0

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Incremental Shaft Encoder

Incremental Shaft EncoderModel device that converts information about angular shaft

position into electrical pulses

The Incremental Shaft Encoder blockThe Incremental Shaft Encoder block represents a device that

converts information about the angular position of a shaft into electrical pulses. The block produces N pulses on ports A and B per shaft revolution, where N is the value specify for the Pulses per revolution parameter.

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Cont….

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Encoder model with input RPM and 2 outputs CHA and CHB

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ConclusionDigital PID Controller Response

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ConclusionsAnalogue PID Controller Response