Computer Structure and Operation

Last updated 12/3/19

2 © tjEE 1910

Architecture

• Memory Bus Structure

ALUCONTROL

STATUS

UNIFIED

MEMORY

CONTROL

ADDRESS

ALUCONTROL

STATUS

INSTRUCTION

MEMORY

DATA

MEMORY

ADDRESSADDRESS

CONTROL

von Neumann Harvard

3 © tjEE 1910

Architecture

• CPU Structurea = b + c;

ALUCONTROL

STATUS

INSTRUCTION

MEMORY

DATA

MEMORY

ADDRESSADDRESS

CONTROL

Registers

R1 = ?R2 = ?R3 = ?

…

ALU

Control

CPU

4 © tjEE 1910

Architecture

• 1 line of codea = b + c;

• what are a, b, and c?

• where did b and c get their values?

• how do we add them?

• what happens to the result

5 © tjEE 1910

Architecture

• 1 line of codea = b + c;

• what are a,b, and c?• values stored in memory or a register

• where did b and c get their values?• previous instructions

• how do we add them?• The Central Processing Unit (CPU) has an Arithmetic Logic Unit (ALU)

• what happens to the result• The result is written back to a register

6 © tjEE 1910

Architecture

• 1 line of codea = b + c;

• what are a,b, and c?• values stored in memory or a register

• what is a memory or register?

• where did b and c get their values?• previous instructions

• how do we add them?• The CPU has an Arithmetic Logic Unit (ALU)

• How does this work?

• what happens to the result• The result is written back to a register

• Does it ever get stored back to a memory?

7 © tjEE 1910

Architecture

• 1 line of codea = b + c;

• what are a,b, and c?• values stored in memory or a register• what is a memory or register?

• locations to store binary bits

• where did b and c get their values?• previous instructions

• how do we add them?• The CPU has an Arithmetic Logic Unit (ALU)• How does this work?

• It grabs the value from 2 registers and adds them

• what happens to the result• The result is written back to a register

• Does it ever get stored back to a memory?

• Yes – when we need to use the register for something else (STORE)

8 © tjEE 1910

Architecture

• 1 line of codea = b + c;

• what are a,b, and c?• values stored in memory or a register• what is a memory or register?

• locations to store binary bits

• where did b and c get their values?• previous instructions

• how do we add them?• The CPU has an Arithmetic Logic Unit (ALU)• How does this work?

• It grabs value from 2 registers and adds them

• How did they get into the registers?

• what happens to the result• The result is written back to a register

• Does it ever get stored back to a memory?• Yes – when we need to use the register for something else (STORE)

9 © tjEE 1910

Architecture

• 1 line of codea = b + c;

• what are a,b, and c?• values stored in memory or a register• what is a memory or register?• locations to store binary bits

• where did b and c get their values?• previous instructions

• how do we add them?• The CPU has an Arithmetic Logic Unit (ALU)• How does this work?• It grabs value from 2 registers and adds them• How did they get into the registers?• We load them from memory into the register (LOAD)

• what happens to the result• The result is written back to a register• Does it ever get stored back to a memory?• Yes – when we need to use the register for something else (STORE)

10 © tjEE 1910

Architecture

• 1 line of codea = b + c;

MEMORY

a = ?b = 5c = 9

…

Registers

R1 = ?R2 = ?R3 = ?

…

ALU

Control

CPU

11 © tjEE 1910

Architecture

• 1 line of codea = b + c; → add R3, R1, R2

MEMORY

a = ?b = 5c = 9

…

Registers

R1 = ?R2 = ?R3 = ?

…

ALU

Control

CPU

12 © tjEE 1910

Architecture

• 1 line of codea = b + c; → add R3, R1, R2

first need to get the values into the registers (LOAD)

MEMORY

a = ?b = 5c = 9

…

Registers

R1 = 5R2 = 9R3 = ?

…

ALU

Control

CPU

13 © tjEE 1910

Architecture

• 1 line of codea = b + c; → add R3, R1, R2

ALU adds the 2 values (execute)

MEMORY

a = ?b = 5c = 9

…

Registers

R1 = 5R2 = 9R3 = ?

…

ALU

5 + 9 = 14

Control

CPU

14 © tjEE 1910

Architecture

• 1 line of codea = b + c; → add R3, R1, R2

ALU places the value back into a register (writeback)

MEMORY

a = ?b = 5c = 9

…

Registers

R1 = 5R2 = 9

R3 = 14…

ALU

5 + 9 = 14

Control

CPU

15 © tjEE 1910

Architecture

• 1 line of codea = b + c; → add R3, R1, R2At some later time the value may be stored in memory (STORE)

MEMORY

a = 14b = 5c = 9

…

Registers

R1 = 5R2 = 9

R3 = 14…

ALU

5 + 9 = 14

Control

CPU

16 © tjEE 1910

Architecture

• 1 line of codea = b + c; →

ld R1, mem(b) load R1 with the value from memory for b

ld R2, mem(c) load R2 with the value from memory for c

add R3, R1, R2 add R1 and R2 and write the result back to R3

…

st R3, mem(a) store R3 to the memory location for a

where do these instructions come from?

17 © tjEE 1910

Architecture

• 1 line of codea = b + c; →

ld R1, mem(b) load R1 with the value from memory for b

ld R2, mem(c) load R2 with the value from memory for c

add R3, R1, R2 add R1 and R2 and write the result back to R3

…

st R3, mem(a) store R3 to the memory location for a

where do these instructions come from?

read from a separate Program Memory (FETCH)

18 © tjEE 1910

Architecture

• RISC Instruction set

• 2 basic types of instructions• Register based instructions

• Memory instructions

• Register Instructions• Only require access to the internal registers• Arithmetic

• Logical

• Control

• Memory Operations• Read or write to memory

19 © tjEE 1910

Program Execution

• Simplified Block Diagram

Instruction

MEMORY

CPU

Peripherals

Bus (address - data - I/O)

DataMEMORY

20 © tjEE 1910

Program Execution

• Request Instruction (fetch)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control puts a memory locationon the address bus along with a read signal

1000

read

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

21 © tjEE 1910

Program Execution

• Request Instruction (fetch)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Memory puts the value stored in therequested location on the instruction busand CPU reads it in11

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

22 © tjEE 1910

Program Execution

• Decode Instruction (decode)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control decodes the word returned by the memory and prepares to execute a pre-defined sequence of events

Instruction

MEMORYData

MEMORY

11 → ld R1 4000 (mem location of a)

23 © tjEE 1910

Program Execution

• Read data from memory (Load)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control puts a memory locationon the data address bus along with a read signal

4000

read

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

24 © tjEE 1910

Program Execution

• Read data from memory (Load)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Memory puts the value stored in therequested location on the data busand CPU reads it in

5

Instruction

MEMORYData

MEMORY

R1 51000 111002 121004 27

4000 54004 94008 ??

25 © tjEE 1910

Program Execution

• Request Instruction (fetch)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control puts a memory locationon the address bus along with a read signal

1002

read

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

26 © tjEE 1910

Program Execution

• Request Instruction (fetch)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Memory puts the value stored in therequested location on the instruction busand CPU reads it in12

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

27 © tjEE 1910

Program Execution

• Decode Instruction (decode)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control decodes the word returned by the memory and prepares to execute a pre-defined sequence of events

Instruction

MEMORYData

MEMORY

12 → ld R2 4004 (mem location of b)

28 © tjEE 1910

Program Execution

• Read data from memory (Load)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control puts a memory locationon the data address bus along with a read signal

4004

read

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

29 © tjEE 1910

Program Execution

• Read data from memory (Load)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Memory puts the value stored in therequested location on the data busand CPU reads it in

9

Instruction

MEMORYData

MEMORY

R2 91000 111002 121004 27

4000 54004 94008 ??

30 © tjEE 1910

Program Execution

• Request Instruction (fetch)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control puts a memory locationon the address bus along with a read signal

1004

read

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

31 © tjEE 1910

Program Execution

• Request Instruction (fetch)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Memory puts the value stored in therequested location on the instruction busand CPU reads it in27

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

32 © tjEE 1910

Program Execution

• Decode Instruction (decode)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control decodes the word returned by the memory and prepares to execute a pre-defined sequence of events

Instruction

MEMORYData

MEMORY

27 → add R3, R1, R2

1000 111002 121004 27

4000 54004 94008 ??

33 © tjEE 1910

Program Execution

• Execute Instruction (execute)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

CPU executes the fetched instruction (pre-defined sequence of events)using data from the registers

Instruction

MEMORYData

MEMORY

add R3, R1, R2 → 5 + 9 = 14

34 © tjEE 1910

Program Execution

• Save the result (writeback)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

CPU saves the results back into a register(s)

Instruction

MEMORYData

MEMORY

R3 141000 111002 121004 27

4000 54004 94008 ??

35 © tjEE 1910

Program Execution

• Request Instruction (fetch)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control puts a memory locationon the address bus along with a read signal

1004

read

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

36 © tjEE 1910

Program Execution

• Request Instruction (fetch)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Memory puts the value stored in therequested location on the instruction busand CPU reads it in21

Instruction

MEMORYData

MEMORY

1000 111002 121004 27

4000 54004 94008 ??

37 © tjEE 1910

Program Execution

• Decode Instruction (decode)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control decodes the word returned by the memory and prepares to execute a pre-defined sequence of events

Instruction

MEMORYData

MEMORY

0x21 → st R3 4008 (mem location of c)

38 © tjEE 1910

Program Execution

• Write data to memory (Store)

Peripherals

Common Bus (address - data - I/O)

CPU

Control

ALU

Registers

Control puts the location to storethe result on the address busand the value on the data busand the Memory stores it

4008

write

14

DataMEMORY

Instruction

MEMORY

1000 111002 121004 27

4000 54004 94008 14

39 © tjEE 1910

Memory

• Many Types of memory

• Paper tape

• Cards

• Magnetic Tape

• Floppy Disk

• Hard Drive (Magnetic)

• Optical Drive

• Integrated Circuit Memory

40 © tjEE 1910

Memory

• Integrated Circuit Memory• Non – Volatile• Retains it’s values even when power is removed

• ROM

• NAND and NOR Flash

• EPROM, EEPROM

• Volatile• Loses its values when power is removed

• Static – Retains value without any extra effort• Registers

• SRAM – Static RAM

• Dynamic – Requires periodic refresh or values will degrade• DRAM – Dynamic RAM

• SDRAM – Synchronous DRAM (DDR, DDR2, DDR3, DDR4, … )

41 © tjEE 1910

Memory

• Integrated Circuit Memory

• Minimum storage element• 1 – bit (b)

• Has a logical value of ‘0’ or ‘1’

• Has a physical value of “vdd” or “gnd”• 5v, 3.3v, 2.4v, 1.8v, 1.2v

• Minimum Addressable element• 1 – Byte (B)

• 8 bits

• Logical storage element• Byte

42 © tjEE 1910

Memory

• Integrated Circuit Memory

• Logical configuration

• Long column of bytes

• 1st address is “0”

• Sometimes thought of as growing down

• Sometimes thought of as growing up

8 bits

1 Byte

Addr 0Addr 1Addr 2Addr 3

43 © tjEE 1910

Memory

• Integrated Circuit Memory

• Write

• Provide Address and Data

• Write (addr 3, 01100110)

• Write (addr 7, 11010000)

• Write (addr 9, 00000000)

• Note: Writing overwrites existing data

Addr 0Addr 1Addr 2Addr 3 0 1 1 0 0 1 1 0

1 1 0 1 0 0 0 0

0 0 0 0 0 0 0 0

44 © tjEE 1910

Memory

• Integrated Circuit Memory

• Read

• Provide Address

• Read (addr 3) → 01100110

• Read (addr 7) → 11010000

• Read (addr 8) → ????????

• NOTE: Reading does not destroy the data

Addr 0Addr 1Addr 2Addr 3 0 1 1 0 0 1 1 0

1 1 0 1 0 0 0 0

0 0 0 0 0 0 0 0

45 © tjEE 1910

Memory

• Integrated Circuit Memory

• Addresses

• Addresses are NOT part of the memory array

• Addresses are logic circuits to choose which part of the array to read from or write to

Addr 0Addr 1Addr 2Addr 3 0 1 1 0 0 1 1 0

1 1 0 1 0 0 0 0

0 0 0 0 0 0 0 0

46 © tjEE 1910

Memory

• Integrated Circuit Memory

• Word Alignment

• Processors work with data WORDS

• Size of the internal registers• 1 Byte – 8 bit processor

• 2 Bytes – 16 bit processor

• 4 Bytes – 32 bit processor

• 8 Bytes – 64 bit processor

• Memory is word aligned• Must access the entire word

• Not allowed/possible to access inside a word*

* exceptions exist

47 © tjEE 1910

Memory

• Integrated Circuit Memory• Word Alignment

Addr 0Addr 1Addr 2Addr 3Addr 4Addr 5Addr 6Addr 7Addr 8Addr 9Addr 10

1 Byte word 2 Byte word 4 Byte word

x

x

x

x

x

xxx

xxx

xx

48 © tjEE 1910

Memory

• Integrated Circuit Memory• Big-Endian vs Little-Endian

• data value 0x12345678 in a 4 byte word

Addr 0Addr 1Addr 2Addr 3Addr 4Addr 5Addr 6Addr 7Addr 8Addr 9Addr 10

1 2

3 4

5 6

7 8

Big Endian

xxx

xxx

xx

7 8

5 6

3 4

1 2

Little Endian

xxx

xxx

xx

49 © tjEE 1910

Memory

• Memory Mapped Architecture (embedded)• Treat memories and peripherals the same

• Assign separate memory “spaces” to each type of storage

• Some architectures include registers in memory map

Program Memory(Flash)

Data Memory(SRAM)

Peripheral(A/D)

Peripheral(SPI)

Peripheral(Timer)

Peripheral(I/O Reg)

0x0

0x1FFF FFFF(536,870,911)

0x2000 0000

0x3FFF FFFF(1,073,741,823)

0x4000 0000

0x5FFF FFFF(1,610,612,735)

MSP432 memory map

50 © tjEE 1910

Memory

• Program Memory (embedded)• Flash

• MSP432 – uses 2 Byte words (Thumb)

Exception Vectors

TextExecutable Code

Read Only - Data

Copy of RAMData section

Beginning

EndBoot Loader

Reset, exception, and interrupt actions

Product code

Literals – 3.14159, 1.414, …

Initial values for variables

Code to load the remainder of flashCan be removed for additional space in production

51 © tjEE 1910

Memory

• Data Memory (embedded)• MSP432 uses 4 Byte words

• Has some Byte and Bit level access

Heap

Bss

Data

StackBeginning

End

Statically allocatedassigned by the compiler

non-Zero

Zero

Dynamically allocatedcreated during execution

Executioncreated anddestroyed

Temporaryvalues

52 © tjEE 1910

Peripheral

Reg 2

Reg 1

Reg 0

Reg n

Peripheral

Reg 2

Reg 1

Reg 0

Reg n

Memory

• Peripheral Memory (embedded)• 4 Bytes – 1 bit

Logic and other Hardware

Base address (offset 0)offset 1offset 2

offset n

Peripheral

Reg 2

Reg 1

Reg 0

Reg n

53 © tjEE 1910

Memory

• Program Memory – full disclosure

MSP432 memory map

code memory mapdata memory map