computer organization and architecture computer arithmetic chapter 9
TRANSCRIPT
Computer Organization and Architecture
Computer Arithmetic
Chapter 9
Arithmetic & Logic Unit
• Does the calculations— operands come from registers, result go to
registers
• Everything else in the computer is there to service this unit
• Handles integers• May handle floating point (real) numbers• May be separate FPU (maths co-processor)• May be on-chip separate FPU (486DX +)
ALU Inputs and Outputs
Binary Number Representation
• Only have 0 & 1 to represent everything• Positive numbers stored in binary
—e.g. 4110 = 001010012
— -27.437510 = -11011.01112
• Computer representation:—No minus sign—No decimal point
• Sign-Magnitude• Twos complement
Sign-Magnitude
• Fixed number of digits (8 in example below)• Leftmost (MSB) bit is the sign bit• 0 means positive• 1 means negative• Negation changes only the sign bit, the
others are unchanged• +27 = 00011011• -27 = 10011011• Problems
—Need to consider both sign and magnitude in arithmetic
—Two representations of zero (+0 and -0)—Rarely used
Twos Complement Representation n-2
• A = -2n-1 an-1 + 2i ai
i=0
• +3 = 00000011• +2 = 00000010• +1 = 00000001• +0 = 00000000 (considered positive, sign bit is 0)• -1 = 11111111• -2 = 11111110• -3 = 11111101• Largest positive number in n bits: 0111…1 = 2n-1-1• Smallest negative number is: 1000…0 = - 2n-1
Benefits
• One representation of zero• Arithmetic works easily (see later)• Negating:
—3 = 00000011—Boolean complement gives: 11111100—Add 1 to Boolean complement: 11111101
• Boolean complement is also known as Ones complement
Characteristics of Twos Complement
Geometric Depiction of Twos Complement Integers
Negation - Special Case 1
• 0 = 00000000• Bitwise not 11111111• Add 1 to LSB +1• Result 1 00000000• Overflow is ignored, so:• - 0 = 0
Negation - Special Case 2
• -128 = 10000000• Bitwise not 01111111• Add 1 not +1• Result 10000000• So:• -(-128) = -128 - ERROR• Monitor MSB (sign bit)• It should change during negation
Range of Numbers
• 8-bit twos complement:—+127 = 01111111 = 27 -1— -128 = 10000000 = -27
• 16-bit twos complement:—+32767 = 01111111 11111111 = 215 - 1— -32768 = 10000000 00000000 = -215
• In general, n-bit twos complement has range
-2n-1 to 2n-1-1
Conversion Between Lengths
• Positive numbers pack with leading zeros• +18 = 00010010• +18 = 00000000 00010010• Negative numbers pack with leading ones• -18 = 11101110• -18 = 11111111 11101110• In other words, pack with MSB (sign bit)• Proof in the book; note that the proof uses
n-1
2i = 2n - 1 (prove this by induction)
i=0
Addition and Subtraction
• Normal binary addition• Monitor sign bit for overflow
—Overflow occurs if two numbers with the same sign are added and the result has the opposite sign
—Overflow never occurs adding two numbers of opposite sign
• Take twos compliment of subtrahend and add to minuend :—i.e. a - b = a + (-b)
• Only addition and complement circuits are needed
Hardware for Addition and Subtraction
Multiplication
• Complex• Work out partial product for each digit• Take care with place value (column)• Add partial products• This is known as “positional
multiplication”• Works for unsigned (non-negative)
numbers
Multiplication Example
• 1011 Multiplicand (decimal 11)• x 1101 Multiplier (decimal 13)• 1011 Partial products• 0000 Note: if multiplier bit is 1 copy• 1011 multiplicand (place
value)• 1011 otherwise zero• 10001111 Product (decimal 143)• Note: length of result is double of the
lengths of the operands
Unsigned Binary Multiplication
Flowchart for Unsigned Binary Multiplication
Unsigned Binary Multiplication ExampleQ0
Multiplication Error: Negative Numbers
• Positional multiplication does not work for negative numbers:
• 1011 Multiplicand (decimal -5)• x 1101 Multiplier (decimal -3)• 1011• 0000• 1011• 1011• 10001111 (decimal -113)
Multiplying Negative Numbers
• Need some solution to muliply negative numbers
• Solution 1—Convert to positive if required—Multiply as above—If signs were different, negate answer
• Solution 2—Booth’s algorithm
Booth’s Algorithm
Example of Booth’s Algorithm
Q0 Q-1
Division of Unsigned Binary Integers
• More complex than multiplication• Negative numbers are problematic• Based on long division • Example: 147:11=13, remainder is 4
• Can be extended to negative numbers
001111
1011
00001101
100100111011
0011101011
1011
Quotient
Dividend
Remainder
PartialRemainders
Divisor
100
Flowchart for Unsigned Binary Division
Real Numbers
• Numbers with fractional parts• Possible to represent in pure binary form:
—1001.1010 = 23 + 20 +2-1 + 2-3 =9.625
• Two representations in decimal system• Fixed-point numbers
—Limited to a fixed number of fractional digits—E.g. 3, as in 9.625—Limits accuracy (range)
• Floating-point numbers—Based on scientific notation—E.g. 9,625,000,000,000,000 = 9.625 x 1015
0.00000000000009625 = 9.625 x 10-14
Floating Point Numbers
• +/- .significand x 2exponent
• Base is 2 (binary) instead of 10 (decimal)• Point is actually fixed between sign bit and
body of mantissa• Exponent indicates place value (point
position)
Sig
n bi
t
BiasedExponent
Significand or Mantissa
Signs for Floating Point Numbers
• Mantissa is stored in twos complement• We want to allow negative exponents by
biasing• Exponent is in excess or biased notation• E.g. excess (bias) 127 means
—8 bit exponent field—Pure value range 0-255—Subtract 127 to get correct value—Range -127 to +128
Normalization
• FP numbers are usually normalized• Exponent is adjusted so that leading digit of
mantissa is 1• E.g. instead of 24 = 0.0110 x 26 or 24 = 110 x 22 we use
24 = 1.10 x 24 • Equivalent of scientific notation
—numbers are normalized to give a single digit before the decimal point
• In general: +/- 1.bbb…b x 2+/-E
• Leading 1 is not stored (implicitly assumed)
Floating Point Examples
202 = 10100, 1272 = 01111111, 1472 = 10010011, 1072 = 01101011
0.638125 = 1/2 + 1/8 +1/128 = .10100012
Integer and Floating Point (FP) Ranges
• 32 bit integers— Integers from –231 to 231 (232 different numbers)
• 32 bit floating point real numbers— With 8 bit exponent — – 2129 to 2129, excluding the endpoints and underflows — Approximately -6.8 x 1038 to 6.8 x 1038 decimal
• Precision—The effect of changing LSB of mantissa—23 bit mantissa: 2-23 1.2 x 10-7
—About 6 decimal places – rounding occurs beyond that
• More bits in exponent increase range but reduce mantissa, and thereby precision (trade-off)
Expressible Numbers
Note: 0 is not represented directly. Special conventions are used for 0 (positive and negative), infinity etc. in real FP standards.
Density of Floating Point Numbers
• FP numbers extend the range to – 2129 to 2129 • But still only 232 different numbers can be represented• Numbers are spread out• Density is not even
— higher close to 0— less dense farther away from 0— same number in doubling ranges, i.e. halving density
IEEE 754
• Standard for floating point storage• Single format: 32 bits with 8 bit exponent• Double format: 64 bits with 11 bit exponent• Extended formats (both mantissa and
exponent) for intermediate results—bigger mantissa gives more precision —bigger exponent gives extended range—lessens the chance of intermediate rounding
errors, since generally overflows accumulate in a calculation, resulting in a very wrong result
• Includes positive and negative 0, NaN, normalized and denormalized numbers
IEEE 754 Formats
FP Arithmetic +/-
• Check for zeros (in operands)• Align significands (adjust exponents)
—Operands must have identical exponents for +/-—Smaller number is adjusted for higher precision
• Add or subtract significands—Check for significand and exponent overflow
• Normalize result—Shift significand left until MSB is 1 (i.e. remove
padding 0s)—Check for exponent underflow
• Round result for reporting
FP Addition & Subtraction Flowchart
FP Arithmetic x/• Simpler than +/- due to exponents• Check for zero
—Report error or return infinity on division by 0
• Add/subtract exponents—Adding exponents doubles the bias, so bias
needs to be subtracted—Report exponent over- or underflow
• Multiply/divide significands (watch sign)• Normalize• Round and return result• All intermediate results should be in
double length storage
Floating Point Multiplication
Floating Point Division
Precision and Rounding Errors
• Guard bits: register is longer than the representation—Pad right end of mantissa with 0s—Guard against errors introduced by loss of digits—See book’s example (difference of close numbers)
• IEEE 754 Rounding policy—Round to nearest
– In case of 2 nearest, in half the cases round down, half the cases up to avoid accumulation of systematic errors
—Round toward +/Round toward -– Used in interval arithmetic
—Round toward 0– Simplest (truncation) but introduces systematic errors
IEE754 Special Entities
• Infinity—Limiting cases of real numbers—Operations extended in mathematical sense
• Quiet NaN—Indicates mathematically undefined results;
propagates through calculations w/o throwing an exception
• Signaling NaN—Indicates mathematically undefined results and
signals an exception
• Denormalized Numbers—Handle exponent underflow by right shifting the
decimal point and increasing the exponent