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Compiler Compiler Construction Construction Dr. Naveed Ejaz Lecture 4

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Page 1: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

Compiler Compiler ConstructionConstruction

Compiler Compiler ConstructionConstruction

Dr. Naveed Ejaz

Lecture 4

Page 2: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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The Back EndThe Back EndThe Back EndThe Back End

Register Allocation: Have each value in a register

when it is used.

Instructionselection

IR machine code

errors

Registerallocation

Instructionscheduling

IR IR

Page 3: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

3

The Back EndThe Back EndThe Back EndThe Back End

Register Allocation: Manage a limited set of

resources – register file.

Instructionselection

IR machine code

errors

Registerallocation

Instructionscheduling

IR IR

Page 4: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

4

The Back EndThe Back EndThe Back EndThe Back End

Register Allocation: Can change instruction choices

and insert LOADs and STOREs.

Instructionselection

IR machine code

errors

Registerallocation

Instructionscheduling

IR IR

Page 5: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

5

The Back EndThe Back EndThe Back EndThe Back End

Register Allocation: Optimal register allocation is

NP-Complete.

Instructionselection

IR machine code

errors

Registerallocation

Instructionscheduling

IR IR

Page 6: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

6

The Back EndThe Back EndThe Back EndThe Back End

Instruction Scheduling: Avoid hardware stalls and

interlocks.

Instructionselection

IR machine code

errors

Registerallocation

Instructionscheduling

IR IR

Page 7: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

7

The Back EndThe Back EndThe Back EndThe Back End

Instruction Scheduling: Use all functional units

productively.

Instructionselection

IR machine code

errors

Registerallocation

Instructionscheduling

IR IR

Page 8: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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The Back EndThe Back EndThe Back EndThe Back End

Instruction Scheduling: Optimal scheduling is

NP-Complete in nearly all cases.

Instructionselection

IR machine code

errors

Registerallocation

Instructionscheduling

IR IR

Page 9: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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Three-pass CompilerThree-pass CompilerThree-pass CompilerThree-pass Compiler

Intermediate stage for code improvement or optimization

FrontEnd

Sourcecode

machine code

errors

MiddleEnd

BackEnd

IR IR

Page 10: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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Three-pass CompilerThree-pass CompilerThree-pass CompilerThree-pass Compiler

Analyzes IR and rewrites (or transforms) IR

FrontEnd

Sourcecode

machine code

errors

MiddleEnd

BackEnd

IR IR

Page 11: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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Three-pass CompilerThree-pass CompilerThree-pass CompilerThree-pass Compiler

Primary goal is to reduce running time of the compiled code

FrontEnd

Sourcecode

machine code

errors

MiddleEnd

BackEnd

IR IR

Page 12: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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Three-pass CompilerThree-pass CompilerThree-pass CompilerThree-pass Compiler

May also improve space usage, power consumption, ...

FrontEnd

Sourcecode

machine code

errors

MiddleEnd

BackEnd

IR IR

Page 13: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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Three-pass CompilerThree-pass CompilerThree-pass CompilerThree-pass Compiler

Must preserve “meaning” of the code.

Measured by values of named variables

FrontEnd

Sourcecode

machine code

errors

MiddleEnd

BackEnd

IR IR

Page 14: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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OptimizerOptimizerOptimizerOptimizer

Modern optimizers are structured as a series of passes

Opt1

IR IR

errors

Opt2

Optn

IR IR Opt3

IR

Page 15: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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OptimizerOptimizerOptimizerOptimizer

Typical transformations Discover & propagate some

constant value

Opt1

IR IR

errors

Opt2

Optn

IR IR Opt3

IR

Page 16: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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OptimizerOptimizerOptimizerOptimizer

Typical transformations Move a computation to a less

frequently executed place

Opt1

IR IR

errors

Opt2

Optn

IR IR Opt3

IR

Page 17: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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OptimizerOptimizerOptimizerOptimizer

Typical transformations Specialize some computation

based on context

Opt1

IR IR

errors

Opt2

Optn

IR IR Opt3

IR

Page 18: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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OptimizerOptimizerOptimizerOptimizer

Typical transformations Discover a redundant

computation & remove it

Opt1

IR IR

errors

Opt2

Optn

IR IR Opt3

IR

Page 19: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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OptimizerOptimizerOptimizerOptimizer

Typical transformations Remove useless or

unreachable code

Opt1

IR IR

errors

Opt2

Optn

IR IR Opt3

IR

Page 20: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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OptimizerOptimizerOptimizerOptimizer

Typical transformations Encode an idiom in some

particularly efficient form

Opt1

IR IR

errors

Opt2

Optn

IR IR Opt3

IR

Page 21: Compiler Construction Dr. Naveed Ejaz Lecture 4. 2 The Back End Register Allocation:  Have each value in a register when it is used. Instruction selection

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