compiler back end panel
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Compiler Back End Panel. Robert Geva Intel Compiler Lab. Back End Compiler Panel. 1) Are compiler code generation techniques going to transition along with the hardware transition from multi-core to many-core and hybrid systems and at what speed? - PowerPoint PPT PresentationTRANSCRIPT
Majumdar, Sutanu Majumdar, Sutanu
Compiler Back End Panel
Robert Geva Intel Compiler Lab
Back End Compiler PanelBack End Compiler Panel1) Are compiler code generation techniques going to transition along with the hardware transition from multi-core to many-core and hybrid systems and at what speed?
2) What information do you need from a Compiler Intermediate Format to efficiently utilize multi-core, many-core and hybrid systems that is not available from traditional languages like C, C++, or F90? Are you looking at directive-based or library-based approaches or is there another approach that you like?
3) Is embedded global memory addressing (like Co-Array Fortran) to be widely available and supported even on distributed memory systems?
4) What kind of hybrid systems or processor extensions are going to be supported by your compiler's code generation suite?
5) What new run-time libraries will be available to utilize multi-core, many-core, and hybrid systems and will they work seamlessly through dynamic linking?
1) Are compiler code generation techniques going to transition along with the hardware transition from multi-core to many-core and hybrid systems and at what speed?
2) What information do you need from a Compiler Intermediate Format to efficiently utilize multi-core, many-core and hybrid systems that is not available from traditional languages like C, C++, or F90? Are you looking at directive-based or library-based approaches or is there another approach that you like?
3) Is embedded global memory addressing (like Co-Array Fortran) to be widely available and supported even on distributed memory systems?
4) What kind of hybrid systems or processor extensions are going to be supported by your compiler's code generation suite?
5) What new run-time libraries will be available to utilize multi-core, many-core, and hybrid systems and will they work seamlessly through dynamic linking?
Copyright © 2006, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners
Software and Solutions Group
Are compiler code generation techniques going to transition along with the hardware transition from multi-core to many-core and hybrid systems and at what speed?
04/19/20233
JIT compilingCt: Research technology fora data parallel language
Forward scaling to future architectures
Save costly memory copyingby delayed code generation
Multipletargets
Validation
Copyright © 2006, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners
Software and Solutions Group
Are you looking at directive-based or library-based approaches or is there another approach that you like
04/19/20234
Here’s my code
Is “limit” loop invariant?
Needs
more work
Interactive Compiler technology to Guide the programmer to write serial codewith directives and restructuring, leading to automatic parallelism
Copyright © 2006, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners
Software and Solutions Group
Is embedded global memory addressing (like Co-Array Fortran) to be widely available and supported even on distributed memory systems?
04/19/20235
•Minimize changes to programming practices •Use familiar concepts, existing programming languages, integrate into advanced platform technologies
Goals
•Data parallel language: Start programming from data parallelism perspective, use array notations. Tool chain will transform and target a CPU and Larrabee combination•Offload language: Start with task parallelism, and use directives to offload computation
Solutions
Copyright © 2006, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners
Software and Solutions Group
What kind of hybrid systems or processor extensions are going to be supported by your compiler's code generation suite?
04/19/20236
LRB new instructions512 widthMasked operations Broadcasts, swizzles
Existing SIMDSSE, SSE2, SSE3, SSE4
Advanced Vector eXtensions256 width3 operand, non destructiveEnhanced data re-arrangement
Copyright © 2006, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners
Software and Solutions Group
What new run-time libraries will be available to utilize multi-core, many-core, and hybrid systems and will they work seamlessly through dynamic linking?
Resource coordination and task scheduling
http://channel9.msdn.com/pdc2008/TL22/
Generic algorithms, equivalent to language extensions
Domain specific libraries
Including math libraries
New domains, natural language processing, gesture recognition
DLL hell? No good news
04/19/20237