class notes digital lec04

8/7/2019 Class Notes Digital Lec04

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May 23, 2010

`~ivjvcbx twc,G,we,G, 9661920-73/4980

dwjZ c`v_wevb, BjKUwbIKwgDwbKkb Bwwbqvwis wefvMXvKv wekwe`vjqXvKv-1000, evsjv`k

Telephone :

PABX : 9661920-73/4980

DEPT. OF APPLIED PHYSICS, ELECTRONICS &

COMMUNICATION ENGINEERING

UNIVERSITY OF DHAKA

DHAKA-1000, BANGLADESH

FAX: 880-2-8615583

E-MAIL: [email protected]

Ref. No............................ Dated, the.

In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)

Magnitude Comparator:A magnitude comparator is a combinational circuit that compares two given numbers and determines whether one isequal to, less than or greater than the other. The output is in the form of three binary variables representing theconditions A=B, A>B and AB and(II) if Ai=0 and Bi=1 then AB and A


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May 23, 2010

`~ivjvcbx twc,G,we,G, 9661920-73/4980


Telephone :

PABX : 9661920-73/4980



UNIVERSITY OF DHAKA


FAX: 880-2-8615583


Ref. No............................ Dated, the.


iiiiiBABAxwherexxxxX ..... 0123 +==

00123112322333 .......... BAxxxBAxxBAxBAY +++=

00123112322333 .......... BAxxxBAxxBAxBAZ +++=

x3 will be 1 only when both A3 and B3 are equal. Similarly, conditions for x2, x1 and x0 to be 1 respectively are equalA2 and B2, equal A1 and B1, and equal A0 and B0. ANDing of x3, x2, x1 and x0 ensures that X will be 1 when x3, x2, x1and x0 are in the logic 1 state. Thus, X=1 means that A=B.Similarly, Y=1 means that A>B and Z=1 means AB IAB OAB3 X X X X X X H L LA3B2 X X X X X H L LA3=B3 A2B1 X X X X H L LA3=B3 A2=B2 A1B0 X X X H L LA3=B3 A2=B2 A1=B1 A0B OAB

IA


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May 23, 2010

`~ivjvcbx twc,G,we,G, 9661920-73/4980


Telephone :

PABX : 9661920-73/4980



UNIVERSITY OF DHAKA


FAX: 880-2-8615583


Ref. No............................ Dated, the.


(I) output OA>B will be HIGH when the magnitude of word A is greater than the magnitude of word B,(II) output OAB and AB7 then irrespective of the status of other bits ofthe more significant comparator, and also regardless of the status of its cascading inputs, the final output produces aHIGH at the A>B output and a LOW at the AB7 regardless of thestatus of all other comparison bits.Similarly, the circuit produces a valid output for any given status of comparison bits.

OA>B OAB

IAB OAB

IA


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May 23, 2010

`~ivjvcbx twc,G,we,G, 9661920-73/4980


Telephone :

PABX : 9661920-73/4980



UNIVERSITY OF DHAKA


FAX: 880-2-8615583


Ref. No............................ Dated, the.

In case of any query or suggestion please contact Sazzad Lecturer APECE DU (url: sazzadmsi webs com)

Parity Generator and Checker:A parity bit is a bit that is added to ensure that the number of bits with the value one in a set of bits is even or odd.Parity bits are used as the simplest form of error detecting code.

Fig.: XOR gates used to implement the parity generator and parity checker for an even parity system.The set of data to be transmitted is applied to the parity-generator circuit, which produces the even-parity bit, P, at itsoutput. This parity bit is transmitted to the receiver along with the original data bits, making a total of five bits.These five bits enter the receivers parity-checker circuit, which produces an error output, E, that indicates whether ornot a single-bit error has occurred.[Ref.: Digital Systems Principles and Applications, R.J. Tocci and N.S. Widmer]

D3

D2

D1

D0

Originaldata

Even-parity generator

Parity (P)

Transmitteddata with

parity bit

D3

D2

D1

D0

Fromtransmitter

Even-parity checker

PError (E)(1=error

0=no error)

Lec-04, Pg-04

class notes digital lec04

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