class 2: the fundamentals of designing with semiconductors
DESCRIPTION
Design with Operational Amplifiers, also known as Op AmpsTRANSCRIPT
The World Leader in High Performance Signal Processing Solutions
THE FUNDAMENTALS OF DESIGNING WITH SEMICONDUCTORS FOR SIGNAL
PROCESSING APPLICATIONS
Class 2 - THE OP AMP
Presented by David Kress
Analog to Electronic signal processing
Sensor(INPUT)
Digital ProcessorAmp Converter
Actuator(OUTPUT)
Amp Converter
Analog to Electronic signal processing
Sensor(INPUT)
Digital ProcessorAmp Converter
Actuator(OUTPUT)
Amp Converter
Amplifiers and Operational AmplifiersAmplifiers
Make a low-level, high-source impedance signal into a high-level, low-source impedance signal
Op amps, power amps, RF amps, instrumentation amps, etc.Most complex amplifiers built up from combinations of op
ampsOperational amplifiers
Three-terminal device (plus power supplies)Amplify a small signal at the input terminals to a very, very
large one at the output terminal
Operational Amplifiers
OperationalOp amps can be configured with feedback networks in multiple
ways to perform ‘operations’ on input signals‘Operations’ include positive or negative gain, filtering, nonlinear
transfer functions, comparison, summation, subtraction, reference buffering, differential amplification, integration, differentiation, etc.
ApplicationsFundamental building block for analog designSensor input amplifierSimple and complex filters – anti-aliasingADC driver
Original vacuum-tube op-amp from Philbrick Research in 1953 – it used +/- 300V supplies
0.1 in
(ALL PACKAGES ABOVE TO SAME SCALE)
8-SOICmSOIC
MSOP8SOT-23SC-70 14-SOIC
SOT-23SC-70
THE RELATIVE SCALE OF SOME MODERN IC OP AMP PACKAGES
AD823 JFET Input Op Amp Simplified Schematic
INPUTS
+VS
-VS
Q57A=19
Q44A=1
Q43
Q58
Q62
R44
S1NS1P
VB
Q49Q61Q72J6J1
Q48
Q35Q53
I1 Q56
Q59A=1
Q17A=19
OUTPUTQ60
R28
(-)
(+)
VBE + 0.3V
BIAS CURRENT = 25pA MAX @ +25°CINPUT OFFSET VOLTAGE = 0.8mV MAX @ +25°CINPUT VOLTAGE NOISE = 15nV/HzINPUT CURRENT NOISE = 1fA/Hz
1-9
Standard op amp symbol
INPUTS
(+)
(-)
INPUTS
(+)
(-)
The Ideal Op Amp and its Attributes
OP AMP
OP AMP INPUTS:
OP AMP OUTPUT:
High Input Impedance Low Bias Current Respond to Differential Mode Voltages Ignore Common Mode Voltages
Low Source Impedance
IDEAL OP AMP ATTRIBUTES: Infinite Differential Gain Zero Common Mode Gain Zero Offset Voltage Zero Bias Current
OUTPUT
POSITIVE SUPPLY
NEGATIVE SUPPLY
INPUTS
(+)
(-)
Operational Amplifier Circuit Design
Use of negative feedbackThe output signal, or a controlled portion of it, is fed back to the
negative (-) input terminalThe op amp will adjust the output signal until the input difference
goes to zeroExample of high-gain
Assume op amp gain of 106 (one million)Apply signal of one volt to positive inputFeedback directly from output to negative inputOutput will go to one volt (minus one microvolt)Difference at input will be on microvolt
Key Op Amp Performance Features
Bandwidth and slew rateThe speed of the op ampBandwidth is the highest operating frequency of the op ampSlew rate is the maximum rate of change of the outputDetermined by the frequency of the signal and the gain needed
Offset voltage and currentThe errors of the op ampDetermines measurement accuracy
NoiseOp amp noise limits how small a signal can be amplified with good
fidelity
1-13
Non-inverting Mode Op Amp Stage
VINVOUT
OP AMP
RF
RG
G = VOUT/VIN
= 1 + (RF/RG)
1-14
Inverting Mode Op Amp Stage
VIN
= - RF/RG
VOUT
OP AMP
RFRG
G = VOUT/VIN
SUMMING POINT
1-15
Non-Inverting Amplifier gain
RFB
R IN
G =OUT
V IN
V
= 1+RFB
R IN
G =OUT
V IN
V
= 1+RFB
R IN
G =OUT
V IN
V
= 1+VIN
VOUT
RFB
RIN
IVIN
VOUT
RFB
RIN
I
Single Pole Op Amp Active Filters
(A)LOWPASS
(B)HIGHPASS
+
-+
-
5-38
1-17
Open Loop Gain (Bode Plot)
OPENLOOPGAINdB
OPENLOOPGAINdB
6dB/OCTAVE6dB/OCTAVE
12dB/OCTAVE
OPENLOOPGAINdB
OPENLOOPGAINdB
6dB/OCTAVE6dB/OCTAVE
12dB/OCTAVE
1-18
Gain-Bandwidth Product
GAINdB OPEN LOOP GAIN, A(s)
IF GAIN BANDWIDTH PRODUCT = XTHEN Y · fCL = X
fCL =XY
WHERE fCL = CLOSED-LOOPBANDWIDTH
LOG ffCL
NOISE GAIN = Y
Y = 1 +R2
R1
GAINdB OPEN LOOP GAIN, A(s)
IF GAIN BANDWIDTH PRODUCT = XTHEN Y · fCL = X
fCL =XY
WHERE fCL = CLOSED-LOOPBANDWIDTH
LOG ffCL
NOISE GAIN = Y
Y = 1 +R2
R1
1-19
Noise Gain
+
-
IN +
-
+
-
A B C
R1
R2 IN
R1
R2R2
R1
IN
Signal Gain = 1 + R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = - R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = - R2/R1
Noise Gain = 1 + R2
R1 R3
Voltage Noise and Offset Voltage of the op amp are reflected to the output by the Noise Gain.
Noise Gain, not Signal Gain, is relevant in assessing stability.
Circuit C has unchanged Signal Gain, but higher Noise Gain, thusbetter stability, worse noise, and higher output offset voltage.
IN
A B C
R1
R2 IN
R1
R2R2
R1
IN
Signal Gain = 1 + R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = R2/R1
Noise Gain = 1 + R2/R1
Signal Gain =
Noise Gain = 1 + R2
+
-
IN +
-
+
-
A B C
R1
R2 IN
R1
R2R2
R1
IN
Signal Gain = 1 + R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = - R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = - R2/R1
Noise Gain = 1 + R2
R1 R3
IN
A B C
R1
R2 IN
R1
R2R2
R1
IN
Signal Gain = 1 + R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = R2/R1
Noise Gain = 1 + R2/R1
Signal Gain =
Noise Gain = 1 + R2
+
-
IN +
-
+
-
A B C
R1
R2 IN
R1
R2R2
R1
IN
Signal Gain = 1 + R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = - R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = - R2/R1
Noise Gain = 1 + R2
R1 R3
Voltage Noise and Offset Voltage of the op amp are reflected to the output by the Noise Gain.
Noise Gain, not Signal Gain, is relevant in assessing stability.
Circuit C has unchanged Signal Gain, but higher Noise Gain, thusbetter stability, worse noise, and higher output offset voltage.
IN
A B C
R1
R2 IN
R1
R2R2
R1
IN
Signal Gain = 1 + R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = R2/R1
Noise Gain = 1 + R2/R1
Signal Gain =
Noise Gain = 1 + R2
+
-
IN +
-
+
-
A B C
R1
R2 IN
R1
R2R2
R1
IN
Signal Gain = 1 + R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = - R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = - R2/R1
Noise Gain = 1 + R2
R1 R3
IN
A B C
R1
R2 IN
R1
R2R2
R1
IN
Signal Gain = 1 + R2/R1
Noise Gain = 1 + R2/R1
Signal Gain = R2/R1
Noise Gain = 1 + R2/R1
Signal Gain =
Noise Gain = 1 + R2
1-20
AD847 Open Loop Gain
1-21
AD8051 Phase Margin
1-22
VFB and CFB Amplifiers
~
+
–
v–A(s) v
A(s) = OPEN LOOP GAINVOUT = A(s)*v
R2
R1
VIN +
–i
–T(s) i
T(s)
RO
i×1
R2R1
VIN
VOUT×1
T(s) = TRANSIMPEDANCE OPEN LOOP GAINVOUT = -T(s)*i
VOUT~
+
–
v–A(s) v
A(s) = OPEN LOOP GAINVOUT = A(s)*v
R2
R1
VIN +
–i
–T(s) i
T(s)
RO
i×1
R2R1
VIN
VOUT×1
T(s) = TRANSIMPEDANCE OPEN LOOP GAINVOUT = -T(s)*i
VOUT
1-23
Current Feedback Amplifier Frequency Response
Feedback resistor fixed for optimum performance. Larger values reduce bandwidth, smaller values may cause instability.
For fixed feedback resistor, changing gain has little effect on bandwidth.
Current feedback op amps do not have a fixed gain-bandwidth product.
GAINdB G1
G2
G1 · f1 G2 · f2
f1 f2 LOG f
Feedback resistor fixed for optimum performance. Larger values reduce bandwidth, smaller values may cause instability.
For fixed feedback resistor, changing gain has little effect on bandwidth.
Current feedback op amps do not have a fixed gain-bandwidth product.
GAINdB G1
G2
G1 · f1 G2 · f2
f1 f2 LOG f
GAINdB G1
G2
G1 · f1 G2 · f2
f1 f2 LOG f
1-24
Standard Input Stage (Differential Pair)
VINVIN
1-25
PNP Input Stage
+VS
-VS
+VS
-VS
1-26
Compound Input Stage
+VS
-VS
+VS
-VS
1-27
Output Stages. Emitter Follower for Standard Configuration And Common Emitter for “Rail-to-Rail” Configuration
+VS
EMITTER FOLLOWER COMMON EMITTER
+VS
-VS -VS
OUTPUT OUTPUT
INPUT OFFSET VOLTAGE
Offset Voltage: The differential voltage which must be applied to the input of an op amp to produce zero output.
Ranges: Chopper Stabilized Op Amps: <1µV General Purpose Precision Op Amps: 50-500µV Best Bipolar Op Amps: 10-25µV Best FET Op Amps: 100-1,000µV High Speed Op Amps: 100-2,000µV Untrimmed CMOS Op Amps: 5,000-50,000µV DigiTrim™ CMOS Op Amps: <1,000µV
-
+
VOS
1-29
Offset Adjustment Pins
-
+
2
3
1
87
4
6
+VS OR -VS +VS
-VS
-
+
2
3
1
87
4
6
+VS OR -VS +VS
-VS
1-30
External Offset Adjustment
VOUT = – R2R1
VIN ± R2R3
VR
MAXOFFSET
VOUT = – R2R1
VIN ± 1 + R2R1
RPRP + R3
VR
MAXOFFSET
RP = R1||R2 IF IB+ IB-
RP 50 IF IB+ IB-
–
+
(A)
VIN
VOUT
R1
R2
R3
+VR–VR
RA RB
NOISE GAIN =
R2R1||(R3 + RA||RB)
1 +
–
+
(B)
VIN
VOUT
R1
R2
R3RP
+VR–VR
RBRA
NOISE GAIN =R2R1
1 +
VOUT = – R2R1
VIN ± R2R3
VR
MAXOFFSET
VOUT = – R2R1
VIN ± R2R3
VR
MAXOFFSET
VOUT = – R2R1
VIN ± 1 + R2R1
RPRP + R3
VR
MAXOFFSET
RP = R1||R2 IF IB+ IB-
RP 50 IF IB+ IB-
VOUT = – R2R1
VIN ± 1 + R2R1
RPRP + R3
RPRP + R3
VR
MAXOFFSET
RP = R1||R2 IF IB+ IB-
RP 50 IF IB+ IB-
–
+
(A)
VIN
VOUT
R1
R2
R3
+VR–VR
RA RB
NOISE GAIN =
R2R1||(R3 + RA||RB)
1 +
–
+
(A)
VIN
VOUT
R1
R2
R3
+VR–VR
RA RB
NOISE GAIN =
R2R1||(R3 + RA||RB)
1 +
–
+
(B)
VIN
VOUT
R1
R2
R3RP
+VR–VR
RBRA
NOISE GAIN =R2R1
1 +
–
+
(B)
VIN
VOUT
R1
R2
R3RP
+VR–VR
RBRA
NOISE GAIN =R2R1
1 +
1-31
Input Bias Current
+IB+
IB-
+IB+
IB-
+IB+
IB-
+IB+
IB-
1-32
Bias Current Compensation
–
+
VO
R1
R2
R3 = R1 || R2
IB–
IB+
VO = R2 (IB– – IB+)
= R2 IOS
= 0, IF IB+ = IB–
NEGLECTING VOS
–
+
VO
R1
R2
R3 = R1 || R2
IB–
IB+
–
+
VO
R1
R2
R3 = R1 || R2
IB–
IB+
VO = R2 (IB– – IB+)
= R2 IOS
= 0, IF IB+ = IB–
NEGLECTING VOS
1-33
Total Offset Voltage Calculations
OFFSET (RTO) = VOS 1 + R2R1 + IB+• R3
R2R11 + – IB–• R2
OFFSET (RTI ) = VOS + IB+• R3 – IB–R1•R2
R1 + R2
FOR BIAS CURRENT CANCELLATION:
OFFSET (RTI) = VOS IF IB+ = IB– AND R3 = R1•R2
R1 + R2
NOISE GAIN =
1 + R2
R1NG =
GAIN FROM "A" TO OUTPUT
=
GAIN FROM"B" TO OUTPUT
= –R2
R1
–
+
VOS
R2R1
R3
IB–
IB+
VOUTA
B
–
+
VOS
R2R1
R3
IB–
IB+
VOUTA
B
OFFSET (RTO) = VOS 1 + R2R1 + IB+• R3
R2R11 + – IB–• R2 OFFSET (RTO) = VOS 1 + R2
R1 + IB+• R3R2R11 + – IB–• R2
OFFSET (RTI ) = VOS + IB+• R3 – IB–R1•R2
R1 + R2 OFFSET (RTI ) = VOS + IB+• R3 – IB–
R1•R2R1 + R2
FOR BIAS CURRENT CANCELLATION:
OFFSET (RTI) = VOS IF IB+ = IB– AND R3 = R1•R2
R1 + R2
FOR BIAS CURRENT CANCELLATION:
OFFSET (RTI) = VOS IF IB+ = IB– AND R3 = R1•R2
R1 + R2
NOISE GAIN =
1 + R2
R1NG =
GAIN FROM "A" TO OUTPUT
=
NOISE GAIN =
1 + R2
R1NG =
GAIN FROM "A" TO OUTPUT
=
GAIN FROM"B" TO OUTPUT
= –R2
R1GAIN FROM
"B" TO OUTPUT= –
R2
R1
–
+
VOS
R2R1
R3
IB–
IB+
VOUTA
B
–
+
VOS
R2R1
R3
IB–
IB+
VOUTA
B
1-34
Input Impedance
IB+ IB–
Zdiff
Zcm+Zcm–
– INPUT+ INPUT
IB+ IB–
Zdiff
Zcm+Zcm–
– INPUT+ INPUT
1-35
Current Feedback Input Resistance
X1
Z+
+INPUT - INPUT
Z-
X1
Z+
+INPUT - INPUT
Z-
1-36
Voltage Noise
VN
–
+
VN
–
+
VN
–
+
VN
–
+
VN
–
+
VN
–
+
VN
–
+
1-37
Equivalent Noise Bandwidth
GAUSSIANNOISE
SOURCE
GAUSSIANNOISE
SOURCE
SINGLE POLELOWPASSFILTER, fC
BRICK WALLLOWPASS
FILTER, 1.57fC
IDENTICAL LEVELSSAME
RMS NOISELEVEL
EQUIVALENT NOISE BANDWIDTH = 1.57 fC
GAUSSIANNOISE
SOURCE
GAUSSIANNOISE
SOURCE
SINGLE POLELOWPASSFILTER, fC
BRICK WALLLOWPASS
FILTER, 1.57fC
IDENTICAL LEVELSSAME
RMS NOISELEVEL
EQUIVALENT NOISE BANDWIDTH = 1.57 fC
1-38
Current Noise
IN–
-
+IN+
IN–
-
+IN+
IN–
-
+IN+
IN–
-
+IN+
1-39
Total Noise Calculation
FCL = CLOSED LOOP BANDWIDTH
R1
VON
Rp
In-
In+
R2
Vn
VR2J
VR1J
VRPJ
+
= BW [(In-2)R22] [NG] + [(In+2)RP
2] [NG] + VN2 [NG] + 4kTR2 [NG-1] + 4kTR1 [NG-1] + 4kTRP [NG]VON
BW = 1.57 FCL
FCL = CLOSED LOOP BANDWIDTH
R1
VON
Rp
In-
In+
R2
Vn
VR2J
VR1J
VRPJ
+
R1
VON
Rp
In-
In+
R2
Vn
VR2J
VR1J
VRPJ
+
= BW [(In-2)R22] [NG] + [(In+2)RP
2] [NG] + VN2 [NG] + 4kTR2 [NG-1] + 4kTR1 [NG-1] + 4kTRP [NG]VON = BW [(In-2)R2
2] [NG] + [(In+2)RP2] [NG] + VN
2 [NG] + 4kTR2 [NG-1] + 4kTR1 [NG-1] + 4kTRP [NG]VON
BW = 1.57 FCL
1-40
Dominant Noise Source Determined by Input Impedance
CONTRIBUTIONFROM
AMPLIFIERVOLTAGE NOISE
AMPLIFIERCURRENT NOISE
FLOWING IN R
JOHNSONNOISE OF R
VALUES OF R
0 3k 300k
3 3 3
0
0
3
7
300
70
RTI NOISE (nV / Hz)
Dominant Noise Source is Highlighted
R
+
–
EXAMPLE: OP27Voltage Noise = 3nV / HzCurrent Noise = 1pA / HzT = 25°C
OP27
R2R1
Neglect R1 and R2Noise Contribution
CONTRIBUTIONFROM
AMPLIFIERVOLTAGE NOISE
AMPLIFIERCURRENT NOISE
FLOWING IN R
JOHNSONNOISE OF R
VALUES OF R
0 3k 300k
3 3 3
0
0
3
7
300
70
RTI NOISE (nV / Hz)
Dominant Noise Source is Highlighted
R
+
–
EXAMPLE: OP27Voltage Noise = 3nV / HzCurrent Noise = 1pA / HzT = 25°C
OP27
R2R1
Neglect R1 and R2Noise Contribution
1-41
1/f Noise Bandwidth
1/f Corner Frequency is a figure of merit for op amp noise performance (the lower the better)
Typical Ranges: 2Hz to 2kHz
Voltage Noise and Current Noise do not necessarily have the same 1/f corner frequency
3dB/Octave
WHITE NOISE
LOG f
CORNER1f
NOISEnV / Hz
orHz
en, in
k
FC
k FC1f
en, in =3dB/Octave
WHITE NOISE
LOG f
CORNER1f
NOISEnV / Hz
orpA / Hz
en, in
k
FC
k FC1f
en, in =
1/f Corner Frequency is a figure of merit for op amp noise performance (the lower the better)
Typical Ranges: 2Hz to 2kHz
Voltage Noise and Current Noise do not necessarily have the same 1/f corner frequency
3dB/Octave
WHITE NOISE
LOG f
CORNER1f
NOISEnV / Hz
orHz
en, in
k
FC
k FC1f
en, in =3dB/Octave
WHITE NOISE
LOG f
CORNER1f
NOISEnV / Hz
orpA / Hz
en, in
k
FC
k FC1f
en, in =
1-42
RMS to Peak to Peak Voltage Comparison Chart
1-43
The Peak-to-Peak Noise in the 0.1 Hz. to 10 Hz. Bandwidth
1-44
Resistor Noise
V NR R V NR R
ALL resistors have a voltage noise of V NR = 4kTBR)
T = Absolute Temperature = T ( ° C) + 273.15
B = Bandwidth (Hz)
k = Boltzmann ’ s Constant (1.38 x 10 - 23 J/K)
A 1000 resistor generates 4 nV / Hz @ 25 ° C
V NR R V NR R
ALL resistors have a voltage noise of V = 4kTBR)
° C) + 273.15
B = Bandwidth (Hz)
k = Boltzmann ’ s - 23 J/K)
A 1000 Hz @ 25 ° C
1-45
THD & THD+N Definitions
Vs = Signal Amplitude (RMS Volts)
V2 = Second Harmonic Amplitude (RMS Volts)
Vn = nth Harmonic Amplitude (RMS Volts)
Vnoise = RMS value of noise over measurement bandwidth
THD + N =
THD =
Vs
Vs
V22 + V3
2 + V42 + . . . + Vn
2 + Vnoise2
V22 + V3
2 + V42 + . . . + Vn
2
1-46
Slew Rate
10%
90%FINAL VALUE
OVERSHOOT
RINGING
VO
LT
AG
E
TIME
10%
OVERSHOOT
RINGING
10%
SLEW RATE =
OVERSHOOT
RINGING
VO
LT
AG
E
TIME
V
T
VT
10%
90%FINAL VALUE
OVERSHOOT
RINGING
VO
LT
AG
E
TIME
10%
OVERSHOOT
RINGING
10%
SLEW RATE =
OVERSHOOT
RINGING
VO
LT
AG
E
TIME
V
T
VT
1-47
Slew Rate and Full Power Bandwidth
Slew Rate = Maximum rate at which the output voltage of
Ranges: A few volts / s to several thousand volts / s
For a sinewave, Vout = Vpsin2 f t
If 2 V p = full output span of op amp, then
an op amp can change
dV/dt = 2π f Vp cos 2π f t
(dV/dt)max = 2fVp
Slew Rate = (dV/dt)max = 2 * FPBW * Vp
FPBW = Slew Rate / 2Vp
Slew Rate = Maximum rate at which the output voltage of
Ranges: A few volts / s to several thousand volts / s
For a sinewave, Vout = Vpsin2 f t
If 2 V pIf 2 V p = full output span of op amp, then
an op amp can change
dV/dt = 2π f Vp cos 2π f t
(dV/dt)max = 2fVp
Slew Rate = (dV/dt)max = 2 * FPBW * Vp
FPBW = Slew Rate / 2Vp
1-48
Settling Time
OUTPUT
ERROR
BAND
FINAL
SETTLING
RECOVERY
TIME
SLEW
TIME
DEAD
TIME
SETTLING TIME
OUTPUT
ERROR
BAND
FINAL
SETTLING
RECOVERY
TIME
SLEW
TIME
DEAD
TIME
SETTLING TIME
Error band is usually defined to be a percentage of the step 0.1%0.05%, 0.01%, etc.
Settling time is non-linear; it may take 30 times as long to settle to0.01% as to 0.1%.
Manufacturers often choose an error band which makes the op amp look good.
1-49
Common Mode Rejection Ratiofor the OP177
160
140
120
100
80
60
40
20
0
CMRdB
FREQUENCY - Hz
CMR =20 log10 CMRR
0.01 0.1 1 10 100 1k 10k 100k 1M
160
140
120
100
80
60
40
20
0
CMRdB
FREQUENCY - Hz
CMR =20 log10 CMRR
0.01 0.1 1 10 100 1k 10k 100k 1M
1-50
Power Supply Rejection Ratio
0.01 0.1 1 10 100 1k 10k 100k 1M
160
140
120
100
80
60
40
20
0
PSRdB
FREQUENCY - Hz
PSR =20 log10 PSRR
0.01 0.1 1 10 100 1k 10k 100k 1M
160
140
120
100
80
60
40
20
0
PSRdB
FREQUENCY - Hz
PSR =20 log10 PSRR
1-51
Maximum Power Chart (from the AD8001)
1-52
Input Protection
+VS
-VS
RS
+
-
+VS
-VS
RS
+
-
1-53
Typical Absolute Maximum Ratings
Single-Supply Op Amps Single Supply Offers:
Lower Power Battery Operated Portable Equipment Requires Only One Voltage
Design Tradeoffs: Reduced Signal Swing Increases Sensitivity to Errors
Caused by Offset Voltage, Bias Current, Finite Open-
Loop Gain, Noise, etc. Must Usually Share Noisy Digital Supply Rail-to-Rail Input and Output Needed to Increase Signal
Swing Precision Less than the best Dual Supply Op Amps
but not Required for All Applications Many Op Amps Specified for Single Supply, but do not
have Rail-to-Rail Inputs or Outputs
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Challenges in Embedded Design for Motor Control systemsMarch 16th at Noon (ET)
MEMs solutions for Instrumentation applicationsApril 13th at Noon (EDT)
Multi-parameter Vital Signs Patient MonitorsMay 18th at Noon (EDT)
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Fundamentals Webcasts 2011
January Introduction and Fundamentals of Sensors February The Op Amp March Beyond the Op Amp April Converters, Part 1, Understanding Sampled Data Systems May Converters, Part 2, Digital-to-Analog Converters June Converters, Part 3, Analog-to-Digital Converters July Powering your circuit August RF: Making your circuit mobile September Fundamentals of DSP/Embedded System design October Challenges in Industrial Design November Tips and Tricks for laying out your PC board December Final Exam, Ask Analog Devices
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