characterization of electrical properties of glass and

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Characterization of Electrical Properties of Glass and Transmission Lines on Thin Glass up to 50 GHz Wasif Tanveer Khan *# , Jialing Tong # , Srikrishna Sitaraman # , Venky Sundaram # , Rao Tummala # , and John Papapolymerou # # School of Electrical and Computer Engineering Georgia Institute of Technology, Atlanta GA 30332-0250 * Department of Electrical Engineering Lahore University of Management Sciences, Lahore, Pakistan [email protected] Abstract This paper presents, for the first time, the characterization of electrical properties of Glass/ZIF stack-up and transmission lines on glass/ZIF up to 50 GHz. Ring resonators, co-planar wave guide (CPW), CPWs with Thru- Package-Vias (TPVs) and microstrip to CPW transitions are designed, fabricated and measured on a 300/33 μm glass/ZIF substrate. The Short-Open-Load-Through (SOLT) calibration technique was used to measure the fabricated structures. Measurements show promising RF performance of glass and T.L on glass up to 50 GHz. An insertion loss of 0.05 dB/mm at 20 GHz and 0.12 dB/mm at 50 GHz for a CPW line has been measured. The microstrip to CPW transition exhibited 0.24 dB/mm of loss and a thru-package-via exhibited a loss of 0.34 dB at 50 GHz. A dielectric constant of 4.95 and loss tangent of 0.012 at 50 GHz is also reported. . I. Introduction In addition to the excellent electrical properties, packaging substrates/interposers should be cost effective and compatible with different package integration technologies. One property, whose importance cannot be ignored, is the I/O density that can be achieved on a particular interposer technology. To enable the packaging of next generation systems, many new materials have been explored for advanced package design. Interposer technology has evolved over the years from ceramics to organics to silicon. Some of the limitations of ceramic substrate are their higher cost (because of smaller tile size) and high co-firing temperature. Organic substrates suffer from poor dimensional stability requiring large via-capture pads, which make them unsuitable for very high IOs with fine pitch interconnections. Therefore, researchers explored the option to develop Si- based interposers. Si-based interposer has two limitations; (a) because of the requirement to have an insulation wall around via-walls, the process is expensive and (b) the size of Si- based interposers is limited by the size of the Si wafer. Recently, thin glass that can be processed in large panel size has been proposed as a superior alternative interposer technology to address the aforementioned problems of organic and silicon based interposers [1]. Some of the challenges, such as low cost formation of vias and low thermal conductivity, associated with glass based interposers have been recently addressed. The other advantages, which glass-based interposer offer over the other available interposer technologies include: low-cost alternative to 2.5 D MCM package, packaged 3D ICs directly without requiring organic BGAs, 10x higher IO density than organic packages at 2-10x lower cost per mm 2 than wafer Si interposers, 5 μm redistribution layer (RDL) on both sides and 10x lower signal loss than oxide-line TSV interposers. Because of the tremendous amount of media streaming, video calling and high definition TV and gaming, the biggest challenge for the industry is the increasing demand of high data rates. Utilization of mm-wave frequencies is an attractive option to meet this high demand. To investigate the viability of glass at mm-wave frequencies, characterization of electrical parameters of glass and transmission lines on glass is very important. In this work, for the first time, we report the characterization of glass and T.Ls on glass from DC to 50 GHz. II. Characterization of Glass/ZIF stack-up Substrate To characterize a microwave substrate, various methods/techniques can be utilized such as free space [2] method, open resonator method [3], filled waveguide method [3], cavity resonator method [4], and ring resonator method [4]. Broad band techniques are suitable for high-loss and low Q materials, whereas resonant methods are used to extract electrical properties of a low loss material. Each method has its own range of applicability and limitations. The parallel plate method [5] is used only for lower frequencies whereas the free-space method requires extra components (horn antennas and a suitable substrate mounting setup). Resonant cavities based techniques are accurate but not broadband; they allow to extract the loss tangent and dielectric constant at only one frequency. Figure 1. Glass-ZIF Stack-up 978-1-4799-8609-5/15/$31.00 ©2015 IEEE 2138 2015 Electronic Components & Technology Conference

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Page 1: Characterization of Electrical Properties of Glass and

Characterization of Electrical Properties of Glass and Transmission Lines on

Thin Glass up to 50 GHz

Wasif Tanveer Khan*#, Jialing Tong#, Srikrishna Sitaraman#, Venky Sundaram#, Rao Tummala#, and John

Papapolymerou#

#School of Electrical and Computer Engineering

Georgia Institute of Technology, Atlanta GA 30332-0250 *Department of Electrical Engineering

Lahore University of Management Sciences, Lahore, Pakistan

[email protected]

Abstract

This paper presents, for the first time, the

characterization of electrical properties of Glass/ZIF stack-up

and transmission lines on glass/ZIF up to 50 GHz. Ring

resonators, co-planar wave guide (CPW), CPWs with Thru-

Package-Vias (TPVs) and microstrip to CPW transitions are

designed, fabricated and measured on a 300/33 µm glass/ZIF

substrate. The Short-Open-Load-Through (SOLT) calibration

technique was used to measure the fabricated structures.

Measurements show promising RF performance of glass and

T.L on glass up to 50 GHz. An insertion loss of 0.05 dB/mm

at 20 GHz and 0.12 dB/mm at 50 GHz for a CPW line has

been measured. The microstrip to CPW transition exhibited

0.24 dB/mm of loss and a thru-package-via exhibited a loss

of 0.34 dB at 50 GHz. A dielectric constant of 4.95 and loss

tangent of 0.012 at 50 GHz is also reported.

.

I. Introduction

In addition to the excellent electrical properties,

packaging substrates/interposers should be cost effective and

compatible with different package integration technologies.

One property, whose importance cannot be ignored, is the I/O

density that can be achieved on a particular interposer

technology. To enable the packaging of next generation

systems, many new materials have been explored for

advanced package design. Interposer technology has evolved

over the years from ceramics to organics to silicon. Some of

the limitations of ceramic substrate are their higher cost

(because of smaller tile size) and high co-firing temperature.

Organic substrates suffer from poor dimensional stability

requiring large via-capture pads, which make them

unsuitable for very high IOs with fine pitch interconnections.

Therefore, researchers explored the option to develop Si-

based interposers. Si-based interposer has two limitations; (a)

because of the requirement to have an insulation wall around

via-walls, the process is expensive and (b) the size of Si-

based interposers is limited by the size of the Si wafer.

Recently, thin glass that can be processed in large panel size

has been proposed as a superior alternative interposer

technology to address the aforementioned problems of

organic and silicon based interposers [1]. Some of the

challenges, such as low cost formation of vias and low

thermal conductivity, associated with glass based interposers

have been recently addressed. The other advantages, which

glass-based interposer offer over the other available

interposer technologies include: low-cost alternative to 2.5 D

MCM package, packaged 3D ICs directly without requiring

organic BGAs, 10x higher IO density than organic packages

at 2-10x lower cost per mm2 than wafer Si interposers, 5 µm

redistribution layer (RDL) on both sides and 10x lower signal

loss than oxide-line TSV interposers. Because of the tremendous amount of media streaming,

video calling and high definition TV and gaming, the biggest

challenge for the industry is the increasing demand of high

data rates. Utilization of mm-wave frequencies is an

attractive option to meet this high demand. To investigate

the viability of glass at mm-wave frequencies,

characterization of electrical parameters of glass and

transmission lines on glass is very important. In this work,

for the first time, we report the characterization of glass and

T.Ls on glass from DC to 50 GHz.

II. Characterization of Glass/ZIF stack-up Substrate

To characterize a microwave substrate, various

methods/techniques can be utilized such as free space [2]

method, open resonator method [3], filled waveguide method

[3], cavity resonator method [4], and ring resonator method

[4]. Broad band techniques are suitable for high-loss and low

Q materials, whereas resonant methods are used to extract

electrical properties of a low loss material. Each method has

its own range of applicability and limitations. The parallel

plate method [5] is used only for lower frequencies whereas

the free-space method requires extra components (horn

antennas and a suitable substrate mounting setup). Resonant

cavities based techniques are accurate but not broadband;

they allow to extract the loss tangent and dielectric constant

at only one frequency.

Figure 1. Glass-ZIF Stack-up

978-1-4799-8609-5/15/$31.00 ©2015 IEEE 2138 2015 Electronic Components & Technology Conference

Page 2: Characterization of Electrical Properties of Glass and

Using the ring resonator method, we can extract electrical

parameters at multiple frequencies. Therefore, in this work

we have used the ring resonator method to extract the

dielectric parameters of glass-ZIF stack-up.

The glass-ZIF stack-up, illustrated in Fig. 1, was used in this

work. The thickness of glass and ZIF was 300 µm and 33

µm, respectively. The thickness of the metallization on both

top and bottom sides was 10 µm.

A. Design of a Ring Resonator

The microstrip ring resonator (MRR), shown in Fig. 2, was

designed on the stack-up displayed in Fig. 1.

Figure 2. Ring Resonator

The MRR produces periodic resonant peaks in its S21

response. The extraction of the dielectric constant (Ɛr) of the

substrate depends on the location of the resonant frequency of

a resonator for a given radius. The desired resonant

frequency and corresponding radius of the ring was derived

using equation (1)

where fo corresponds to the nth resonant frequency of a ring

with mean radius rm, effective dielectric constant Ɛeff and c

being the speed of light in vacuum [6]. Ring resonators with

fundamental resonant frequencies of 3 GHz, 6 GHz, and 9

GHz were designed to extract the electrical parameters at

multiple frequencies. The design parameters of MRR are

tabulated in Table 1. The simulated S21 response of the

designed MRR is displayed in Fig. 3.

Figure 3. Simulated S21 response of Ring Resonator

Table I

Ring Resonator Design Parameters

Dimensions (mm)

mrr_w 0.684 dia(9GHz) 17.764

dia(3GHz) 53.374 c_g 0.04

dia(6GHz) 26.668

B. Extraction of Dielectric Electrical Parameters

The effective permittivity can be calculated using equation

(1). The extraction of relative permittivity and loss tangent

was performed using the dispersive permittivity model of

effective permittivity from [7]. The relative permittivity at

nth resonant frequency is extracted by using microstrip line

equations (2-4).

In equation (2), Mt represents the term that accounts for the

effect of metallization and is defined in equation (3).

where t, W, and h represent metallization thickness,

microstrip width and height of the substrate, respectively.

F(W/h) is defined in equation (4).

The ring resonator method gives the total loss at the

frequency locations of each resonant peak [8] and subtracting

theoretical values for conductor loss gives us the dielectric

loss.

Then the dielectric loss is inserted into the following

equation to get the loss tangent.

III. Characterization of Transmission Lines on Glass/ZIF

stack-up Substrate

Microstrips and CPWs are the most commonly used

transmission lines in planar microwave circuit design. For

the measurement and packaging of microstrip

designs/circuits, microstrip to coplanar wave guide

transitions are commonly utilized. When designing RF

circuits, electromagnetic simulators are used with the

assumption that metals are perfect electric conductors and

have no metal loss. Even when a conductivity value is added,

simulated transmission lines do not take the metal and the

dielectric surface roughness into account. Dielectric and

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Page 3: Characterization of Electrical Properties of Glass and

conductor surface roughness might create significant

conductor losses which may not be detected in simulations.

That’s why transmission line structures have been designed

and measured to investigate the performance of T.Ls on

glass. Modeling, design, fabrication and characterization of

low loss and high aspect ratio 55 μm diameter through

package vias (TPVs) in 300 μm thick glass interposers was

reported in [9].To investigate the effect of Thru-Package-vias

(TPVs) on multi-layer interconnected transmission lines, we

have also designed CPW structures with Thru-Package-vias

(TPVs), as shown in Fig. 4 (c).

Figure 4. Top and Cross-sectional view of transmission lines

on glass.

The designed structures are illustrated in Fig. 4, and design

parameters of transmission lines are tabulated in Table II.

Table II

Transmission Line Design Parameters

Dimensions (mm)

l 6.2,11.2 g 0.026

w 0.17

The 3-D EM simulations were performed in HFSS. The

simulated S-parameters of 6.2 mm and 11.2 mm long CPW

lines are illustrated in Fig. 5-6. It can be seen from Fig. 5 that

the reflection coefficient is below than -10 dB from DC to 50

GHz and the insertion loss of 11.2 mm long line is less than

2 dB across the whole frequency range.

Figure 5. Simulated S11 of simple CPW lines without TPVs

Figure 6. Simulated S21 of CPW lines

IV. Fabrication

A two-metal-layer substrate can be fabricated with one

metallization layer on each side of the 300 um thick glass.

Figure 7. Fabricated Test Vehicle (a) Complete Wafer, (b)

CPWs with TPV structures, (c) CPW line, (d) CPW to

microstrip transition.

In the following, a short description of the fabrication process

is presented. A thin dry-film polymer ZEONIFTM (ZiF) ZS

of thickness 33µm, was laminated on both sides of the glass

substrate prior to the other processes. Such an approach was

shown to help in handling and metallization of the glass [10].

For the top and bottom metallization layers, electro-less

copper deposition process was used to form seed layers on the

surfaces of the polymer-laminated glass. Dry-film photo-

resist was then laminated on the seeded samples and UV

exposure was performed using designed masks to pattern the

photo-resist. Subsequently, the electrolytic copper plating was

employed to achieve desired copper pattern. The thickness of

copper on both metallization levels was 10µm. Finally, the

photo-resist was stripped and the seed layers were etched

away, which concluded the typical semi-additive process

(SAP). The fabricated test vehicle is displayed in Fig. 7 and

magnified view of three ring resonator structures is displayed

in Fig. 8.

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Page 4: Characterization of Electrical Properties of Glass and

.

Figure 8. Fabricated Ring Resonators

V. Measurements and Results

A 250 µm Cascade MicroTech Infinity probe was used to

probe the fabricated structures. All S-parameter

measurements were performed using an Agilent/Keysight

E8361 network analyzer. The measurements are in close

agreement with simulated results. The slight deviation in

measurements is attributed to the slight process variation

(different dielectric height) during the fabrication process. In

the following sections, we will discuss the measured results

of ring resonators, and different transmission lines.

A. Extraction of Dielectric Electrical Parameters of Glass

substrate

The ring resonators designed for different resonant

frequencies were measured. Since the resonator designed at 3

GHz covers all the frequency points, to avoid clutter in the

measured results, measured S21 response of only the 3 GHz

resonator is displayed in Fig. 9.

Figure 9. Measured S21 Response of 3 GHz Ring Resonator

The extracted relative permittivity of glass-ZIF stack-up is

4.938 at 20.46 GHz. The extracted loss tangent of the stack-

up is shown in Fig. 10. The loss tangent remains below

0.0085 up to 40 GHz. The loss tangent value increases as the

frequency increases. It varies from 0.0075 to 0.012 across the

whole frequency range.

0 10 20 30 40 500.005

0.01

0.015

Frequency (GHz)

Loss

Tan

gen

t (t

an

)

Figure 10. Measured/extracted Loss Tangent.

B. Characterization of Transmission lines on Glass

substrate

The CPW lines of two different lengths (6.2 mm and 11.2

mm) were fabricated and measured. The measured results are

displayed in Fig. 11-12. Reflection coefficient in Fig. 11 is

below -10 dB and shows that the T.Ls are well matched. It

can be seen from Fig. 12 that the CPW lines on glass

substrate exhibits a loss of 0.12 dB/mm at 50 GHz. This is a

promising performance and is comparable to the performance

of transmission lines on other low-loss substrates such as RO

3003, LCP and LTCC.

Figure 11. Measured S11 of CPW lines on Glass

The measured S-parameters of CPW lines which were

patterned on both sides of Glass-ZIF stack-up and

interconnected with Thru-Package-vias (TPVs) are shown in

Figs. 13-14. The diameter of TPVs was 55 µm. It can be seen

that the transmission line structures are well matched and an

insertion loss of less than 2.5 dB for a T.L of 3 mm long

across the complete frequency range (DC- 50 GHz) is

achieved.

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Page 5: Characterization of Electrical Properties of Glass and

Figure 12. Measured and Simulated S21 of CPW line on

Glass

This 3mm long (CPW with TPVs) structure shows 0.8

dB/mm of loss. As discussed earlier, the CPW line exhibits a

0.12 dB/mm loss, which means that two TPVs exhibit a loss

of 0.68 dB. This translates into a loss of 0.34 dB per thru-

package via (TPV).

Figure 13. Measured S11 of CPW with TPV on Glass

The measured S-parameters of a 14 mm long 50 ohms

microstrip to CPW transition are illustrated in Fig. 15-16,

which shows an insertion loss of 0.24 dB/mm

Figure 14. Measured S21 of CPW with TPV on Glass

Figure 15. Measured S11 of microstrip to CPW transition on

glass substrate

Figure 16. Measured S21 of microstrip to CPW transition on

glass substrate

The table 5 summarizes the performance of different

transmission lines in dB/mm.

Table III

Performance Summary of T.Ls

Loss (dB/mm)

T.L Loss T.L Loss

CPW 0.12 microstrip 0.24

CPW with

TPV

0.8 *Loss per

TPV

0.34

*Loss per TPV is not expressed in dB/mm. This loss is expressed as “loss

per thru-package-via”.

Conclusions

In this paper, for the first time, the characterization of glass-

ZIF stack-up and transmission lines on glass was presented.

Microstrip ring resonator method was used to extract the

dielectric properties of glass-ZIF stack-up. The extracted

relative permittivity was reported to be 4.938 at 20.46 GHz.

The extracted loss tangent varies from 0.0075 to 0.012 across

the whole frequency range. Because of the low-loss tangent of

the substrate at mm-wave frequencies, glass substrate can be

used to develop some low-cost high-performance mm-wave

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Page 6: Characterization of Electrical Properties of Glass and

modules. We also designed and reported the loss of CPW

lines, CPW with TPVs and CPW to microstrip transition on

glass substrate. An insertion loss of 0.05 dB/mm at 20 GHz

and 0.12 dB/mm at 50 GHz for a CPW line was measured.

The microstrip line exhibited 0.24 dB/mm of loss and a thru-

package-via exhibited a loss of 0.34 dB at 50 GHz. This

promising performance of transmission lines and TPVs

shows that mm-wave circuits/components can be designed

with very good performance on a glass substrate up to 50

GHz. This work paves the way for System-on-Package

solutions on low-cost thin glass substrate.

.

References

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