chapter 4 interconnect analysis. organization 4.1 linear system 4.2 elmore delay 4.3 moment matching...
TRANSCRIPT
Chapter 4 Interconnect Analysis
Organization
• 4.1 Linear System• 4.2 Elmore Delay• 4.3 Moment Matching and Model Order Reduction
– AWE
– PRIMA
• 4.4 Recent development– MOR for network
– Parameterized MOR
Reading Assignment for 4.1 and 4.2
• Elmore delay model (Elmore, Journal of Applied Physics, 1948 – http://eda.ee.ucla.edu/EE201A-04Spring/elmore.pdf
• Elmore delay for RC tree (Rubinsteun-Penfield-Horowitz,TCAD'83– http://eda.ee.ucla.edu/EE201A-04Spring/Elmore_TCAD.pdf
Chapter 4.1 Linear System
• Laplace Transformation
• Pole/residue
• Basic Circuit Analysis
Laplace Transformation
• Definition:dtetfsFtftf st
0
)()()}({ )( Ltime domain frequency domain
Time domain (t domain)
Complex frequency domain (s domain)
Linear Circuit
Differentialequation
Responsewaveform
Laplace Transform
Inverse Transform
Linearequation
Responsetransform
L
L-1
Frequency Domain Transfer Functionand Time Domain Impulse Response
Frequency domain representationFrequency domain representation
H(s)u(s) y(s) = H(s) u(s)
Linear systemLinear system
h(t)u(t)
duthty )()()(
Linear systemLinear system
Time domain representationTime domain representation
The transfer function H(s) is the Laplace Transform The transfer function H(s) is the Laplace Transform of the impulse response h(t)of the impulse response h(t)
Circuit Analysis Using Laplace Transforms
Time domain (t domain)
Complex frequency domain (s domain)
Linear Circuit
Differentialequation
Classicaltechniques
Responsewaveform
Laplace Transform
Inverse Transform
Algebraicequation
Algebraictechniques
Responsetransform
L
L-1
Poles and Zeros of F(s)
• Scale factor: K = bm/an
• Poles: s = pk (k = 1, 2, ..., n)
• Zeros: s = zk (k = 1, 2, ..., m)
01
1
1
01
1
1)(asasasa
bsbsbsbsH
n
n
n
n
m
m
m
m
)())((
)())(()(
21
21
n
m
pspsps
zszszsKsH
Resonant frequencies
Pole-Zero Diagrams
1 :pole1
1)(
ss
sF
j
1
s-plane
pole locationzero location
j
j
j
s-plane
js
s
s
sAsF
:poles
:zero
)(
)()(
22
j
s-plane
00:pole
1)(
jss
sF
Poles and WaveformsIf poles in right-plane,
waveform increases withoutbound as time approaches infinity
If poles on j-axis,waveform neither decays nor grows
If poles in left-plane,waveform decays to zero
as time approaches infinity
Real poles produce exponential waveforms
Complex poles come in pairs that produce
oscillatory waveforms
Basic Circuit Analysis
• Output response
• Basic waveforms– Step input
– Pulse input
– Impulse Input
• Use simple input waveforms to understand the impact of network design
Network structures & state
Input waveform & zero-states
Natural response vN(t)(zero-input response)
Forced response vF(t)(zero-state response)
For linear circuits: )()()( tvtvtv FN
unit step function
u(t)=0
1
0t
0t
1
pulse function of width T
0
1/T
-T/2 T/2
)
2()
2(
1)(
Ttu
Ttu
TtPT
unit impulse function
1)(
0any for s.t.
0for singular
0for 0)(
0when )( : )(
dtt
t
tt
TtPt T
dt
tduδ(t)
dxxtut
)(or
)()(
definitionBy
Inputs
Time Moments of Impulse Response h(t)
• Definition of moments
)()( sHth L
dttthsi
dtsti
thdtethsH
i
i
i
i
ist
00
00
0
)()(!
1
)(!
1)()()(
i-th moment dttthi
m iii
0)()1(
!
1
Chapter 4.2 Elmore Delay
• Lumped and distributed interconnect delay model
• Elmore delay and distributed interconnect delay model
• Elmore delay and time moments
Interconnect ModelLumped vs Distributed
Lumped Distributed
R
C
r
c
r
c
r
c
r
c
Analysis of Simple RC Circuit
0)()(
tvdt
tdvRCzero-input response:
(natural response)
step-input response:
match initial state:
output responsefor step-input:
v0v0u(t)
v0(1-eRC/T)u(t)
RCt
N Ke(t)vRCdt
dv(t)
v(t)
11
)()()(
0 tuvtvdt
tdvRC
)()()()( 00 tuvKetvtuvtv RCt
F
)()1()( 0 tuevtv RCt
0)( 0)0( 0 tuvKv
RC-Tree
– The network has a single input node– All capacitors between node and ground– The network does not contain any resistive loop
R1
C1
s
R 2
C2
R 4
C4
C3
R3
Ci
Ri
1
2
3
4
i
RC-tree Property
– Unique resistive path between the source node s and any other node i of the network path resistance Rii
Example: R44=R1+R3+R4
R1
C1
s
R 2
C2
R 4
C4
C3
R3
Ci
Ri
1
2
3
4
i
RC-tree Property
– Extended to shared path resistance Rik:
Example:Ri4=R1+R3
Ri2=R1
)])()([( s.t. kspathispathRRR jjik
R1
C1
s
R 2
C2
R 4
C4
C3
R3
Ci
Ri
1
2
3
4
i
Elmore Delay
• Assuming:– Each node is initially discharged to ground
– A step input is applied at time t=0 at node s
• The Elmore delay at node i is:
• It is an approximation: it is equivalent to first-order time constant of the network– Proven acceptable
– Powerful mechanism for a quick estimate
N
kikkDi RC
1
RC-chain (or ladder)
• Special case
• Shared-path resistance path resistance
N
kkkkDN RC
1
R1
C1
R2
C2
RN
CN
Vin VN
RC-Line Delay
22
1
2
)1( 22
11
rcL
N
NrcL
NNRCCkRRC
N
N
k
N
kkkkDN
R
C
R
C
R
C
Vin VN
R=r · L/N
C=c·L/N
– Delay of wire is quadratic function of its length– Delay of distributed rc-line is half of lumped RC
Time Moments of Impulse Response h(t)
• Definition of moments
)()( sHth L
dttthsi
dtsti
thdtethsH
i
i
i
i
ist
00
00
0
)()(!
1
)(!
1)()()(
i-th moment dttthi
m iii
0)()1(
!
1
• Note that m1 = Elmore delay when h(t) is monotone voltage response of impulse input
Elmore Delay for RC Trees
• Definition– h(t) = impulse response
– TD = mean of h(t)
= • Interpretation
– H(t) = output response (step process)– h(t) = rate of change of H(t)
– T50%= median of h(t)
– Elmore delay approximates the median of h(t) by the mean of h(t)
0
dtt h(t) medianof v’(t)(T50%)
v'(t)
dtttvTD
ofmean
)('0
h(t) = impulse response
H(t) = step response
Elmore Delay in RC Tree
kkCkiRiDTi
kjkPjP
jkR
iis
iiP
:is node delay to Elmore :Theorem
& input to from
pathcommon of resistance:
at rooted subtree:
; node input to frompath :
input
i
k
jSi
path resistance Rii
Rjk
Proof of Theorem
0 ))(1()1)((lim
]0 )()([lim
0 )(0|)(0 )('
Therefore
)()(
) and between res.path (common ) cap o(current t
)in scap' all current to(
on drop voltageThe)(1
)(
i node of cap. current toLet
dtti
vTTi
vT
dtT ti
vTTi
vT
dtti
vtti
vdttti
vi
DT
k dt
tk
dv
kC
kiR
kiR
k dt
tk
dv
kC
k kP
iPk
iPk i
Sk
Ri
Pti
vdt
ti
dvCi