EMT 235 DIGITAL PRINCIPLES II

Chapter 1:

Digital Design Concepts

Part 1

Week 1

1

As you already know..

2

Most natural quantities that we see are analog and vary

continuously. Analog systems can generally handle higher

power than digital systems.

Digital systems can process, store, and transmit data more

efficiently but can only assign discrete values to each point.

Analog Quantities

1

100

A .M.

95

90

85

80

75

2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12

P.M.

Temperature

(°F)

70

Time of day

3

Many systems use a mix of analog and digital electronics to

take advantage of each technology. A typical CD player

accepts digital data from the CD drive and converts it to an

analog signal for amplification.

Analog and Digital Systems

Digital data

CD drive

10110011101

Analog

reproduction

of music audio

signalSpeaker

Sound

waves

Digital-to-analog

converterLinear amplifier

4

Digital electronics uses circuits that have two states, which

are represented by two different voltage levels called HIGH

and LOW. The voltages represent numbers in the binary

system.

Binary Digits and Logic Levels

In binary, a single number is

called a bit (for binary digit). A

bit can have the value of either

a 0 or a 1, depending on if the

voltage is HIGH or LOW.

HIGH

LOW

VH(max)

VH(min)

VL(max)

VL(min)

Invalid

5

Example : for a 3.3 V CMOS technology

High : 2 to 3.3 V

Low : 0 to 0.8V

HIGH

LOW

VH(max)

VH(min)

VL(max)

VL(min)

Invalid

6

Identify the level:

• 0.5V

• 2.5V

Unacceptable: 0.8 to 2V

Low : 0 to 0.8V

Digital waveforms change between the LOW and HIGH

levels. A positive going pulse is one that goes from a

normally LOW logic level to a HIGH level and then back

again. Digital waveforms are made up of a series of pulses.

Digital Waveforms

Falling orleading edge

(b) Negative–going pulse

HIGH

Rising ortrailing edge

LOW

(a) Positive–going pulse

HIGH

Rising orleading edge

Falling ortrailing edge

LOWt0

t1

t0

t1

Positive-edge Trigger vs Negative-edge Trigger 7

Actual pulses are not ideal but are described by the rise time,

fall time, amplitude, and other characteristics.

Pulse Definitions

90%

50%

10%

Base line

Pulse width

Rise time Fall time

Amplitude tW

tr tf

Undershoot

Ringing

Overshoot

Ringing

Droop

8

Non-ideal Pulse Characteristics

9

Delay Definitions

Propagation Delay

Definition 1

(tPHL+tPLH)/2

Definition 2

Max (tPHL, tPLH)

10

Periodic pulse waveforms are composed of pulses that repeats

in a fixed interval called the period. The frequency is the rate

it repeats and is measured in hertz.

Periodic Pulse Waveforms

Tf

1

fT

1The clock is a basic timing signal that is an example of a

periodic wave.

What is the period of a repetitive wave if f = 3.2 GHz?

GHz 2.3

11

fT 313 ps

11

Pulse Definitions

In addition to frequency and period, repetitive pulse waveforms

are described by the amplitude (A), pulse width (tW) and duty

cycle. Duty cycle is the ratio of tW to T.

Volts

Time

Amplitude (A)

Pulse

width

(tW)

Period, T 12

A timing diagram is used to show the relationship between

two or more digital waveforms,

Timing Diagrams

Clock

A

B

C

A diagram like this can be observed

directly on a logic analyzer.

13

Data can be transmitted by either serial transfer or parallel

transfer.

Serial and Parallel Data

Computer Modem

1 0 1 1 0 0 1 0

t0 t1 t2 t3 t4 t5 t6 t7

Computer Printer

0

t0 t1

1

0

0

1

1

0

1

14

Basic Logic Functions

True only if all input conditions

are true.

True only if one or more input

conditions are true.

Indicates the opposite condition.

15

Basic System Functions

And, or, and not elements can be combined to form

various logic functions. A few examples are:

The comparison function

Basic arithmetic functions Adder

Twobinarynumbers

Carry out

A

BCout

CinCarry in

SumΣ

Twobinarynumbers

Outputs

A

BA < B

A = B

A > B

Comparator

16

Basic System Functions

The encoding function

The decoding function Decoder

Binary input

7-segment display

Encoder9

8 9

4 5 6

1 2 3

0 . +/–

7

Calculator keypad

876543210

HIGH

Binary codefor 9 used for

storage and/or

computation

17

Basic System Functions

The data selection function

MultiplexerA

Switchingsequence

control input

B

C

∆t2

∆t3

∆t1

∆t2

∆t3

∆t1

DemultiplexerD

E

F

Data from A to D

Data fromB to E

Data fromC to F

Data fromA to D

∆t1 ∆t2 ∆t3 ∆t1

Switchingsequence

control input18

Basic System Functions

The counting function

…and other functions such as code conversion

and storage.

Input pulses

1

Counter Parallel

output lines Binary

code

for 1

Binary

code

for 2

Binary

code

for 3

Binary

code

for 4

Binary

code

for 5

Sequence of binary codes that represent

the number of input pulses counted.

2 3 4 5

Counters..

19

Basic System Functions

One type of storage function is the shift register,

that moves and stores data each time it is clocked.

0 0 0 00101Initially, the register contains only invaliddata or all zeros as shown here.

1 0 0 0010First bit (1) is shifted serially into theregister.

0 1 0 001Second bit (0) is shifted serially intoregister and first bit is shifted right.

1 0 1 00Third bit (1) is shifted into register andthe first and second bits are shifted right.

0 1 0 1Fourth bit (0) is shifted into register andthe first, second, and third bits are shiftedright. The register now stores all four bitsand is full.

Serial bitson input line

20

Clock

A basic timing signal in a digital system; a periodic

waveform used to synchronize actions.

21

1. The time measurement between the 50% point on the

leading edge of a pulse to the 50% point on the trailing edge

of the pulse is called the

a. rise time

b. fall time

c. period

d. pulse width

© 2008 Pearson Education

22

2. The time measurement between the 90% point on the

trailing edge of a pulse to the 10% point on the trailing edge of

the pulse is called the

a. rise time

b. fall time

c. period

d. pulse width

© 2008 Pearson Education

23

3. The reciprocal of the frequency of a clock signal is the

a. rise time

b. fall time

c. period

d. pulse width

© 2008 Pearson Education

24

4. If the period of a clock signal is 500 ps, the frequency is

a. 20 MHz

b. 200 MHz

c. 2 GHz

d. 20 GHz

© 2008 Pearson Education

25

5. A shift register is an example of a

a. storage device

b. comparator

c. data selector

d. counter

© 2008 Pearson Education

26

6. A device that is used to switch one of several input lines to

a single output line is called a

a. comparator

b. decoder

c. counter

d. multiplexer

© 2008 Pearson Education

27

Figure 1.1. A silicon wafer (courtesy of Altera Corp.). 28

Integrated Circuits

Plasticcase

Pins

Chip

Cutaway view of DIP (Dual-In-line Pins) chip:

• TTL chips (7400

series)

• CMOS chips

(4000 series)

SN 74 ALS 00 N

SN : Manufacturer (Texas Instruments)

74: 74-series

ALS: Logic Family (Advanced Low Power)

00: Logic Function (Quad 2-input NAND)

N: Package (Plastic DIP)

29

Integrated Circuits

DIP chips and surface mount chips

Pin 1

Dual in-line package Small outline IC (SOIC)

30

Integrated Circuits

Other surface mount packages:

SOIC PLCC LCCC

End viewEnd viewEnd view

31

A typical ball-grid array (BGA) package configuration.

32

Digital Hardware

Standard Chips

Programmable Logic Devices

Custom Designed Chips

33

Figure 1.6. A printed circuit board. 34

A digital hardware system

35

Fixed-function logic

(Standard Chips)

A category of digital integrated circuits having

functions that cannot be altered.

36

Figure 3–61 Pin configuration diagrams for some common fixed-function IC gate configurations.

Thomas L. Floyd

Digital Fundamentals, 9e

Copyright ©2006 by Pearson Education, Inc.

Upper Saddle River, New Jersey 07458

All rights reserved.

37

Programmable logic

A category of digital integrated circuits capable of

being programmed to perform specified functions.

38

Programmable Logic

Programmable logic devices (PLDs) are an alternative to

fixed function devices. The logic can be programmed for a

specific purpose. In general, they cost less and use less

board space that fixed function devices.

Fixed ORarray and

output logic

ProgrammableAND array

A PAL device is a form of PLD that uses a

combination of a programmable AND array and a

fixed OR array:

39

Figure 1.2. A field-programmable gate array chip

(courtesy of Altera Corp.).

Memory block Group of 8 logic cells

Interconnection

wires

40

Design concept

Successful design

Initial design

Simulation

Design correct?

Redesign

No

Yes

The basic design loop 41

Simulate

Stimulate

42

Programmable logic.

Programmable Logic

Devices

Field Programmable

Gate Arrays

Simple PLDs Complex PLDs

PROM, Programmable

ROMs 43

Block diagrams of simple programmable logic devices

(SPLDs).

44

General block diagram of a CPLD.

45

Basic structure of an FPGA.

46

Basic configuration for programming a PLD or FPGA.

47

Programmable Logic Softwares

Altera’s QuartusII

Xilinx ISE

Lattice

48

Basic PLD design flow Design Entry

• Schematic

• Source Codes (HDL,

hardware description

language)

Functional Simulation

- verify that the circuit

functions as expected

Timing Simulation

-Considers propagation

delay of the circuit

Program the PLD chip

Synthesis

-Converts schematic or

HDL codes into logic

gates

circuit

49

Custom Designed Chips

The circuit is designed to be optimized,

therefore better performance.

Less chip area, higher speed, lower power,

etc.

Consists of bigger circuits, i.e. can replace

multiple standard chips.

Examples: microprocessor or any chips

for a special purpose.

50