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CHAPTER 1COMPUTER SYSTEM OVERVIEW

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Operating SystemExploits the hardware resources of one or more processorsProvides a set of services to system usersManages secondary memory and I/O devices

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Basic Elements of Computer SystemAt a top level, a computer consists of processor, memory, and I/O

components, with one or more modules of each type. These components are interconnected in some fashion to achieve the

main function of the computer, which is to execute programs. Thus, there are four main structural elements:

1) Processor: Controls the operation of the computer and performs its data processing functions. When there is only one processor, it is often referred to as the central processing

unit (CPU).

2) Main memory: Stores data and programs. This memory is typically volatile; that is, when the computer is shut down, the

contents of the memory are lost. Main memory is also referred to as real memory or primary memory.

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Basic Elements of Computer System (Cont’d)

3) I/O modules: Move data between the computer and its external environment. The external environment consists of a variety of devices, including

secondary memory devices (e.g., disks), communications equipment, and terminals.

4) System bus: Provides for communication among processors, main memory, and I/O modules.

All of these formerly-mentioned elements are fixed on an electronic board which is called “motherboard”.

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Basic Elements of Computer System (Cont’d)

PC MAR

IR MBR

I/O AR

I/O BR

CPU Main Memory

SystemBus

I/O Module

•••

•••

•••

Buffers

Instruction

012

n - 2n - 1

Data

Data

Data

Data

Instruction

Instruction

Figure 1.1 Computer Components: Top-Level View

PC = Program counterIR = Instruction registerMAR = Memory address registerMBR = Memory buffer registerI/O AR = Input/output address registerI/O BR = Input/output buffer register

Executionunit

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Computer Motherboard…… X

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Processor [Central Processing Unit (CPU)]

One of the processor’s functions is to exchange data with memory.

For this purpose, it typically makes use of two internal registers1) Memory address register (MAR): Specifies the address for the

next read or write.

2) Memory buffer register (MBR): Contains data to be written into memory or which receives data read from memory.

Similarly, there are two I/O-related registers:1) I/O address register (I/OAR): specifies a particular I/O device.

2) I/O buffer register (I/OBR): is used for the exchange of data between an I/O module and the processor.

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Variety of CPU Vendors

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MemoryA memory module consists of a set of locations, defined

by sequentially numbered addresses. Each location contains a bit pattern that can be interpreted as

either an instruction or data.

An I/O module transfers data from external devices to processor and memory, and vice versa. It contains internal buffers for temporarily holding data until they

can be sent on.

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Instruction Execution (Fetch & Execute)…………………XA program to be executed by a processor consists of a

set of instructions stored in memory. In its simplest form, instruction processing consists of two

steps: 1. Fetch: The processor reads ( fetches ) instructions from memory

one at a time. Typically, the program counter (PC) holds the address of the next

instruction to be fetched.Program counter is incremented after each fetch.

2. Execute: executes each instruction.

Program execution consists of repeating the process of instruction fetch and instruction execution.

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Instruction Execution (Cont’d)….XThe processing required for a single instruction is called

an instruction cycle. Using a simplified two-step description, the instruction

cycle is depicted in Figure 1.2. Program execution halts only if the processor is turned

off, some sort of unrecoverable error occurs, or a program instruction that halts the processor is encountered.

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Instruction Execution (Cont’d)In general, these actions fall into four categories:

1) Processor-memory: Data may be transferred from processor to memory or from memory to processor.

2) Processor-I/O: Data may be transferred to or from a peripheral device by transferring between the processor and an I/O module.

3) Data processing: The processor may perform some arithmetic or logic operation on data.

4) Control: An instruction may specify that the sequence of execution be altered.

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Example of Program Execution…X Figure 1.4 illustrates a partial

program execution, showing the relevant portions of memory and processor registers.

The program fragment shown adds the contents of the memory word at address 940 to the contents of the memory word at address 941 and stores the result in the latter location.

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Example of Program Execution…..XThree instructions, which can be described as three fetch

and three execute stages, are required:

1) The PC contains 300, the address of the first instruction. This instruction (the value 1940 in hexadecimal) is loaded into the IR and the PC is incremented.

Note that this process involves the use of a memory address register (MAR) and a memory buffer register (MBR). For simplicity, these intermediate registers are not shown.

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Example of Program Execution ….X

2) The first 4 bits (first hexadecimal digit) in the IR indicate that the AC is to be loaded from memory.

The remaining 12 bits (three hexadecimal digits) specify the address, which is 940.

3) The next instruction (5941) is fetched from location 301 and the PC is incremented.

4) The old contents of the AC and the contents of location 941 are added and the result is stored in the AC.

5) The next instruction (2941) is fetched from location 302 and the PC is incremented.

6) The contents of the AC are stored in location 941.

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InterruptsVirtually all computers provide a mechanism by which

other modules (I/O, memory) may interrupt the normal sequencing of the processor. Interrupt: means to interrupt the normal sequencing of the processor.

Interrupts are provided primarily as a way to improve processor utilization. For example, Most I/O devices are much slower than the processor. Suppose that the processor is transferring data to a printer using the

instruction cycle scheme of Figure 1.2. After each write operation, the processor must pause and remain

idle until the printer catches up. The length of this pause may be on the order of many thousands or

even millions of instruction cycles. Clearly, this is a very wasteful use of the processor.

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Classes of Interrupts

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Program Control and Interrupts

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Instruction Cycle with Interrupts…xInstruction cycle with interrupts will become as follows:

1. Processor checks for interrupts.

2. If no interrupts fetch the next instruction for the current program.

3. If an interrupt is pending, suspend execution of the current program, and execute the interrupt-handler routine.

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Memory Hierarchy……….XAs might be expected, there is a trade-off among the

three key characteristics of memory: namely, capacity, access time, and cost.

A variety of technologies are used to implement memory systems, and across this spectrum of technologies, the following relationships hold:Faster access time, greater cost per bitGreater capacity, smaller cost per bitGreater capacity, slower access speed

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Memory Hierarchy

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Going Down the Memory HierarchyAs one goes down the hierarchy in figure 1.14, the

following occur:Decreasing cost per bitIncreasing capacityIncreasing access timeDecreasing frequency of access of the memory by the processor

Locality of reference

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Secondary MemoryPermanent Storage Media like:

Hard disk Removable disk, TapeOptical Storage.

NonvolatileAuxiliary memoryUsed to store program and data filesA hard disk is also used to provide an extension to main

memory known as virtual memory to support

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Disk CacheDisk Cache is a portion of main memory used as a buffer

to temporarily to hold data that are to be read out to disk. Disk Cache improves performance in two ways:

1) Disk writes are clustered. Instead of many small transfers of data, we have a few large transfers of data. This improves disk performance and minimizes processor involvement.

2) Some data written out may be referenced again. The data are retrieved rapidly from the software cache instead of slowly from disk.

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Cache MemoryWhy Cache Memory?

Because, there is a mismatch between processor and main memory speeds as main memory is slower than CPU.

Invisible to operating system.Increase the speed of memory.Exploit the principle of locality.

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Cache Memory…….X

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Cache Memory………XContains a copy of a portion of main memory.Processor first checks cache.If not found in cache, the block of memory containing the

needed information is moved to the cache and delivered to the processor.

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Cache Read Operation……..X

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Cache Design…….XCache size

Small caches have a significant impact on performance.

Block sizeThe unit of data exchanged between cache and

main memory.Larger block size more hits until probability of

using newly fetched data becomes less than the probability of reusing data that have to be moved out of cache.

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Cache Design……………XMapping function

Determines which cache location the block will occupy.

Replacement algorithmWe would like to replace the block that is least likely to be needed

again in the near future. Least-Recently-Used (LRU) algorithm

o To replace the block that has been in the cache longest with no reference to it.

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Multicore Computers…….XA multicore computer, combines two or more processors (called cores) on a single piece of silicon (called a die).

Typically, each core consists of all of the components of an independent processor.

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Multicore Computers (Cont’d)….X

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I/O Techniques………..XThree techniques are possible for I/O operations:

1) Programmed I/O

2) Interrupt-driven I/O

3) Direct Memory Access (DMA)

(1) Programmed I/O…….XI/O module performs the action, not the processor.

Sets appropriate bits in the I/O status register.

No interrupts occur.Processor checks status until operation is complete.

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(2) Interrupt-Driven I/O……XProcessor is interrupted when I/O

module ready to exchange data.Processor saves context of the

executing program and begins executing interrupt-handler.

No needless waiting.Consumes a lot of processor time

because every word read or written passes through the processor.

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(3) Direct Memory Access (DMA)….X

I/O exchanges occur directly with memory.Processor grants I/O module authority to read from or

write to memory.Relieves the processor responsibility for the exchange.

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Transfers a block of data directly to or from memoryAn interrupt is sent when the transfer is completeProcessor continues with other work

(3) Direct Memory Access (DMA)…X