challenges in integrated electronic system designs

M.S.Ramaiah School of Advanced Studies 1

Challenges in Integrated Electronic System Design

Manasa.K CWB0912002, FT-2012

M. Sc. (Engg.) in Electronic System Design Engineering

Module leader: Mr. Ugra Mohan Roy


Overview

• Introduction

• Electrical Over-Stress (EOS)

• Packaging

• Printed Circuit Board Failure

• Electrostatic Discharge (ESD)

• Catastrophic ESD failure

• Latent ESD failure

• Conclusion


Introduction

• The increasing complexity of electronic components and the need for

portable low-power gadgets that can operate in stressful environments make

the design more challenging.

• The physical phenomena at submicron feature dimensions are having more

and more impact, not only on performance, but even on the functionality.

• Common examples include communication devices such as cell-phones and

personal digital assistants (so-called PDA's), aircraft flight controls,

autonomous vehicles, sophisticated weapon systems and tiny medical

devices inside or outside of the human body, such as heart monitors etc.


1. Electrical Over-Stress (EOS) • EOS describes the thermal damage that may occur when an electronic device is

subjected to a current or voltage that is beyond the specification limits of the device.

• EOS damage occurs because of the direct and indirect effects.

• Thermal damage is the result of the excessive heat generated during the EOS

Event.

• The high currents during the EOS event can generate very high temperatures even

in the normally low resistance paths.

• An EOS event can last only for milliseconds or can last as long as the conditions

persist.

•EOS damages occurs both internally and externally in a system.

EOS external damage


Electrical Over-Stress (EOS)

Melted Bond Wire

EOS internal damage

Causes for EOS:

• Uncontrolled voltage surge on the power supply

• Overshoot or undershoot during IO switching

• ESD events that trigger a larger EOS event or

cause damage that weaken the device making it

more susceptible to future EOS events.

• Voltage spikes due to internal PCB switching.

• Latch-up events may result in EOS damage if the

current is high or if it persists for an extended time


Packaging is the barrier between electronic parts and the environment, it is very

susceptible to environmental factors.

• Material fatigue from the thermal expansion caused by heating cycles.

• Mechanical stress and shock can crack or fracture packaging.

• Humidity and chemicals can cause corrosion.

• Material defects introduced during manufacturing and processing.

• Electrical faults introduced during encapsulation (bonding wire short and open

circuits).

• Migration of contaminants through the packaging onto the semiconductor die

2. Packaging

Corrosion with moisture


3. Printed Circuit Board

Today PCBs have evolved from 100% through-hole, 100-mil technology to a

mixture of through-hole and surface mount processes involving thousands of

components.

Double-sided boards have evolved into multi-layer boards with 5 and 6 layers can

go upto14 layers. As the complexity of the PCB manufacturing process has

increased, the possibility of process defects has also increased.

The causes for failure for a PCB are,

• Residues of solder flux may facilitate corrosion.

• The traces may crack under mechanical loads and may result in unreliable PCB

operation.

• Via cracking during soldering

cracked solder joints Flux residue between the connector nodes


4. Electrostatic Discharge (ESD)

Electrostatic Discharge (ESD) can damage a sensitive electronic component,

resulting in failures, reduced reliability and increased rework costs, or latent

component failures.

ESD damages are generally classified as either a catastrophic failure or a latent

defect.

Catastrophic failure: The device's circuitry is permanently damaged causing the

device to stop functioning. Such failures usually can be detected when the device

is tested before shipment.

Latent failure: A latent defect, is more difficult to identify. A device that is

exposed to an ESD event may be partially degraded, yet continue to perform its

intended function. However, the operating life of the device may be reduced

significantly. This failures are usually costly to repair.


ESD can cause hardware damage in the following electronic systems:

• Melting of metallization traces due to high levels of thermal overstress that

EOS induces.

• Intense electric fields that can cause interference or failure of nearby

electronics.

• Component degradation or latent defects in device structures that don't lead to

immediate failure but cause intermittent malfunctioning and field failures after

exposure to stress.


Summary

• The challenges in integrating electronic system design is increasing due to the

complexity of the system and also because of the decrease in size of the

components to submicron level.

• Electrical Over-Stress is one of the challenge which effects the system both

internally and externally because of the high temperatures.

• Packaging is the barrier between the electronic parts and the environment, this

causes cracks in the packaging when mechanical stress is applied, corrosion is

caused due to the humidity and reaction of chemicals.

• Via cracking during soldering, residues of solder flux etc are some of the

causes for failures in the printed circuit boards.

• The two types of ESD damages are, catastrophic failure and latent defect.


References

• An Introduction to ESD (2010) Fundamentals of Electrostatic Discharge ESD

Association, Rome, NY (2nd August 2013)

• Jacob A. Abraham Formal Verification Techniques and Tools for Complex

Designs University of Texas at Austin (2nd August 2013)

• V Lakshminarayanan (2000) Minimizing failures in electronic systems by

design Centre for Development of Telematics ( 3rd August 2013)

• Code 560 Handbook Parts, Packaging, and Assembly Technologies Office

Electrical Engineering Division, NASA GSFC Greenbelt, Maryland (3rd

August 2013)


Thank You

challenges in integrated electronic system designs

Education