cf 16/feb/20031 h8 beam test in 2003 ─ preparation status tgc-japan electronics group

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CF 16/Feb/2003 1 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

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CF 16/Feb/20033 Trigger Electronics

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Page 1: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 1

H8 Beam Test in 2003─ Preparation status

TGC-Japan electronics group

Page 2: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 2

To do list for beam test at H8

Validate the design of Muon Endcap Trigger Electronics

With electronics and software, which have been used in the present slice test (s) of end-to-end full chain + LV + HV + DCS + othersWith TGC 7 layers using 3 T8 units

Take data from TGCs together with ones from MDTsIntegrate the system with MuCTPI and CTP

Page 3: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 3

Trigger Electronics

Page 4: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 4

Slice test results and statusLevel 1 Trigger electronics

Comparison of trigger I/O patterns with Simulation 1-track hit 10000 patterns checked 2-tracks hits 10000 patterns checked ≥ 2 tracks hits check undergoing

Latency (from pp collision to MuCTPI input) measured and estimated as 1205ns (TDR 1250ns)

Read-out chain with SSW and Test-RODFPGA version SSW ready, firmware not yet coded

SSW must be installed in Slice test setup till 1st week of March

Test ROD functionality confirmed, performance measured with PT4 module (general purpose G-link test VME module)

Page 5: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 5

Installation: on a doublet with special PS pack container

PS-Pack (PS board, SPP)Some newer components for beam test

PS board New PS boards (ready) for

New PP ASICs– 32 channel inputs– PRR passed

New JRC ASICs– PRR passed

Present SLB ASICs– Known bug(OK for the beam test)

DCS (eLMB)Chamber Charge MonitorLow VoltageVthJTAG

Service Patch Panel (ready)TTCrx and fanoutDCS to TTCrx setup

Page 6: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 6

HS Crate (Hi-pT, SSW, HSC)H-pT

2 H-pT ASICs (W/S)Full spec., PRR passed

G-link → SL

SSW (2 boards for W/S)FPGA versionFirmware is being coded

HSC (↔ CCI)JTAG ConfigurationCompleted but not full tested (needs SSW)

eLMB (DCS)

put on outside of

H8

Page 7: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 7

ROD cratesTest ROD crate

Test RODPerformance tested with slice test

CCIPerformance tested with slice test

TTCviTTCrx fan-outVME I/F via Bit3 and PC

ROD crateRODVME with RCP

Put in H8 hut

Page 8: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 8

DAQ

Data from both RODs must be fed to ROBTwo different S/Ws for two different ROD cratesRun controller integration and database merging have been discussed in Roma in Jan. 2003

Common development environment/framework ATLAS Online Software 00.17.01 Common Database

Page 9: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 9

Software componentsPCDAQ

Online S/Wservers

Conf D.B

Root controller

Sync. controller

TGC Root

J controller I controller

Page 10: CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

CF 16/Feb/2003 10

ScheduleSlice test in KEK ( Now → 3 ~ 7 Mar.)

SLB chip revision, bug fix and submit on Feb.,15SSW firmware code completion and readout test with SSW and T-ROD till 7 Mar.

Test setup with TGC in Kobe (3 → 19 Mar.)3-10-15 Mar. Chamber + Electronics + DCS Integration

Japanese TGC members + Nachman + Israeli Students15-19 Mar. SSW-ROD + DAQ integration

Japanese TGC members + Lorne + Daniel

Beam Time at H8 (24 May → 3 June)Chamber Installation (15 Apr. → )DAQ integration, Commissioning (15 May → )