cdb4396/7 evaluation board for cs4396 and cs4397€¦ · pcm-dsd settings that are set in automatic...
TRANSCRIPT
Preliminary Product Information This document conCirrus Logic reserv
Copyrig(P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581http://www.cirrus.com
CDB4396/7
Evaluation Board for CS4396 and CS4397
FeatureslDemonstrates recommended layout and grounding arrangements
lCS8414 receives AES/EBU, S/PDIF, & EIAJ-340 Compatible Digital Audio
lSupports 32kHz - 192kHz PCM Audio and SACD Audio
lRequires only a digital signal source for a complete Digital-to-Analog Converter system
l Included Wall Mount power supply
DescriptionThe CDB4396/7 evaluation board is an excellent meansfor quickly evaluating the CS4396 or CS4397 24bit-192 kHz D/A converters. The board accepts SPDIF andSACD inputs and, with an analog output interface, pre-sents line level signals via RCA connectors. Evaluationrequires an analog signal analyzer and a digital signalsource.
The CS8414 digital audio receiver I.C. provides the sys-tem timing and data signals necessary to operate theDigital-to-Analog converter and will accept AES/EBU,SPDIF and EIAJ compatible audio data. The evaluationboard may also be configured to accept external timingsignals for operation in a user application during systemdevelopment in PCM and DSD modes.
ORDERING INFORMATIONCDB4396C.0 Evaluation BoardCDB4397C.0 Evaluation Board
I
CS8414
EXT.PCM/DSD
INPUTSELECTOR
MODESELECTOR
CS4396/7
ANALOGFILTER
ANALOGFILTER
POWER SUPPLYREGULATION
BLOCK DIAGRAM
tains information for a new product.es the right to modify this product without notice.
1
ht Cirrus Logic, Inc. 2000All Rights Reserved)
DEC ‘00DS288DB1B1
CDB4396/7
TABLE OF CONTENTS1. CDB4396C.0 SYSTEM OVERVIEW ......................................................................................... 32. CS4396 AND CS4397 DIGITAL TO ANALOG CONVERTER ................................................. 33. CS8414 DIGITAL AUDIO RECEIVER ...................................................................................... 34. EXTERNAL DIGITAL AUDIO DATA AND DSD INPUT PORT .............................................. 35. MODE CONTROL ..................................................................................................................... 36. AUTOMATIC MODE SWITCHING ........................................................................................... 37. OUTPUT FILTER ...................................................................................................................... 48. POWER SUPPLIES ................................................................................................................. 49. GROUNDING AND POWER SUPPLY DECOUPLING ............................................................ 410. CS4396/CS4397 MODE SETTINGS (SW2) ........................................................................... 5
LIST OF FIGURESFigure 1. System Schematic ........................................................................................................... 7Figure 2. Output Stage Schematic .................................................................................................. 8Figure 3. Power Supply ................................................................................................................... 9Figure 4. Component Placement................................................................................................... 10Figure 5. Top - Layer 1.................................................................................................................. 11Figure 6. Layer 2 ........................................................................................................................... 12Figure 7. Layer 3 ........................................................................................................................... 13Figure 8. Layer 4 ........................................................................................................................... 14Figure 9. Layer 4 ........................................................................................................................... 14
LIST OF TABLESTable 1. Single Speed (16 to 50 kHz) Digital Interface Format Options.......................................... 5Table 2. Single Speed (16 to 50 kHz) De-Emphasis Options ......................................................... 5Table 3. Double Speed (50 to 100 kHz) Sample Rate Mode Options............................................. 5Table 4. Quad Speed(100 to 200 kHz) Sample Rate Mode Options .............................................. 5Table 5. 8x Interpolated Input Mode Options (CS4397 only) .......................................................... 5Table 6. Direct Stream Digital Options (CS4397 only) ................................................................... 5Table 7. SWITCH S2 MODE SETTINGS TABLE............................................................................ 6Table 8. AUTOMATIC MODE OPERATION SETTINGS ................................................................ 6
Contacting Cirrus Logic SupportFor a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:http://www.cirrus.com/corporate/contacts/sales.cfm
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the informationcontained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty ofany kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information beingrelied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including thosepertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, includinguse of this information as the basis for manufacture or sale of any items, nor for infringements of patents or other rights of third parties. This document is theproperty of Cirrus Logic, Inc. and by furnishing this information, Cirrus Logic, Inc. grants no license, express or implied under any patents, mask work rights,copyrights, trademarks, trade secrets or other intellectual property rights of Cirrus Logic, Inc. Cirrus Logic, Inc., copyright owner of the information containedherein, gives consent for copies to be made of the information only for use within your organization with respect to Cirrus Logic integrated circuits or other partsof Cirrus Logic, Inc. The same consent is given for similar information contained on any Cirrus Logic website or disk. This consent does not extend to othercopying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. The names of products of Cirrus Logic,Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in somejurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
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CDB4396/7
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1. CDB4396C.0 SYSTEM OVERVIEW
The CDB4396C.0 evaluation board is an excellentmeans of quickly evaluating the CS4396 orCS4397 24 bit - 192 kHz audio D/A converters.The evaluation board features a CS8414 digital au-dio input interface receiver, an analog output buff-er/filter, and on board power supply regulation tobe used with a supplied AC Wall Mount powersupply. The CS8414 provides an easy interface to32 kHz to 96 kHz digital audio signal sources. Theevaluation board also allows the user to supply ex-ternal PCM data and DSD data through a 10-pinheader for system development.
2. CS4396 AND CS4397 DIGITAL TO ANALOG CONVERTER
Please refer to either the CS4396 or CS4397 prod-uct datasheet for a complete detailed description ofthese components.
3. CS8414 DIGITAL AUDIO RECEIVER
The system receives and decodes the standardS/PDIF data format using a CS8414 Digital AudioReceiver, Figure 1. The outputs of the CS8414 in-clude a serial bit clock, serial data, left-right clock(FSYNC), de-emphasis control and a 256 Fs mas-ter clock. The operation of the CS8414 and a dis-cussion of the digital audio interface are included inthe CS8414 datasheet.
4. EXTERNAL DIGITAL AUDIO DATA AND DSD INPUT PORT
The evaluation board has been designed to allowinterfacing to external systems via the 10-pinheader, JP1. This header allows the evaluationboard to accept externally generated clocks and da-ta.
The port is activated by setting the “MODE” Con-trol Switch “ S2” position 6 “INT/EXT” switch tothe closed position.
This port accepts PCM data, DSD data or datafrom an external 8X interpolator such as an HDCD
PMD100 or PMD200. Notice that the board haprovisions for terminating this input port for propesignal integrity using resistors R20 through R24.
The board also features automatic mode switchbetween this port and the SPDIF port when uswith a SACD player. See Section 6- “AutomatMode Switching” for a complete description of thfeature.
5. MODE CONTROL
The board utilizes a Dip Switch, “S2” to allow thuser to select various operational modes of CS4396 or CS4397. These modes include setion of the Digital Interface Format, De-emphasiSample Rate modes, Internal-External Digital Adio Data, PCM-DSD Automatic Mode Switching64x - 128x DSD Data, +3 V/+5 V Digital Supplyvoltage selection, and Mute control. See Tablesthrough 8 for a complete description of how thswitch settings set the different operating modesthe CS4396/7. To manually set the CS4396modes, set S2 position 7 to open and use S2 ptions 1 through 5 to set the various modes. To the board into “Automatic Mode Switching” set thS2 position 7 to the closed position. See Table 8 PCM-DSD settings that are set in Automatic Modby circuitry U2, U3, U4, U7. When using thCS4397 with a DSD source, two input clock frequencies are possible, either 64 or 128x and selectable by S2 position 8 The DSD clock mod256fs or 384fs is selectable by resistor stuffing otion R19. The external mute circuitry is enabled bsetting S2 position 10 to closed.
6. AUTOMATIC MODE SWITCHING
The board features an automatic PCM or DSD put data switching mode for use with an externSACD player. When used with an external SACplayer that has both a SPDIF output connectedJ1 (U5) and DSD data output connected to the Jport, will allow the board to switch automaticallbetween the two.
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Theory of operation - When an SACD playerswitches from playing a CD to a DSD disc, the SP-DIF output data is disabled, the internal circuitry(U6, U2, U3, U4, U7) detects loss of an SPDIFsource and automatically switches the Digital DataInput path (U8) to the DSD input port JP1. Thisfeature can also be controlled from an external con-trol signal by removing R60 and inputting a controlsignal into JP2. Logic low = PCM mode, Logichigh = DSD mode. (For use only with the CS4397)
7. OUTPUT FILTER
The CDB4396C.0 output filter is a single op-ampcircuit that combines a balanced to single-endedconverter and 2-pole output filter. This topologywas chosen to demonstrate a low-cost design im-plementation, however, the trade-off is a slightlycompromised noise performance. Other output cir-cuit topologies are available that optimize noiseand distortion but at a higher cost.
The circuit was designed such that the user can se-lect between DC coupled or AC coupled modes. Toselect AC coupling, remove Jumpers J2, J4, J5 andJ7. The board also allows the user to test other op-amps by replacing the socketed op-amps with onesof their choice. Also surface mount op-amps can betested by removing the socketed op-amps and sol-dering down the surface mount versions to SKT1X,SKT3X or SKT2X. This may involve the need toremove socket pins 2,3,4 on SKT1 and SKT3 andpins 1,2,3 on SKT2 to get the IC body to mountflush.
8. POWER SUPPLIES
The CDB4396C.0 comes supplied with an external14 VAC Wall Mount power supply for conve-nience in setup, and to make measurements easierby eliminating ground loop problems between labpower supplies and measurement equipment. Theexternal 14 VAC voltage supplied at J11 is recti-fied, filtered and regulated to produce ±12 volts byregulators U13 and U14. The CDB4396A.0 evalu-
ation board can also be powered by an externalpower supply by connecting +12 vdc to connectJ8, and -12 vdc to connector J10. J9 is the Grouconnection. Up to ±13 volts is allowed before rverse voltage protection diodes D3 and D4 wclamp the input voltage.
The CDB4396C.0 uses separate voltage regulafor the digital control circuitry and for the digitapower section and analog section for the CS439CS4397. The digital power for the CS4396 CS4397 is user selectable by switch S2 positionThe (default) open position sets the voltage regutor VREG2 to +5.0 volts, the closed position sethe voltage regulator to +3.3 volts.
9. GROUNDING AND POWER SUPPLY DECOUPLING
For the user to be able to realize the high perfmance capabilities of the CS4396/7, it is recomended to pay careful attention to PC board layogrounding, and placement of the power supply adecoupling capacitors. It is recommended whdoing the PC board layout to use one ground plaunderneath the part and for this ground plane tothe analog ground plane. The digital ground pconnection (pin 9) should tie to the analog grouplane and to the digital ground plane. This shoube the “star” ground connection of the analog adigital ground planes. Please review the attachPC board photo plots for an example of the sugested grounding method.
It is also recommended to pay careful attentionthe placement of the decoupling capacitors tiedVREF (pin 28). This pin requires a very low impedance path to ground at high frequencies as pin draws high frequency current pulses at 6 MHIt is important to place the .01 uF capacitor a100 uF capacitor right next to the pin. Keep thconnecting trace as short as possible. A low Eelectrolytic or tantalum for the 100 uF is recommended.
4 DS288DB1B1
CDB4396/7
10. CS4396/CS4397 MODE SETTINGS (SW2)
M4 M1(DIF1)
M0(DIF0)
DESCRIPTION
0 0 0 Left Justified, up to 24-bit data0 0 1 I2S, up to 24-bit data0 1 0 Right Justified, 16-bit Data0 1 1 Right Justified, 24-bit Data
Table 1. Single Speed (16 to 50 kHz) Digital Interface Format Options
M3(DEM1)
M2(DEM0)
DESCRIPTION
0 0 32 kHz De-Emphasis0 1 44.1 kHz De-Emphasis1 0 48 kHz De-Emphasis1 1 De-Emphasis Disabled
Table 2. Single Speed (16 to 50 kHz) De-Emphasis Options
M4 M3 M2 M1 M0 DESCRIPTION1 1 1 0 0 Left Justified up to 24-bit data, Format 01 1 1 0 1 I2S up to 24-bit data, Format 11 1 1 1 0 Right Justified 16-bit data, Format 21 1 1 1 1 Right Justified 24-bit data, Format 3
Table 3. Double Speed (50 to 100 kHz) Sample Rate Mode Options
M4 M3 M2 M1 M0 DESCRIPTION1 1 0 0 0 Left Justified up to 24-bit data, Format 01 1 0 0 1 I2S up to 24-bit data, Format 11 1 0 1 0 Right Justified 16-bit data, Format 21 1 0 1 1 Right Justified 24-bit data, Format 3
Table 4. Quad Speed(100 to 200 kHz) Sample Rate Mode Options
M4 M3 M2 M1 M0 DESCRIPTION1 0 0 0
(DIR)0 Right Justified 20-bit data
1 0 0 0(DIR)
1 Right Justified 24-bit data
Table 5. 8x Interpolated Input Mode Options (CS4397 only)
M4 M3 M2 M1 M0 DESCRIPTION1 0 1 0
(DSD_R)0 64x Oversampled DSD
1 0 1 0(DSD_R)
1 128x Oversampled DSD
Table 6. Direct Stream Digital Options (CS4397 only)
DS288DB1B1 5
CDB4396/7
SWITCH S2 POSITION 1 MO - OPEN = 1 NOTE: SWITCH MUST BE OPEN FOR AUTO MODE TO WORKPOSITION 2 M1 - OPEN = 1 NOTE: SWITCH MUST BE OPEN FOR AUTO MODE TO WORKPOSITION 3 M2 - OPEN = 1 NOTE: SWITCH MUST BE OPEN FOR AUTO MODE TO WORKPOSITION 4 M3 - OPEN = 1 NOTE: SWITCH MUST BE OPEN FOR AUTO MODE TO WORKPOSITION 5 M4 - OPEN = 1 NOTE: SWITCH MUST BE OPEN FOR AUTO MODE TO WORKPOSITION 6 INT/EXT - SETS THE INPUT MUX TO THE CS8414 OR TO JP1 - OPEN=CS8414POSITION 7 PCM/DSD-SETS THE BOARD TO AUTO MODE-SWITCHES BETWEEN PCM AND DSD-OPEN=DISABLEDPOSITION 8 64/128X - SETS THE CLOCK MODE FOR DSD - OPEN =128XPOSITION 9 +3V/+5V - SETS THE DIGITAL POWER SUPPLY TO +3 OR +5 VOLTS - OPEN = +5VPOSITION 10 MUTE - ENABLES THE EXTERNAL MUTE CIRCUITRY - OPEN = DISABLED
DEFAULT ALL SWITCHES IN OPEN POSITION
Table 7. SWITCH S2 MODE SETTINGS TABLE
- MODE TABLE - AUTO SWITCHING
PCM DSD
M0 = 1 M0 = 1
M1 = 0 M1=DSD_R
M2 = 1 M2 = 0
M3 = 1 M3 = 0
M4 = 0 M4 = 1
LRCLK = 0 = 256FS
LRCLK = 1 = 384FS
Table 8. AUTOMATIC MODE OPERATION SETTINGS
6 DS288DB1B1
CD
B4396/7
DS
288DB
1B1
7
SEE NOTE #1
/MUTE_CNTRL
/MUTE
CM
M4 M3/INT/EXT
PCM/DSD
-12V
+5VA
+5VA
+5VA
VD+3/+5
D+3/+5
+5VA
C11.01UF
CSN_0603
C9.01UF
CSN_0603
C13.01UF
1K5 5%
R701.0K
RES_06031%
C15.01UF
R3110K
5%
R711.0K
RES_06031%
C1610UF
CSP_3528
C1410UFCSP_3528
VCC GND
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2
3
4
5
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R5 1KRES_0805 5%
C12100UFSMT25V
5TL50
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24
5
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C10100UFSMT25V
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Q1MMBT2907A L
1
23
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MUT E
AOUT_LEFT-
AOUT_RIGHT-
AOUT_LEFT+
AOUT_RIGHT+
(L=CONNECT)
(L=ENABLE)
(DSD CLK MODE)
LOW = 256fs
HIGH = 384fs
(L=PCM)
- MODE TABLE - AUTO SW ITCHING
PCM
M0 = 1 M1 = 0 M2 = 1 M3 = 1 M4 = 0
DSD
M0 = 1 M1 = DSD_R M2 = 1 M3 = 0 M4 = 1 lrclk = 0 = 256fs lrclk = 1 = 384fs
(DEFAULT = OPEN)
(H=IN2)
(L=PCM)
RESET PIN?
NOTE 1: USE THESE RESISTORS IF USING PCM AND DSD MODES
M1
+3V/+5V/MUTE_CNTRL
LRCLK
DSD_R
M2
SCK
/MUTE
M0
M1INT/EXT
/INT/EXT
INT/EXTM4M3
PCM/DSD64/128X
64/128X
MCLK
SDATA
INT/EXT
PCM/DSDPCM/DSDPCM/DSD
VD+3/+5
VD+3/+5
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VD+3/+5
VD+3/+5
VD+3/+5
VD+3/+5
VD+3/+5
VD+3/+5
VD+3/+5
V
VD+3/+5
VD+3/+5
+5V+5V
+5V
VD+3/+5
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SCK
U5
TORX173
SPDIF IN
56 24
1
3
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CASE2
GND1
GND2
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VCC
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VCC GND
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3
4
5
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J1
SPDIF IN
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2
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SDATA
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R4RES_080
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L1
47UH
R12 10KRES_0603 5%
C1810UF
C2
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R13 10KRES_0603 5%
C19.01UF
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3
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R23N.S.
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56
IN2GNDIN1 OUT
VCCSEL
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VCC GND
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3
4
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VFIFI
CM OAOUTAOUT
AGNAOUTAOUTAGN
/MUT
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R251K
5%
R281K
5%
R2 1KRES_0805 5%
C5.1UF0805
R271K
5%
HDR1SPDIF/DSD
1 2
L2
47UH
S3PTS645TL50DAC MUTE
1 23 4
5
R3 1KRES_0805 5%
JP1
HDR5X2
External Digital Audio IIs/DSD Input
246810
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R19N.S.
RES_08055%
R710K
RES_06035%
C23.1UF0805
C7.1UF0805
R600RES_08055%
R30 100
5%
R18 10KRES_0603 5%
R10 100
RES_0603
5%
M1MCLK
U8 QS3384
Input Mux/Level Shifter
478
3
1417182122112
2
24
19
132320
161510
569
11
A1A2A3
A0
A5A6A7A8A9B0-4GND
B0
VCC
B7
B5-9B9B8
B6B5B4
B1B2B3
A4
+3V/+5V
Figure 1. System Schematic
CD
B4396/7
8D
S288D
B1B
1
NOTE:THE FILTER OP-AMPS ARE DUALFOOTPRINT - DIP8 AND SO-8
SINGLE AND DUAL OP-AMPSARE SUPPORTED
J5, J7
OS 1L-L+-12V
+12VL_OU TOS 2
R-R+-12V
OS 3
OS 4R_OUT+12V
-12V
+12VR_OUT
R+
L-L_OU T
R-L+
SKT2X
DUAL_FTPRN T
1234 5
6781
234 5
678
SKT1X
DUAL_FTPRN T
1234 5
6781
234 5
678
SKT3X
DUAL_FTPRN T
1234 5
6781
234 5
678
NOTE:THE CIRCUIT IS SHOWN DC COUPLED.TO MAKE AC COUPLED -REMOVE JUMPERS J2, J4,
DC OFFSET CAN BE ADJUSTED FOR BY ADDINGRESISTORS R35, R36 AND R45, R46
L-L+
R_OUTR-R+
L_OUT
MUTE
MUTE
OS 2
OS 1
OS 2
OS 3
OS 4
OS 1
OS 3
OS 4
+12V
-12V
-12V
-12V
-12V
+12V
-12V
+12V
R521K08055%
C24 1500PF
C275600PF
SKT2
SKT
1234 5
6781
234 5
678
~
SKT3LT1028
3
26
74 1 8
5
R39560
RN551%
C451500PF
R35N.S.
08051%
C395600PF
R36N.S.
08051%
J2JUMPER
1 2
‘ ‘
J6
1
2
..
R45N.S.
08051%
R471K
RN551%
R531KRN551%
J3
1
2
..
C331500PF
C35
.1UF0805
R501K
RN551%
Q22SC3326
1
23
C445600PF
C37.1UF
0805
C34 .1UF
0805
R48499
RN551%
R371K
RN551%
C315600PF
J4JUMPER
1 2
‘ ‘
R51499
RN551%
C36 1500PF
C42.1UF
0805
~
SKT1LT1028
3
26
74 1 8
5
R441K
RN551%
R431KRN551%
C25.1UF
0805
R46N.S.
08051%
R401K
RN551%
R38499
RN551%
J5JUMPER
1 2
‘ ‘
R41499
RN551%
R341K
RN551%
C30.1UF
0805
C41
100UF 25V
C325600PF
C40470PF
C28470PF
C29
100UF 25V
J7JUMPER
1 2
‘ ‘C26
100UF25V
C38
100UF 25V R49560
RN55
1%
C435600PF
R421K08055%
Q32SC3326
1
23
AOUT_L EFT+
AOUT_LE FT-
AOUT_RIG HT+
AOUT_RIGHT -
MUT E
Figure 2. Output Stage Schematic
CD
B4396/7
DS
288DB
1B1
9
+12V
+5VA
+12V
+5V
R58560RES_0 805 5%
D2GREEN LEDPOWE R
R651101%
C6010UFCSP_3 528
C6110UFCSP_3 528
LT1117SO T223
VREG 1
1 2 34
ADJ
OUT
INTAB
R541101%
LT1117SO T223
VREG 3
1 2 34
ADJ
OUT
INTAB
51UF5V
C4710UFCSP_3 528
C4810UFCSP_ 3528
528
CDB4396/7
+3V/+5V
VD+3/+5-12V
+12V
+12V
+20V
-20V
-12V
+12V
+20V
-20V
C4647UF25V
C4910UFCSP_ 3528
U13LM317T
31 2
VIN
ADJ
VOUT
J8
+12VDC1
U14LM 337T
21 3
VIN
ADJ
VOUT
R649531%
J9
GND
1
C5847UF25V
J10
-12VDC
1
R621101%
D4
P6KE13
12
C5910UFCSP_3 528
D3
P6KE13
12
C52100UF25V
C53100UF25V
J11
POWERJAC K
23
1
C55
4700UF25V
R66330RES_0 8051%
R59330RES_ 08051%
R55TBD
5%
D5
1N4003T
12
R63953
1%
D6
1N4003T
12
R56330
1%
R611101%C56
47UF25V
C544700UF25V
C472
C57
10UFCSP_ 3528
LT1117SO T223
VREG 2
1 2 34
ADJ
OUT
INTAB
C6210UFCSP_3
R571101%
C5010UFCSP_ 3528
+3V/+5V
Figure 3. Power Supply
CD
B4396/7
10D
S288D
B1B
1
Figure 4. Component Placement
CD
B4396/7
DS
288DB
1B1
11
Figure 5. Top - Layer 1
CDB4396/7
Fig
ure
6.
Lay
er 2
12 DS288DB1B1
CDB4396/7
Fig
ure
7.
Lay
er 3
DS288DB1B1 13
CDB4396/7
Fig
ure
8.
Lay
er 4
14 DS288DB1B1
• Notes •
