capitolo 1 - github pages · 2020. 10. 16. · cpu controller usb bridge adattatore grafico memoria...
TRANSCRIPT
![Page 1: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/1.jpg)
Sistemi di calcoloCapitolo 1
Corso di Laurea in Ingegneria Informatica e Automatica
![Page 2: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/2.jpg)
Sistemi di calcolo moderni
![Page 3: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/3.jpg)
Perché studiare i sistemi di calcolo?
![Page 4: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/4.jpg)
Macchina di Von Neumann
![Page 5: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/5.jpg)
Macchina di Von Neumann, più in dettaglio
![Page 6: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/6.jpg)
Macchina di Von Neumann, più in dettaglio
Regola fondamentale USB…
![Page 7: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/7.jpg)
Struttura della memoria
![Page 8: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/8.jpg)
Elementi di elettronica: resistenze e legge di Ohm
![Page 9: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/9.jpg)
Quanti Ohm ha una resistenza?
![Page 10: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/10.jpg)
Transistor
![Page 11: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/11.jpg)
Transistor
![Page 12: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/12.jpg)
Diodo led
![Page 13: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/13.jpg)
Breadboard
![Page 14: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/14.jpg)
Esempio di semplice circuito + DEMO
![Page 15: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/15.jpg)
Porte logiche elementari
![Page 16: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/16.jpg)
Tavola di verità porta AND
![Page 17: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/17.jpg)
Circuito porta AND
![Page 18: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/18.jpg)
Porta AND su breadboard
![Page 19: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/19.jpg)
Tavola di verità porta OR
![Page 20: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/20.jpg)
Circuito porta OR
![Page 21: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/21.jpg)
Porta OR su breadboard
![Page 22: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/22.jpg)
Tavola di verità porta NOT
![Page 23: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/23.jpg)
Circuito porta NOT
![Page 24: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/24.jpg)
Porta NOT su breadboard
![Page 25: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/25.jpg)
Tavola di verità porta XOR
![Page 26: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/26.jpg)
Porta XOR realizzata con porte AND, OR e NOT
![Page 27: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/27.jpg)
Circuiti integrati VLSI + DEMO
![Page 28: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/28.jpg)
Circuiti combinatori: es. addizionatore parziale
Somma(X,Y)=
Riporto(X,Y)=
![Page 29: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/29.jpg)
Tabella verità addizionatore completo
![Page 30: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/30.jpg)
Addizionatore completo
![Page 31: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/31.jpg)
Addizionatore a 4 bit
![Page 32: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/32.jpg)
Logica sequenziale
![Page 33: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/33.jpg)
Flip-flop
![Page 34: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/34.jpg)
Flip-flop
![Page 35: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/35.jpg)
Sistemi operativi: compiti principali
![Page 36: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/36.jpg)
Sistemi operativi: obiettivi
![Page 37: Capitolo 1 - GitHub Pages · 2020. 10. 16. · CPU controller USB bridge adattatore grafico Memoria centrale (RAM) controller disco How to insert USB Wrong Wrong Correce](https://reader033.vdocuments.mx/reader033/viewer/2022060923/60af13b843606120d128f44e/html5/thumbnails/37.jpg)
Hardware-sofware stack di un sistema Linux