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CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

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Page 1: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 1

CS137:Electronic Design Automation

Day 22: December 2, 2005

Routing 2

(Pathfinder)

Page 2: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 2

Today

• Routing– Pathfinder

• graph based• global routing• simultaneous global/detail

Page 3: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 3

Global Routing

• Problem: Find sequence of channels for all routes– minimizing channel sizes– minimize max channel size– meeting channel capacity limits

Page 4: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 4

GlobalGraph

• Graph Problem on routes through regions

w

Page 5: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 5

Global/Detail

• With limited switching (e.g. FPGA)– can represent routing graph exactly

Page 6: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 6

Routing in Graph

• Find (shortest/available) path between source and sink– search problem (e.g. BFS, Alpha-Beta)

Page 7: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 7

Easy?

• Finding a path is moderately easy

• What’s hard?– Can I just iterate and pick paths?

Page 8: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 8

Example

s1 s3s2

d2d1 d3

All links capacity 1

si di

Page 9: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 9

Challenge

• Satisfy all routes simultaneously• Routes share potential resources• Greedy/iterative

– not know who needs will need which resources– i.e. resource/path choice looks arbitrary– …but earlier decisions limit flexibility for later

• like scheduling– order effect result

s1 s3s2

d2d1 d3

Page 10: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 10

Negotiated Congestion

• Old idea– try once– see where we run into problems– undo problematic/blocking allocation

• rip-up– use that information to redirect/update

costs on subsequent trials• retry

Page 11: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 11

Negotiated Congestion

• Here– route signals– allow overuse– identify overuse and encourage signals to

avoid• reroute signals based on overuse/past

congestion

Page 12: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 12

Basic Algorithm

• Route signals along minimum cost path

• If congestion/overuse– assign higher cost to congested resources

• Repeat until done

Page 13: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 13

Key Idea

• Congested paths/resources become expensive

• When there is freedom– future routes, with freedom to avoid congestion will

avoid it

• When there is less freedom– must take congested routes

• Routes which must use congested resources will, while others will chose uncongested paths

Page 14: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 14

Cost Function (1)

• PathCost= (link costs)• LinkCost = base f(#routes using, time)• Base cost of resource

– E.g. delay of resource– Encourage minimum resource usage

• (minimum length path, if possible)– minimizing delay = minimizing resources

• Congestion– penalizes (over) sharing– increase sharing penalty over time

s1 s3s2

d2d1 d3

2 3 4 31 1

1

11

44

32

1 1 1

3+1+4=8

Page 15: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 15

Example (first order congestion)

Base costs (delays)

s1 s3s2

d2d1 d3

2 3 4 31 1

1

11

44

3

2

1 1 1 Capacity

Page 16: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 16

Example (first order congestion)

s1 s3s2

d2d1 d3

2 3 4 31 1

1

11

44

3

2 Base costs (delays)

1 1 1 Capacity

All, individual routes prefer middle; create congestion.

Page 17: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 17

Example (first order congestion)

s1 s3s2

d2d1 d3

2 3 4 31 1

1

11

44

3

2 Base costs (delays)

1 1 1 Capacity

Reroute, avoid congestion.

Page 18: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 18

Example (need for history)

Base costs (delays)

Capacity

Need to redirect uncongested paths; how encourage?

s1 s2

d2d12

1 1

s3

d3

1

s4

d4

2 2

1

11

1

21

1

1

21

1

Page 19: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 19

Example (need for history)

Cannot route s3d3

s1 s2

d2d1

2 2

2

1 1

1

1s3

d3

11

21

1

1

Local congestion alone won’t drive in right directions.

Both paths equal cost…neither resolves problem.

May ping-pong back and forth.

(can imagine longer chain like this)

s4

d4

11

21

1

1

Page 20: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 20

Cost Function (2)

• Cost = (base + history)*f(#resources,time)

• History– avoid resources with history of congestion

Page 21: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 21

Example (need for history)

S3d3 and s4d4 initially ping-pong

Builds up congestion history on path 3 and 4

Eventually makes path 3 and 4 more expensive than path 1; …resolves conflict…

Adaptive cost scheme.

s1 s2

d2d1

2 2

2

1 1

1

1s3

d3

11

21

1

1

s4

d4

1

21

1

Page 22: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 22

What about delay?

• Existing formulation uses delay to reduces resources, but doesn’t directly treat

• Want:– prioritize critical path elements for shorter

delay– allow nodes with slack to take longer paths

Page 23: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 23

Cost Function (Delay)

• Cost=– W(edge)*delay + (1-W(edge))*congest– congest as before

• (base+history)*f(#signals,time)

• W(edge) = D(edge)/Dmax– 1 for edge on critical path critical path– <1 for paths with slack

• Use W(edge) to order routes

• Update critical path and W each round

Page 24: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 24

Convergence

• Chan+Schlag [FPGA’2000]– cases where doesn’t converge– special case of bipartite graphs

• converge if incremental • or if prefer uncongested to least history cost

• theory (continuous)– only reroute overflow– converge in O(|E|) reroutes– But then have fractional routes…

Page 25: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 25

Rerouting

• Default: reroute everything

• Can get away rerouting only congested nodes– if keep routes in place– history force into new tracks

• causing greedy/uncongested routes to be rerouted

Page 26: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 26

Rerouting• Effect of only reroute congested?

– maybe more iterations• (not reroute a signal until congested)

– less time– ? Better convergence– ? Hurt quality?

• (not see strong case for)

– …but might hurt delay quality• Maybe followup rerouting everything once clear

up congesiton?

Page 27: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 27

Run Time?

• Route |E| edges

• Each path search O(|Egraph|) worst case

– …generally less

• Iterations?

Page 28: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 28

Quality and Runtime Experiment

• For Synthetic netlists on HSRA– Expect to be worst-case problems

• Number of individual route trials limited (measured) as multiple of nets in design– (not measuring work per route trial)

Page 29: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 29

Quality: fixed runtime

Page 30: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 30

Quality Target

Page 31: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 31

Quality vs. Time

Page 32: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 32

Conclusions?

• Iterations increases with N

• Quality degrade as we scale?

Page 33: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 33

Search Ordering

• Default: breadth first search for shortest– O(total-paths)– O(Np) for HSRA

• Alternately: use A*:– estimated costs/path length, prune

candidates earlier– can be more depth first

• (search promising paths as long as know can’t be worse)

Page 34: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 34

Search: one-side vs. two-sides

• One-side vs. Two-sides

Page 35: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 35

Search: Oblivious vs. Directed(BFS vs. A*)

Page 36: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 36

Single-side, Directed (A*)

Only expand search windows as prove necessary to have longer route.

Page 37: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 37

Searching• In general:

– greedy/depth first searching• find a path faster• may be more expensive

– (not least delay, congest cost)

– tradeoff by weighting • estimated delay on remaining path vs. cost to this point• control greediness of router

– More greedy is faster at cost of less optimal paths (wider channels)

• 40% W 10x time reduction [Tessier/thesis’98]

Page 38: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 38

Searching

• Use alpha-beta like search– Always expanded (deepen) along shortest

…as long as can prove no other path will dominate

– Uncongested: takes O(path-length) time– Worst-case reduces to breadth-first

• O(total-paths)• O(Np) for HSRA

Page 39: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 39

Domain Negotiation

• For Conventional FPGAs (and many networks)– path freedom

• bushy in middle• low on endpoints

Page 40: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 40

Mesh Expand

1

2

4

4

2

Page 41: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 41

Multistage/Benes

Switches in all paths 0000 to 1111

Page 42: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 42

Conventional FPGA Domains

Called: subset disjoint

Page 43: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 43

Conventional FPGA Domains

Called: subset disjoint

Page 44: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 44

Domain Routing

• No point in searching along an entire path from source

• Just to find it’s heavily congested at sink

(SRC)

sink

Page 45: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 45

HSRA Domains

Page 46: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 46

Domain Negotiation

• Path bottlenecks exist at both endpoints• Most critical place for congestion• Most efficient: work search from both ends

– more limiting in A*/Alpha-Beta search– focus on paths with least (no) congestion on

endpoints first– FPGAs -- picking “domain” first– otherwise paths may look equally good up to end

(little pruning)

Page 47: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 47

Summary

• Finding short path easy/well known• Complication: need to route set of

signals– who gets which path?– Arbitrary decisions earlier limit options later

• Idea: iterate/relax using congestion history– update path costs based on congestion

• Cost adaptive to route

– reroute with new costs

• Accommodate delay and congestion

Page 48: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 48

Next Term

• Next term– Project

• Bias: Graph Machine focused– Attack EDA problems with Graph Machine

– Go through all phases• Select problem• Formulate• Literature/technique review• Propose solution• Initial implementation• Final implementation

– Select lectures• Driven by projects, interests

Page 49: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 49

Admin• This was last lecture

• Final Assignment– Due 12/7

• EAS Course Questionnaires

Page 50: CALTECH CS137 Fall2005 -- DeHon 1 CS137: Electronic Design Automation Day 22: December 2, 2005 Routing 2 (Pathfinder)

CALTECH CS137 Fall2005 -- DeHon 50

Big Ideas

• Exploit freedom

• Technique:– Graph algorithms (BFS, DFS)– Search techniques (A*, Alpha-Beta)– Iterative improvement/relaxation