c singh, june 7-8, 2010iww 2010, isatanbul, turkey advanced computers architecture, unit 2 advanced...

C SINGH, JUNE 7-8, 2010 IWW 2010, ISATANBUL, TURKEYAdvanced Computers Architecture, UNIT 2

Advanced Computers Architecture

Virtual Memory

ByRohit Khokher

Department of Computer Science, Sharda University, Greater Noida, India


Topic s of my Talk

1. Principles of Virtual Memory 2. Implementations of Virtual Memory

– Paging– Segmentation– Paging With Segmentation– Paging of System Tables– Translation Look-aside Buffers

3. Memory Allocation in Paged Systems– Global Page Replacement Algorithms– Local Page Replacement Algorithms– Load Control and Thrashing– Evaluation of Paging


Hardware and Control Structures

• Memory references are dynamically translated into physical addresses at run time– A process may be swapped in and out of main memory such that it

occupies different regions

• A process may be broken up into pieces that do not need to located contiguously in main memory

• All pieces of a process do not need to be loaded in main memory during execution


Execution of a Program

• Operating system brings into main memory a few pieces of the program

• Resident set - portion of process that is in main memory

• An interrupt is generated when an address is needed that is not in main memory

• Operating system places the process in a blocking state


• Piece of process that contains the logical address is brought into main

memory– Operating system issues a disk I/O Read request

– Another process is dispatched to run while the disk I/O takes place

– An interrupt is issued when disk I/O complete which causes the operating system to place the affected process in the Ready state


Advantages of Breaking up a Process

• More processes may be maintained in main memory– Only load in some of the pieces of each process

– With so many processes in main memory, it is very likely a process will be in the Ready state at any particular time

• A process may be larger than all of main memory


Types of Memory

• Real memory– Main memory

• Virtual memory– Memory on disk– Allows for effective multiprogramming and relieves the user of tight

constraints of main memory


Virtual Memory

Virtual memory is a technique that allows processes that may not be entirely in the memory to execute by means of automatic storage allocation upon request.

The term virtual memory refers to the abstraction of separating LOGICAL memory--memory as seen by the process--from PHYSICAL memory--memory as seen by the processor. Because of this separation, the programmer needs to be aware of only the logical memory space while the operating system maintains two or more levels of physical memory space.

The virtual memory abstraction is implemented by using secondary storage to augment the processor's main memory. Data is transferred from secondary to main storage as and when necessary and the data replaced is written back to the secondary storage according to a predetermined replacement algorithm.

If the data swapped is designated a fixed size, this swapping is called paging; if variable sizes are permitted and the data is split along logical lines such as subroutines or matrices, it is called segmentation. Some operating systems combine segmentation and paging.

http://cs.gmu.edu/cne/modules/vm/green/intro.html

http://cs.gmu.edu/cne/modules/vm/yellow/repol.html

http://cs.gmu.edu/cne/modules/vm/purple/segment.html


The diagram illustrates that a program generated address

( 1 ) or "logical address" consisting of a logical page number plus the location within that page (x) must be interpreted or "mapped" onto an actual (physical) main memory address by the operating system using an address translation function or mapper ( 2 ). If the page is present in the main memory, the mapper substitutes the physical page frame number for the logical number ( 3 ). If the mapper detects that the page requested is not present in main memory, a fault occurs and the page must be read into a frame in main memory from secondary storage

http://cs.gmu.edu/cne/modules/vm/purple/mapper.html


What do you think are the main considerations in implementing this virtual memory system?

Assignment


A System with Physical Memory Only

CPU

Memory

• Examples:– most Cray machines, early PCs, nearly all

embedded systems, etc.

Addresses generated by the CPU point directly to bytes in physical memory

PhysicalAddresses

0:1:

N-1:


A System with Virtual Memory

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• Examples:– workstations, servers, modern PCs, etc.

Address Translation: Hardware converts virtual addresses to physical addresses via an OS-managed lookup table (page table)

CPU

0:1:

N-1:

Memory

0:1:

P-1:

Page Table

Disk

VirtualAddresses

PhysicalAddresses


Page Faults (Similar to “Cache Misses”)

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CPU

Memory

Page Table

Disk

VirtualAddresses

PhysicalAddresses

CPU

Memory

Page Table

Disk

VirtualAddresses

PhysicalAddresses

Before fault After fault

• What if an object is on disk rather than in memory?– Page table entry indicates virtual address not in memory– OS exception handler invoked to move data from disk into memory

• current process suspends, others can resume• OS has full control over placement, etc.


Mapper

The mapper is the part of the operating system that translates the logical page number generated by the program into the physical page frame number where the main memory holds the page.

This translation is accomplished by using a directly indexed table called the page table which identifies the location of all the program's pages in the main store.

If the page table reveals that the page is, in fact, not resident in the main memory, the mapper issues a page fault to the operating system so that execution is suspended on the process until the desired page can be read in from the secondary store and placed in main memory.

http://cs.gmu.edu/cne/modules/vm/green/defn.html#picture

http://cs.gmu.edu/cne/modules/vm/purple/ptable.html

15

• Virtual memory (VM) is – Not a physical device but an abstract concept– Comprised of the virtual address spaces (of all processes)

• Virtual address space (VAS) (of one process)– Set of visible virtual addresses– (Some systems may use a single VAS for all processes)

• Resident set– Pieces of a process currently in physical memory

• Working set– Set of pieces a process is currently working on

Terms & Notions

Advanced Computers Architecture, UNIT 2

16

• Principle of Locality:– Memory references within a process tend to cluster– Working set should be part of the resident set to operate

efficiently (else: frequent memory access faults) honor the principle of locality to achieve this

repeated references:

single jumps:

working set:

initializationdata

initializationcode

early phase of process lifetime

code 1 code 2 data

main phase of process lifetime

finalizationcode

final phase of process lifetime

The Principle of Locality


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• Danger: Thrashing: – „Piece“ just swapped out is immediately requested again– System swaps in/out all the time, no real work is done

• Thus: „piece“ for swap out has to be chosen carefully– Keep track of „piece“ usage („age of piece“)– Hopefully „piece“ used frequently lately will be used again in near

future (principle of locality!)

lack ofmemory

find rarelyused „piece"

adjustmapping table

„piece“modified?

save HDDlocation

of „piece“

discard„piece“

no

write „piece“out to disk

yesno need to swap out complete process!!!

VM: FeaturesSwapping


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• Each process has its own virtual address space– Processes invisible to each other– Process cannot access another processes memory

• MMU checks protection bits on memory access (during address mapping)– „Pieces“ can be protected from being written to or being executed or

even being read– System can distinguish different protection levels (user / kernel mode)

• Write protection can be used to implement copy on write ( Sharing)

VM: FeaturesProtection


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• Pieces of different processes mapped to one single „piece“ of physical memory– Allows sharing of code (saves memory), e.g. libraries– Copy on write: „piece“ may be used by several processes until one

writes to it (then that process gets its own copy)– Simplifies interprocess-communication (IPC)

Piece 2

Piece 1

Virtual memoryProcess 1

Piece 0

Piece 1

Piece 2

Piece 0

Physical memory

sharedmemory Virtual memory

Process 2

Piece 1

Piece 0

Piece 2

VM: FeaturesSharing


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• VM supports– Swapping

• Rarely used „pieces“ can be discarded or swapped out• „Piece“ can be swapped back in to any free piece of physical memory

large enough, mapping unit translates addresses– Protection– Sharing

• Common data or code may be shared to save memory

• Process need not be in memory as a whole– No need for complicated overlay techniques (OS does job)– Process may even be larger than all of physical memory– Data / code can be read from disk as needed

VM: Advantages (1)


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• Code can be placed anywhere in physical memory without relocation (adresses are mapped!)

• Increased cpu utilization– more processes can be held in memory (in part)

more processes in ready state (consider: 80% HDD I/O wait time not uncommon)

VM: Advantages (2)


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• Memory requirements (mapping tables)• Longer memory access times (mapping table lookup)

– Can be improved using TLB

VM: Disadvantages


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• VM may be implemented using– Paging– Segmentation– Combination of both

VM: Implementation



Address Translation

Address translation must be fast (it happens on every memory access).

We need a fully associative placement policy.• miss penalty is huge!

We can’t afford to go looking at every virtual page to find the right one• we don’t use the tag bits approach


VM Address Translation

V = {0, 1, . . . , N–1} virtual address spaceP = {0, 1, . . . , M–1} physical address space

MAP: V P U {} address mapping function

N > M

MAP(a) = a' if data at virtual address a is present at physical address a' in P

= if data at virtual address a is not present in P

Processor

HardwareAddr TransMechanism

faulthandler

MainMemory

Secondary memorya

a'

page fault

physical addressOS performsthis transfer(only if miss)

virtual address part of the on-chipmemory mgmt unit (MMU)


VM Address Translation

• Parameters– P = 2p = page size (bytes). – N = 2n = Virtual address limit– M = 2m = Physical address limit

virtual page number page offset virtual address

physical page number page offset physical address0p–1

address translation

pm–1

n–1 0p–1p

Notice that the page offset bits don't change as a result of translation


Page Tables

Virtual PageNumber

Memory residentpage table

(physical page or disk address) Physical Memory

Disk Storage(swap file orregular file system file)

Valid

1

1

111

1

10

0

0


Address Translation via Page Table

virtual page number (VPN) page offset

virtual address

physical page number (PPN) page offset

physical address

0p–1pm–1

n–1 0p–1ppage table base register

if valid=0then pagenot in memory

valid physical page number (PPN)access

VPN acts astable index


Page Table Operation

• Translation– Separate (set of) page table(s) per process– VPN forms index into page table (points to a page table entry)

• Computing Physical Address– Page Table Entry (PTE) provides information about page

• if (valid bit = 1) then the page is in memory.– Use physical page number (PPN) to construct address

• if (valid bit = 0) then the page is on disk– Page fault– Must load page from disk into main memory before continuing

• Checking Protection– Access rights field indicate allowable access

• e.g., read-only, read-write, execute-only• typically support multiple protection modes (e.g., kernel vs. user)

– Protection violation fault if user doesn’t have necessary permission


Integrating VM and Cache

CPUTrans-lation

Cache MainMemory

VA PA miss

hitdata

• Most Caches “Physically Addressed”– Accessed by physical addresses– Allows multiple processes to have blocks in cache at same time– Allows multiple processes to share pages– Cache doesn’t need to be concerned with protection issues

• Access rights checked as part of address translation

• Perform Address Translation Before Cache Lookup– But this could involve a memory access itself (of the PTE)– Of course, page table entries can also become cached


Speeding up Translation with a TLB

• “Translation Lookaside Buffer” (TLB)– Small hardware cache in MMU– Maps virtual page numbers to physical page numbers– Contains complete page table entries for small number of pages

CPUTLB

LookupCache Main

Memory

VA PA miss

hit

data

Trans-lation

hit

miss


Address Translation with a TLB

virtual addressvirtual page number page offset

physical address

n–1 0p–1p

valid physical page numbertag

valid tag data

data=

cache hit

tag byte offsetindex

=

TLB hit

TLB

Cache

. ..


Simple Memory System Example

• Addressing– 14-bit virtual addresses– 12-bit physical address– Page size = 64 bytes

13 12 11 10 9 8 7 6 5 4 3 2 1 0

11 10 9 8 7 6 5 4 3 2 1 0

VPO

PPOPPN

VPN

(Virtual Page Number) (Virtual Page Offset)

(Physical Page Number) (Physical Page Offset)


Simple Memory System Page Table

– Only show first 16 entries

VPN PPN Valid VPN PPN Valid

00 28 1 08 13 1

01 – 0 09 17 1

02 33 1 0A 09 1

03 02 1 0B – 0

04 – 0 0C – 0

05 16 1 0D 2D 1

06 – 0 0E 11 1

07 – 0 0F 0D 1

c singh, june 7-8, 2010iww 2010, isatanbul, turkey advanced computers architecture, unit 2 advanced...

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