b.tech ii year ii semester (r09) regular & supplementary examinations · pdf...

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Code: 9A02401 R09 B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014 PRINCIPLES OF ELECTRICAL ENGINEERING (Common to EIE, E.Con.E, ECE & ECC) Time: 3 hours Max. Marks: 70 Answer any FIVE questions All questions carry equal marks ***** 1 In a series RLC circuit, R = 5 Ω, L = 1 H and C = 1 F. A dc v ltage f 20 V is applied at t = 0. Obtain i (t). 2 (a) Define and obtain transmission parameters by taking any ne example. (b) Obtain short circuit parameters for the given network shown below. 1 Ω 2 Ω 3 Ω 1 2 4 Ω 6 Ω 3 (a) Write short notes on constant K- low pass filters. (b) Design a constant K-low pass filter to match with a line having characteristic impedance of 500 Ω and to pass frequency up to 5 kHz. 4 What is an attenuator? Explain π-type attenuator and bridged T-type attenuator by deriving necessary equations. 5 Explain the magnetization and load characteristics of DC generators. 6 Discuss with suitable circuit diagram Swinburne’s test to find out the efficiency of a dc machine. 7 A single phase transformer working at 0.8 power factor leading has an efficiency of 80% at both half load, at full load of 600 W. Determine the efficiency at 75% of full oad. 8 Discuss briefly: (a) Shaded pole motor. (b) Capacitor motor. *****

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Page 1: B.Tech II Year II Semester (R09) Regular & Supplementary Examinations · PDF file · 2017-04-30B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014

Code: 9A02401 R09

B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014 PRINCIPLES OF ELECTRICAL ENGINEERING

(Common to EIE, E.Con.E, ECE & ECC)

Time: 3 hours Max. Marks: 70

Answer any FIVE questions

All questions carry equal marks

*****

1 In a series RLC circuit, R = 5 Ω, L = 1 H and C = 1 F. A dc v ltage f 20 V is applied

at t = 0. Obtain i (t).

2 (a) Define and obtain transmission parameters by taking any ne example.

(b) Obtain short circuit parameters for the given network shown below.

1 Ω 2 Ω 3 Ω

1 2

4 Ω 6 Ω

3 (a) Write short notes on constant K- low pass filters. (b) Design a constant K-low pass filter to match with a line having characteristic

impedance of 500 Ω and to pass frequency up to 5 kHz.

4 What is an attenuator? Explain π-type attenuator and bridged T-type attenuator by

deriving necessary equations.

5 Explain the magnetization and load characteristics of DC generators.

6 Discuss with suitable circuit diagram Swinburne’s test to find out the efficiency of a

dc machine.

7 A single phase transformer working at 0.8 power factor leading has an efficiency of

80% at both half load, at full load of 600 W. Determine the efficiency at 75% of full

oad.

8 Discuss briefly:

(a) Shaded pole motor. (b) Capacitor motor.

*****

Page 2: B.Tech II Year II Semester (R09) Regular & Supplementary Examinations · PDF file · 2017-04-30B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014

Code: 9A04401 R09

B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014

SWITCHING THEORY & LOGIC DESIGN (Common to EEE, EIE, E.Con.E, ECE & ECC)

Time: 3 hours Max. Marks: 70 Answer any FIVE questions

All questions carry equal marks

*****

1 (a) Explain the 7 bit Hamming code. (b) A receiver with even parity hamming code is received the data as 1110110.

Determine the correct code.

2 (a) Obtain the truth table of the following Boolean functi n and express the function as

sum of minterms and product of maxterms F = (A+B) (B+C).

(b) Simplify the following Boolean functions to minimum number of literals. (i) xyz + x’y + xyz’. (ii) xz + x’yz.

(c) Mention properties of XOR gate.

3 (a) Simplify the following Boolean function for minimal SOP form using K-map F(A,B,C,D) = ∑(0,1,2,4,5,6,8,9,12,13,14)

(b) Simplify the following Boolean function for minimal POS form using K-map F(X,Y,Z) = X’YZ + XY’Z’ + XYZ + XYZ’

4 (a) What is multiplexer? Construct 4*1 multiplexer with logic gates and truth table. (b) Design 4*16 decoder using two 3*8 decoders with block diagram.

5 Using PLA logic, implement a BCD to excess 3 code converter. Draw its truth

table and logic diagram.

6 Design a sequential circuit with two D-Flip-Flops A and B and one input x. When

x=0, the state of the circuit remains the same. When x=1, the circuit goes through

the state transitions from 00 to 01 to 11 to 10 back to 00 and repeats.

7 (a) Exp ain Mealy model with logic diagram.

(b) Explain Moore model with logic diagram.

8 (a) Explain the salient features of the ASM chart. (b) Draw an ASM chart and state diagram for the synchronous circuit having the

following description: The circuit has a control input ’x’, clock and outputs A and

B. If x=1, on every clock edge (rising or falling) the code on BA changes from and repeats. If x=0, the circuit holds the present state.

*****

Page 3: B.Tech II Year II Semester (R09) Regular & Supplementary Examinations · PDF file · 2017-04-30B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014

Code: 9A04402 R09

B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014

ELECTRONIC CIRCUIT ANALYSIS

Time: 3 hours

(Common to EIE, E.Con.E & ECE)

Max. Marks: 70

Answer any FIVE questions All questions carry equal marks

*****

1. (a) Compare CB and CC amplifiers.

(b) A common emitter amplifier is driven by a voltage source f s u ce esistance RS =

800 and the load impedance is R L = 1 k The h parameter values are hfe = 50,

hie = 1.1 k hoe = 1/40 k mhos, hre = 2.5x10-4

. Compute the AI, Ri, Av, R using

exact and approximate analysis.

2. (a) Explain about the effect of biasing resistors on Darlington pair and how this problem

is solved.

(b) Derive the current gain and input impedance of a Darlington pair.

3. (a) Obtain an expression for CE short circuit current gain. (b) A BJT has hie = 6 k and hfe = 224 at Ic = 1 mA with fT = 80 MHz and = 12pF.

Determine (a) gm (b) (c) and (d) at room temperature and a

collector current of 1 mA. Determine the parameters gm, , and of the

small signal high frequency model of the BJT.

4. (a) What is the concept of MOSFET amplifier? Explain. (b) Draw the circuit diagram of common source amplifier with resistive load? Explain its

operation.

5. (a) What are characteristics of open loop amplifiers? Explain.

(b) An amplifier requires an input signal of 60 mV to produce a certain output. With a

negative feedback to get the same output, the required input signal is 0.5V. The

voltage gain with feedback is 90. Find the loop gain and feedback factor.

6. (a) What is the function of oscillator? Explain.

(b) Draw the circuit diagram of RC phase shift BJT oscillator? Explain its operation? Show that the frequency of oscillator is f =

7. (a) What are the different types of class power amplifiers and calculate the efficiency of

direct coupled class – A power amplifier.

(b) A class – A power amplifier has a transformer as the load. If the transformer has a

turn ratio of 5 and the secondary load is 100 ohms, determine the maximum ac

power output. Given that zero signal collector current is 100 mA.

8. Obtain the bandwidth of a signal tuned transistor amplifier.

*****

JNTU World

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Code: 9A04404 R09

B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014

PULSE AND DIGITAL CIRCUITS

(Common to EIE, E.Con.E, ECE, ECC & MCT)

Time: 3 hours Max. Ma ks: 70 Answer any FIVE questions

All questions carry equal marks

*****

1 Write short note on the following: (a) Attenuators. (b) RC Double differentiator. (c) RLC ringing circuit.

2 (a) Explain transfer characteristics of the emitter coupled clipper and derive the

necessary equations.

(b) Discuss the applications of voltage comparator.

3 (a) Explain the switching characteristics of transistor. (b) Explain the phenomenon of latching in a transistor.

4 (a) Draw the circuit diagram of self bias with symmetrical triggering using diodes

explains the working.

(b) Discuss the various methods of triggering a multivibrator.

5 (a) Explain about transistor television sweep circuit. (b) List applications of voltage and current sweep generators.

6 (a) Why sampling gates are called selection circuits? (b) What are the advantages of unidirectional sampling gates?

7 What are symmetrical and asymmetrical binary circuits? Explain.

8 (a) What are the basic operating principles of both synchronization and frequency

division?

(b) Clearly explain the difference between phase delay and phase jitter with proper

analysis.

*****

JNTU World

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Downloaded From JNTU World

Code: 9A04406 R09

B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014

ELECTROMAGNETIC THEORY & TRANSMISSION LINES

(Electronics & Communication Engineering)

Time: 3 hours

Answer any FIVE questions

Max. Marks: 70

All questions carry equal marks

*****

1 (a) Find the electric due to uniformly charged sphere of charge density .

(b) Find the flux density at a point (5, /6, 0) in cylindrical co- rdinates if p tential

is .

2 Derive Poisson’s and Laplace’s equations. Explain their applications

3 (a) Obtain the expression for inductance of a torroid of circular section with ‘n’

closely spaced turns.

(b) A steady current of 1,000 A is established in a long hollow aluminum

conductor of inner radius 1 cm and outer radius 2 cm. Calculate ‘B’ as a

function of radius.

4 (a) Express the Maxwell’s equations in differential and integral forms for sinusoidal

time-varying fields.

(b) In free space find ‘H’.

5 Explain wave propagation in a conducting medium.

6 In free space (z≤ 0), a plane wave with Hi = 10 cos (108 t-βz) ax mA/V is

incident normally on a loss less medium (μ = 8 μ0 and ε = 2 ε0) in region z ≥ 0.

Determine the reflected wave Hr, Er and the transmitted wave Ht, Et.

7 Obtain the solutions of transmission line equations. Derive the expressions for

propagation constant, attenuation constant, phase constant, the characteristic

impedance and phase velocity.

8 A series RC combination, having an impedance ZL = (450-j600) Ω at 10 MHz,

is connected to a 300 Ω line. Calculate the position and length of a short

circuited stub designed to match this load to the line.

***** JNTU World

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Code: 9AHS401 R09

B.Tech II Year II Semester (R09) Regular & Supplementary Examinations June 2014

MANAGERIAL ECONOMICS & FINANCIAL ANALYSIS

(Common to EIE, E.Con.E & ECE)

Time: 3 hours Max. Ma ks: 70

Answer any FIVE questions

All questions carry equal marks

*****

1 Discuss the nature and scope of managerial economics?

2 What elasticity of demand is important? Explain the fact rs g verning elasticity of

demand.

3 How BEP can be used for taking add or drop decisions? Illustrate.

4 (a) Define market and explain how markets are classified? (b) What are the important features in any market structure?

5 Discuss the company features of form of business organization.

6 (a) Explain the factors affecting the requirements of working capital. (b) Determine the capital, and its features.

7 Briefly explain the following: (a) Tangible assets. (b) Fixed assets. (c) Intangible assets. (d) Inventory.

8 How are ratios’s classified for the purpose of financial analysis? With assumed

data, illustrate any two types of ratios under each category?

*****

JNTU World