bryant and o’hallaron, computer systems: a programmer…ece600/lectures/lecture01.pdf · bryant...

Bryant and OrsquoHallaron Computer Systems A Programmerrsquos Perspective Third Edition

18-600 ldquoFoundations of Computer Systemsrdquo

(Fall 2017)

Instructors

John P Shen amp Gregory Kesden

Head TAs

Abhinav Jauhri amp Gautam Arakalgud

18-600 Lecture 18282017 (copyJP Shen) 1

Welcome Tohellip The Newhellip


Lecture 1ldquoCourse Introduction amp Overviewrdquo

John P Shen amp Gregory KesdenAugust 28 2017

8282017 (copyJP Shen) 18-600 Lecture 1 2

18-600 Foundations of Computer Systems

Required Reading Assignmentbull Chapter 1 of CSAPP (3rd edition) by Randy Bryant amp Dave OrsquoHallaron

Assignments for This Week Check out our Piazza site httpspiazzacomcmufall201718600home Complete the short survey httpsgooglformsvxD83w75bgyuONlg2 If you are still deciding on taking this course please decide this week




1 Course Introductiona The New 18-600 FCSb Teaching amp Support Staffc Course Organizationd Course Policy

2 Course Overviewa Tour of Computer Systems b Lab Assignments Overview


Bryant and OrsquoHallaron Computer Systems A Programmerrsquos Perspective Third EditionCarnegie Mellon

CS 410OperatingSystems

CS 411Compilers

ProcessesMem Mgmt

CS 441Networks

NetworkProtocols

ECE 447Architecture

ECE 349Embedded

Systems

CS 412OS Practicum

CS 122ImperativeProgramming

CS 415Databases

Data RepsMemory Model

ECE 340Digital

Computation

MachineCode Arithmetic

ECE 348Embedded

System Eng

Introduction to Computer SystemsUnderlying principles for hardware

software and networking (ICS+)

Execution ModelMemory System

ECE 545549Capstone

CS 440Distributed

systems

Network ProgConcurrency


What Is 18-600 (FCS) hellip starting with 15-513 hellip

1518-21315-513



18-600 = 15-513 + (15-349) + 18-640abridged

18-600(FCS)

1518-21315-513

ECE 18-742Computer

Architecture

ECE 18-447Introduction to

Computer Architecture

CS 15-349Computer Arch

18-640Foundations of Computer Arch

CS 15-740Computer

Architecture

Programmerrsquos Perspective of Computer Systems

Architectrsquos Perspective of Computer Systems



Course Assumptions and Expectations

Who should take 18-600 Graduate students (MSPhD in ECE MS in INI)

o Applications and systems programming Broad computing systems expertiseo Computer systems design and development Computer architectrsquos mindset

Assumed undergraduate background CC++ programming amp Unix operating systems experience Digital logic design and computer organization BS courses Assembly language (preferably x86) programming exposure

Course expectations Focusing on foundational principles and key insights in-class interactions encouraged Emphasis on hands-on lab assignments to gain deeper understanding and personal skills Assume self motivated and disciplined students with professional integrity and attitude



Course Objectives and CMU Distinctives

Smarts Broad Knowledge Base What and how much you know

Skills Superb Hands-on Builder What you can do and implement

Sense Great Insights amp Intuition How you think and solve problems

Savvy High Industry Awareness How you come across and interact


Instructors

John P Shen (SV)

Gregory Kesden (PGH)

Academic Services Assistants

Michelle Mahouski (PGH)

Brittany Jade Reyes (SV)

Head Teaching Assistants

Abhinav Jauhri (SV)

Gautam Arakalgud (PGH)


18-600 Cast of Characters


Teaching Assistants (PGH) Jithin Yaratapalli (Sec A) Sampath Chanda (Sec A) Akanksha Periwal (Sec B) Gautam Arakalgud (Sec B) Abhiroop Kaginalkar (Sec C) Prerit Rodney (Sec C) Harish Dattatraya Dixit (Sec D) Mani Swetha Mandava (Sec D)

Teaching Assistants (SV) Daniel Min-Hao Chen (Sec SA) Siyang Mai (Sec SA) Abhinav Jauhri (Sec SB)




Prof John Paul Shen


Academia (1982-2000)

Carnegie Mellon University

Computer Aided Design


Industry (2000-2015)

Intel Research Lab SuperscalarMulticore Processors

Nokia Research Center MobileCloud Computing Systems

Academia (2015-present)

Carnegie Mellon University (Silicon Valley Campus)

Human Mobility Analytics and Services (HUMANS)


Prof Gregory Kesden



Computer Science Department Clemson University 1998-1999 Introductory courses data structures databases

School of Computer Science (SCS) CMU 1999-2015 Distributed systems networking operating systems computer systems

databases etc

Computer Science and Engineering (CSE) UCSD 2015-2017 Operating systems cloud computing software engineering introductory courses etc

Information Networking Institute (INI) CMU 2017-death Cloud computing distributed systems networking computer systems etc

Trivia

Firearms instructor EMT ownerpilot 42rsquo ocean trawler


Textbooks Two Required Two Optional

Required Textbooks1 Randal E Bryant and David R OrsquoHallaron

bull Computer Systems A Programmerrsquos Perspective Third Edition (CSAPP3e) Pearson 2016bull httpcsappcscmuedubull This book really matters for the course

bull How to solve labsbull Practice problems typical of exam problems

2 Brian Kernighan and Dennis Ritchie bull The C Programming Language Second Edition Prentice Hall 1988bull Still the best book about C from the originators

Recommended References1 [Optional] John P Shen and Mikko Lipasti (supplement to CSAPP Chapter 4)

bull Modern Processor Design Fundamentals of Superscalar Processors 2005 reissued by Waveland Press Inc 2013 ISBN 10 1478607831 ISBN 13 9781478607830

2 [Optional] Michel Dubois Murali Annavaram and Per Stenstrombull Parallel Computer Organization and Design by Cambridge University Press 2012 ISBN 978-0-521-88675-8




Class Schedule ndash Fall 2017


Course Components

bull Lectures (27)bull Higher level and foundational concepts

bull Recitations (14)bull Applied concepts important tools and skills for labs clarification of lectures exam coverage

bull Labs (7)bull The heart of the course

bull ~2 weeks for each lab assignment

bull Provide in-depth understanding of an aspect of computer systems

bull Programming measurement and analysis

bull Exams (Midterm + Final)bull Test your understanding of concepts key principles and specific techniques




Course Grading Distribution

RECITATIONS(Led by TArsquos) LAB Assignments 50

(7) Individual lab assignments with varying weightsWill allow teams of two for Lab Assignments 5-7

LECTURES(Instructors)

Mid-Term EXAM 20In class Exam (110 minutes) covering Lectures 1-15 and Lab Assignments 1-4

Final EXAM 30In class Exam (180 minutes) covering Lectures 16-27 and Lab Assignments 5-7

EXTRA CREDITS Class Participation Online Contribution 5

Active participation in lectures and recitations Active contribution in Piazza QampA discussions


bull Lab work bull You must work alone on Lab Assignments

bull Will allow teams of two for Lab Assignments 5-7

bull Hand-insbull Labs are due at 1159pm (PT) usually on a Thursday or Friday

bull Electronic handins using Autolab (no exceptions)

bull Examsbull Exams will be held in class

bull Appealing gradesbull Talk to one of the TAs first with possible escalation to the instructors


Course Policies Labs And Exams


Cheating Description

bull Please pay close attention especially if this is your first semester at CMU

bull What is cheatingbull Sharing code by copying retyping looking at or supplying a filebull Describing verbal description of code from one person to anotherbull Coaching helping your friend to write a lab line by linebull Searching the Web for solutionsbull Copying code from a previous course or online solution

bull You are only allowed to use code we supply or from the CSAPP website

bull What is NOT cheatingbull Explaining how to use systems or toolsbull Helping others with high-level design issues

bull See the course syllabus for detailsbull Ignorance is not an excuse



Cheating Consequences

bull Penalty for cheating (No Exceptions)bull Any cheating on an assignment will result in zero credit for that assignmentbull Repeated cheating will result in removal from course with failing gradebull Any cheating will leave a permanent negative mark on your record at CMU

results in the immediate loss of scholarship money for INI students (even for the 1st offense) and could even lead to being expelled from CMU

bull Detection of cheatingbull We have very sophisticated tools for detecting code plagiarism donrsquot test usbull Last Fall a handful of students were caught cheating and failed the course

bull Just donrsquot do itbull Start earlybull Ask the staff for help when you get stuck



Getting Help

bull Class Web page httpececmuedu~ece600bull Complete schedule of lectures exams and assignments

bull Copies of lectures assignments exams solutions

bull Clarifications to assignments

bull The afs directory for 18-600 is at afsececmueduclassece600

bull We will use Piazza in this course for communication httpspiazzacomcmufall201718600home

bull Office Hoursbull Recitations other than presenting planned material there is time for QampA

bull Each TA will have weekly office hours beyond the recitation sessions (TBA)

bull If necessary send email to your TA to arrange a special help session





1 Course Introductiona Birth of the New 18-600b Teaching amp Support Staffc Course Organizationd Course Policy




Anatomy of a Computer System SWHW


Application programs

Processor Memory IO devices

Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE

What is a Computer System Software + Hardware

Programs + Computer [Application program + OS] + Computer

Programming Languages + Operating Systems + Computer Architecture


COMPILER

OS

ARCHITECTURE

Anatomy of a Computer System Compiler


Pre-

processor(cpp)

helloi Compiler(cc1)

hellos Assembler(as)

helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)


Anatomy of a Computer System OS


Operating system


Processes

FilesNIC

Virtual memory

Application programsUser Mode

Kernel Mode

system calls upcalls

commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10


Operating System Abstractions


hardware network interface

OS TCPIP protocols

application sockets

Abstraction 4 Messaging

hardware disk

OS files directories

application copy file1 file2

Abstraction 3 File System

hardware physical memory

OS virtual memory

application address space

Abstraction 2 Virtual memory

hardware computer

OS process

application application

Abstraction 1 Processes


What is a Computer


bull The Classic Von Neumann Computation Model Proposed in 1945 by John Von Neumann and others (Alan Turing J Presper Eckert and John Mauchly)

bull A ldquoStored Program Computerrdquo1 One CPU

bull One Control Unitbull Program Counterbull Instruction Register

bull One ALU (Data Path)

2 Monolithic Memorybull Data Storebull Instruction Store

3 Sequential Execution Semanticsbull Instructions from an Instruction Set



Operating system

Computer


Typical Computer (PC) Today HW Organization


Main

memoryIO

bridgeBus interface

ALU

Register file

CPU

System bus Memory bus

Disk

controller

Graphics

adapter

USB

controller

Mouse Keyboard Display

Disk

IO busExpansion slots for

other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7


Example Memory Hierarchy


Regs

L1 cache

(SRAM)

Main memory(DRAM)

Local secondary storage

(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices

Remote secondary storage

(distributed file systems Web servers)

Local disks hold files retrieved

from disks on remote network

servers

Main memory holds disk blocks

retrieved from local disks

L2 cache

(SRAM)

L1 cache holds cache lines retrieved

from the L2 cache

CPU registers hold words retrieved from cache

memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache

(SRAM)L3 cache holds cache lines retrieved

from memory

L6

CSAPPChapter 6


Reading ldquohellordquo command from the keyboard


Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10


Loading executable from disk to main memory


Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10


Writing output string from memory to display


Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10


Network interface is another IO device


Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller

MouseKeyboard Monitor

Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11


Multicore Processor Organization (TLP)


Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache

(shared by all cores)

Main memory

Processor package

CSAPPChapter 12


Lab Assignments Overview

7 Lab Assignments

bull L1 (Data Lab) Manipulating bits

bull L2 (Bomb Lab) Defusing a binary bomb

bull L3 (Arch Lab) Processor design amp performance improvements

bull L4 (Shell Lab) Writing your own Unix shell

bull L5 (Cache Lab) Cache optimization amp cache coherence

bull L6 (Malloc Lab) Write your own malloc package

bull L7 (Proxy Lab) Write your own Web proxy



Data and Programs

bull Topicsbull Bits operations arithmetic assembly language programs

bull Representation of C control and data structures

bull Includes aspects of architecture and compilers

bull Assignmentsbull L1 (Data Lab) Manipulating bits



CSAPPCh 2

CSAPPCh 3


Processor Architecture

bull Topicsbull Pipelined processor design and performance

bull Superscalar and Out-of-order processor designs

bull Performance and Power tradeoffs

bull Assignmentsbull L3 (Arch Lab) Processor design amp performance improvementsbull Learn how to design modern processors


CSAPPCh 4 amp 5


Exceptional Control Flow

bull Topicsbull Hardware exceptions processes process control Unix signals nonlocal

jumps

bull Includes aspects of compilers OS and architecture

bull Assignmentsbull L4 (Shell Lab) Writing your own Unix shellbull A first introduction to concurrency


CSAPPCh 8 amp 10


Memory Hierarchy

bull Topicsbull Memory technology memory hierarchy caches disks locality

bull Multi-core cache coherence multi-threaded workloads

bull Includes aspects of architecture and OS

bull Assignmentsbull L5 (Cache Lab) Cache optimization amp cache coherencebull Learn how to exploit locality in your programs


CSAPPCh 5 amp 6


Virtual Memory

bull Topicsbull Virtual memory address translation dynamic storage allocation


bull Assignmentsbull L6 (Malloc Lab) Writing your own malloc packagebull Get a real feel for systems-level programming


CSAPPCh 9


Networking and Concurrency

bull Topicsbull High level and low-level IO network programming

bull Internet services Web servers

bull Concurrency concurrent server design threads

bull IO multiplexing with selectbull Includes aspects of networking OS and architecture

bull Assignmentsbull L7 (Proxy Lab) Writing your own Web proxybull Learn network programming and more about concurrency and synchronization


CSAPPCh 11 amp 12


Timeliness on Lab Assignments

bull Grace Daysbull 5 grace days total for the semester

bull Limit of 2 grace days per lab used automatically

bull Covers scheduling crunch out-of-town trips illnesses minor setbacks etc

bull Save them until late in the semester

bull Lateness Penaltiesbull Once grace day(s) are used up will get penalized 10 per day late

bull No hand-ins later than 3 days after due date

bull Advice

bull Once you start running late itrsquos really hard to catch up


Lecture 2ldquoComputer Systems Big Picturerdquo




Recommended References Chapters 1 and 2 of Shen and Lipasti (SnL) ldquoAmdahlrsquos and Gustafsonrsquos Laws Revisitedrdquo by Andrzej Karbowski (2008)






Required Reading Assignmentbull Chapter 1 of CSAPP (3rd edition) by Randy Bryant amp Dave OrsquoHallaron

Assignments for This Week Check out our Piazza site httpspiazzacomcmufall201718600home Complete the short survey httpsgooglformsvxD83w75bgyuONlg2 If you are still deciding on taking this course please decide this week









CS 411Compilers

ProcessesMem Mgmt

CS 441Networks

NetworkProtocols

ECE 447Architecture

ECE 349Embedded

Systems

CS 412OS Practicum


CS 415Databases


ECE 340Digital

Computation


ECE 348Embedded

System Eng




ECE 545549Capstone

CS 440Distributed

systems




1518-21315-513



18-600 = 15-513 + (15-349) + 18-640abridged

18-600(FCS)

1518-21315-513

ECE 18-742Computer

Architecture





CS 15-740Computer

Architecture


















Instructors

John P Shen (SV)






Abhinav Jauhri (SV)










Prof John Paul Shen













Prof Gregory Kesden





databases etc



Trivia
















Course Components












































Getting Help





















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice
















CS 411Compilers

ProcessesMem Mgmt

CS 441Networks

NetworkProtocols

ECE 447Architecture

ECE 349Embedded

Systems

CS 412OS Practicum


CS 415Databases


ECE 340Digital

Computation


ECE 348Embedded

System Eng




ECE 545549Capstone

CS 440Distributed

systems




1518-21315-513



18-600 = 15-513 + (15-349) + 18-640abridged

18-600(FCS)

1518-21315-513

ECE 18-742Computer

Architecture





CS 15-740Computer

Architecture


















Instructors

John P Shen (SV)






Abhinav Jauhri (SV)










Prof John Paul Shen













Prof Gregory Kesden





databases etc



Trivia
















Course Components












































Getting Help





















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice










18-600 = 15-513 + (15-349) + 18-640abridged

18-600(FCS)

1518-21315-513

ECE 18-742Computer

Architecture





CS 15-740Computer

Architecture


















Instructors

John P Shen (SV)






Abhinav Jauhri (SV)










Prof John Paul Shen













Prof Gregory Kesden





databases etc



Trivia
















Course Components












































Getting Help





















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice























Instructors

John P Shen (SV)






Abhinav Jauhri (SV)










Prof John Paul Shen













Prof Gregory Kesden





databases etc



Trivia
















Course Components












































Getting Help





















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice














Prof John Paul Shen













Prof Gregory Kesden





databases etc



Trivia
















Course Components












































Getting Help





















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice









Prof Gregory Kesden





databases etc



Trivia
















Course Components












































Getting Help





















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice






















Course Components












































Getting Help





















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











































Getting Help





















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice



















Operating system

Software

(programs)

Hardware

(computer)

COMPILER

OS

ARCHITECTURE





COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice









COMPILER

OS

ARCHITECTURE



Pre-

processor(cpp)



helloo Linker(ld)

hellohelloc

Source

program

(text)

Modified

source

program

(text)

Assembly

program

(text)

Relocatable

object

programs

(binary)

Executable

object

program

(binary)

printfo



Operating system

Software

(programs)

Hardware

(computer)




Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











Operating system


Processes

FilesNIC

Virtual memory


Kernel Mode


commands interrupts

Computer

CSAPPCh 2 amp 3

CSAPPCh 8 amp 9

CSAPPCh 4 amp 5

CSAPPCh 6 9 10





OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice












OS TCPIP protocols

application sockets


hardware disk





OS virtual memory



hardware computer

OS process




What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice









What is a Computer










Operating system

Computer




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PCCSAPPChapter 4

CSAPPChapter 10

CSAPPChapter 6

CSAPPChapter 9

CSAPPChapter 5

CSAPPChapter 7




Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











Regs

L1 cache

(SRAM)

Main memory(DRAM)


(local disks)

Larger

slower

and

cheaper

(per byte)

storage

devices





servers



L2 cache

(SRAM)


from the L2 cache


memory


from L3 cache

L0

L1

L2

L3

L4

L5

Smaller

faster

and

costlier

(per byte)

storage

devices

L3 cache


from memory

L6

CSAPPChapter 6




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

PC

hello

User types

hello

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











Main

memoryIO

bridgeBus interface

ALU

Register file

CPU


Disk

controller

Graphics

adapter

USB

controller


Disk


other devices such

as network adapters

hello executable

stored on disk

PC

hello code

helloworldn

helloworldn

CSAPPChapter 10




Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











Main

memoryIO

bridgeBus interface

ALU

Register file

CPU chip


Disk

controller

Graphics

adapter

USB

controller


Disk

IO bus

Expansion slots

Network

adapter

Network

PC

CSAPPChapter 11




Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 0

Regs

L1

d-cache

L1

i-cache

L2 unified cache

Core 3

hellip

L3 unified cache


Main memory

Processor package

CSAPPChapter 12



7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice










7 Lab Assignments










Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice









Data and Programs







CSAPPCh 2

CSAPPCh 3








CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice















CSAPPCh 4 amp 5




jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice











jumps




CSAPPCh 8 amp 10


Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice









Memory Hierarchy






CSAPPCh 5 amp 6


Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice









Virtual Memory





CSAPPCh 9









CSAPPCh 11 amp 12









bull Advice
















CSAPPCh 11 amp 12









bull Advice
















bull Advice








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