bruce mayer, pe registered electrical & mechanical engineer bmayer@chabotcollege

[email protected] • ENGR-43_Lec-03-1b_Nodal_Analysis.ppt1

Bruce Mayer, PE Engineering-43: Engineering Circuit Analysis

Bruce Mayer, PERegistered Electrical & Mechanical Engineer

[email protected]

Engineering 43

Chp 3.1bChp 3.1bNodal Nodal

AnalysisAnalysis



Ckts with Voltage SourcesCkts with Voltage Sources Need Only

ONE KCL Eqn

012126

12322

k

VV

k

VV

k

V

The Remaining Eqns From the Indep Srcs

][6

][12

3

1

VV

VV

Solving The Eqns

][5.1][64

0)()(2

22

12322

VVVV

VVVVV

3 Nodes Plus the Reference. In Principle Need 3 Equations...• But two nodes are connected

to GND through voltage sources. Hence those node voltages are KNOWN



ExampleExample

+-

2SI

3SI 1SV

1SI 1R2R

3R

4R

1V2V 3V

4V

OV

R1 = 1k; R2 = 2k, R3 = 1k, R4 = 2kIs1 =2mA, Is2 = 4mA, Is3 = 4mA,Vs1 = 12 V

210 VVV Need Only V1 and V2

to Find Vo

Known Node Potential

][12:@ 133 VVVV S

Now KCL at Node 1

021

][2

0:@

121

4

1

1

2111

k

V

k

VVmA

R

V

R

VVIV S

Find Vo

To Start• Identify & Label All Nodes

• Write Node Equations

• Examine Ckt to Determine Best Solution Strategy

Notice



Example cont.Example cont.

+-

2SI

3SI 1SV

1SI 1R2R

3R

4R

1V2V 3V

4V

OV

R1 = 1k; R2 = 2k, R3 = 1k, R4 = 2kIs1 =2mA, Is2 = 4mA, Is3 = 4mA,Vs = 12 V

021

12

1][4

0:@

42212

2

42

3

32

1

1232

k

VV

k

V

k

VVmA

R

VV

R

VV

R

VVIV S

At Node 4

02

][4][2

0:@

24

2

24214

k

VVmAmA

R

VVIIV SS

To Solve the System of Equations Use LCD-multiplication and Gaussian Elimination

At Node 2



Example cont.Example cont. The LCDs

021

][2 121

k

V

k

VVmA

021

12

1][4 42212

k

VV

k

V

k

VVmA

02

][4][2 24

k

VVmAmA

][423 21 VVV *2k

*2k]3252 421 VVVV

*2k][442 VVV

(1)

(2)

(3)

Now Add Eqns (2) & (3) To Eliminate V4

][182][3642 2121 VVVVVV (4)

Now Add Eqns (4) & (1) To Eliminate V2

][11][222 11 VVVV

][5.14][182][11 22 VVVVV

][5.3][5.14][11210 VVVVVV

BackSub into (4) To Find V2

Find Vo by Difference Eqn



SuperNode TechniqueSuperNode Technique Consider This

Example Conventional Node

Analysis Requires All Currents At A Node

2 eqns, 3 unknowns...Not Good • Recall: The Current thru the

Vsrc is NOT related to the Potential Across it

But Have Ckt V-Src Reln

][621 VVV More Efficient solution:

• Enclose The Source, And All Elements In Parallel, Inside A Surface. – Call That a SuperNode

SUPERNODE

SI

06

6@ 11 SIk

VmAV

012

4@ 22

k

VmAIV S



Supernode cont.Supernode cont. Apply KCL to the

Surface

Now Have 2 Equations in 2 Unknowns

Then The Ckt Solution Using LCD Technique• See Next Slide

SUPERNODE

SI

04126

6 21 mAk

V

k

VmA

][621 VVV

• The Source Current Is interior To The Surface And Is NOT Required

Still Need 1 More Equation – Look INSIDE the Surface to Relate V1 & V2



Now Apply Gaussian ElimNow Apply Gaussian Elim

The Equations

][6 (2)

046126

(1)

21

21

VVV

mAmAk

V

k

V

Mult Eqn-1 by LCD (12 kΩ)

][6

][242

21

21

VVV

VVV

Add Eqns to Elim V2

][10][303 11 VVVV

][4][612 VVVV

Use The V-Source Rln Eqn to Find V2

SUPERNODE

SI



1V 2V

1sI

2sI

1R 2R

3R

SV

][6],[10],[20

4,10

21

321

mAImAIVV

kRkRR

ssS

Find the node voltagesAnd the power suppliedBy the voltage source

2012 VV

0101010

21 mAk

V

k

V ][10010* 21 VVVk

][2021 VVV

][40100

][1202 :adding

21

2

VVV

VV

To compute the power supplied by the voltage source We must know the current through it: @ node-1

VI

k

VVmA

k

VIV 4

610

211 mA5

BASED ON PASSIVE SIGN CONVENTION THEPOWER IS ABSORBED BY THE SOURCE!!

mWmAVP 100][5][20



Illustration using ConductancesIllustration using Conductances Write the Node Equations

• KCL At v1

At The SuperNode Have V-Constraint• v2 − v3 = vA

KCL Leaving Supernode

Now Have 3 Eqnsin 3 Unknowns• Solve Using Normal Techniques



ExampleExample Find Io

Known Node Voltages

Now KCL at SuperNode

SUPERNODE

123V

VVVV 12,6 42 The SuperNode

V-Constraint

VVV 1231

Or



Student Exercise Student Exercise

Lets Turn on the Lights for 5-7 min Students are invited to Analyze the

following Ckt• Hint: Use SuperNode

Determine the OutPut Current, IO



Numerical ExampleNumerical Example Find Io Using

Nodal Analysis Known Voltages for Sources Connected

to GND

Now KCL at SuperNode

VVVV 4,6 41

The Constraint Eqn

SUPERNODE

VVV 1223

k

k

V

k

V

k

V

k

V20

2

)4(

212

6 3322

Now Notice That V2 is NOT Needed to Find Io

• 2 Eqns in 2 Unknowns

VVVV

VVV

VVV

6.7385

------------------

eqns add and312

223

33

32

32

By Ohm’s LawmA

k

V

k

VIO 8.3

2

6.7

2 3



Complex SuperNodeComplex SuperNode Write the Node Eqns Set UP

• Identify all nodes

• Select a reference

• Label All nodes

Nodes Connected To Reference Through A Voltage Source

Eqn Bookkeeping:• KCL@ V3

• KCL@ SuperNode,

• 2 Constraint Equations

• One Known Node

+-

+ -

+-1R

2R

3R

4R

5R

6R

7R

supernode

1V

2V 3

V

4V

5V

Voltage Sources In Between Nodes And Possible Supernodes

• Choose to Connect V2 & V4



Complex SuperNode cont.Complex SuperNode cont. Now KCL at Node-3

+-

+ -

+-1R

2R

3R

4R

5R

6R

7R

supernode

1V

2V 3

V

4V

5V

Constraints Due to Voltage Sources

07

3

5

43

4

23

R

V

R

VV

R

VV

Now KCL at Supernode• Take Care Not to Omit

Any Currents

04

32

5

34

6

4

3

5

2

15

1

12

R

VV

R

VV

R

V

R

V

R

VV

R

VV

11 SVV 252 SVVV 345 SVVV

Vs1

Vs2 Vs3

5 Equations 5 Unknowns → Have to Sweat Details



Dependent SourcesDependent Sources

Circuits With Dependent Sources Present No Significant Additional Complexity

The Dependent Sources Are Treated As Regular Sources

As With Dependent CURRENT Sources Must Add One Equation For Each Controlling Variable



Numerical Example – Dep INumerical Example – Dep Isrcsrc

Find Io by Nodal Analysis

Notice V-Source Connected to the Reference Node

KCL At Node-2 Sub Ix into KCL Eqn

Mult By 6 kΩ LCD

VV 31

Then Io

0263

212

xIk

V

k

VV

Controlling Variable In Terms of Node Potential

k

VI x 6

2

06

263

2212

k

V

k

V

k

VV

VVVV 602 212

mAk

VVIO 1

321



Dep V-Source ExampleDep V-Source Example Find Io by Nodal Analysis

Notice V-Source Connected to the Reference Node

SuperNode Constraint

KCL at SuperNode

Mult By 12 kΩ LCD

VV 63

xVVV 221

212 3VVVVx 062)6(2 2211 VVVV

Controlling Variable in Terms of Node Voltage



Dep V-Source Example contDep V-Source Example cont Simplify the LCD Eqn

By Ohm’s Law

mAk

V

k

VIo 8

3

24

9

121

VV

VV

VV

VVV

5.4

184

3 and

1833

1

1

12

21



Current Controlled V-SourceCurrent Controlled V-Source Find Io

Supernode Constraint

Controlling Variable in Terms of Node Voltage

xkIVV 212

k

VI x 2

1

121 22 VVkIV x KCL at SuperNode

02

22

4 21 k

VmA

k

VmA

Multiply by LCD of 2 kΩ

][421 VVV 02 21 VV Recall

Then VV 83 2

So Finally

mAk

VIO 3

4

22



WhiteBoard WorkWhiteBoard Work

Let’s Work This Problem

Find the OutPut Voltage, VO

1K1K 1K

12V

VO

+

-

1K

IO2IX IX

bruce mayer, pe registered electrical & mechanical engineer bmayer@chabotcollege

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