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This explain Boost Filtered output value depending on input power and voltage. We can get better result depending on pulse width modulation.

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Design of PMW circuit Using TL494

Name- Rahul Kumar Roll no.-B12089

Branch- EE Course-Power Electronics Lab

Experiment No.1-Design of PMW circuit Using TL494

Objective-Design a PMW circuit Using TL494 (Single ended output operation).

Theory- A Pulse Width Modulation (PWM) Signal is a method for generating an analog signal using a digital source. A PWM signal consists of two main components that define its behavior: a duty cycle and a frequency. The duty cycle describes the amount of time the signal is in a high (on) state as a percentage of the total time of it takes to complete one cycle. The frequency determines how fast the PWM completes a cycle (i.e. 1000 Hz would be 1000 cycles per second), and therefore how fast it switches between high and low states. By cycling a digital signal off and on at a fast enough rate, and with a certain duty cycle, the output will appear to behave like a constant voltage analog signal when providing power to devices.

Principle of Operation-

There are many IC which we can use to implement a PWM circuit, Here we are using TL494.The TL494 is a fixedfrequency pulse width modulation control circuit, incorporating the primary building blocks required for the control of a switching power supply.

An internal linear sawtooth oscillator is frequencyprogrammable by two external components, RT and CT. Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across

capacitor CT to either of two control signals. The NOR gates, which drive output transistors Q1 and Q2, are enabled only when the flipflop clockinput line is in low state. This happens only during that portion of time when the sawtooth voltage is greater than the control signals. Therefore, an increase in controlsignal amplitude causes a corresponding linear decrease of output pulse width.The control signals are external inputs that can be fed into the deadtime control (Figure 1, Pin 4), the error amplifier inputs (Pins 1, 2, 15, 16), or the feedback input (Pin 3). The deadtime control comparator has an effective 120 mV input offset which limits the minimum output dead time to approximately the first 4% of the sawtoothcycle time. This would result in a maximum duty cycle of 96% with the output mode control (Pin 13) grounded, and 48% with it

connected to the reference line. Additional dead time may be imposed on the output by setting the deadtime control input to a fixed voltage, ranging between 0 to 3.3 V.

The pulse width modulator comparator provides a means for the error amplifiers to adjust the output pulse width from the maximum percent ontime, established by the

deadtime control input, down to zero, as the voltage at the feedback pin varies from 0.5 to 3.5 V. Both error amplifiers have a common mode input range from 0.3 V to (VCC 2 V), and may be used to sense power supply output voltage and current. The error amplifier outputs are active high and are ORed together at the inverting input of the pulse width modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates control of the loop. When capacitor CT is discharged, a positive pulse is generated on the output of the deadtime comparator, which clocks the pulse steering flipflop and inhibits the output transistors, Q1 and Q2. With the output mode control connected to the reference line, the pulsesteering flipflop directs the modulated pulses to each of the two output transistors alternately for pushpull operation. The output frequency is equal to half that of the oscillator. Output drive can also be taken from Q1 or Q2, when singleended operation with a maximum ontime of less than 50% is required. This is desirable when the output transformer has a ringback winding with a catch diode used for snubbing.

When higher output drive currents are required for singleended operation, Q1 and Q2 may be connected in parallel, and the output mode control pin must be tied to

ground to disable the flipflop. The output frequency will now be equal to that of the oscillator.

The TL494 has an internal 5 V reference capable of sourcing up to 10 mA of load currents for external bias circuits. The reference has an internal accuracy of 5% with

a thermal drift of less than 50 mV over an operating temperature range of 0 to 70C.

Pin Configuration and Functions-

Component Description-

(a)Operation Frequency-The oscillator provides a positive sawtooth waveform to the dead-time and PWM comparators for comparison to the various control signals.

The frequency of the oscillator is set by selecting values of components RT and CT. The oscillator charges the external timing capacitor, CT, with a constant current, the value of which is determined by the external timing resistor, RT.

In our case frequency given to us was 32 KHz so we take RT 3.6k ohm and CT 10nF.

Fig.-Our circuit diagram

(b)Dead-Time Control-The dead-time control input provides control of the minimum dead time (off time). The output of the comparator inhibits switching transistors Q1 and Q2 when the voltage at the input is greater than the ramp voltage of the oscillator. An internal offset of 110 mV ensures a minimum dead time of 3% with the dead time control input grounded. Applying a voltage to the dead-time control input can impose additional dead time.

For our case we connected DTC to Ground because in our case it was Single ended output operation which don't need DTC.

(c)Error amplifiers-

In our case it was Single ended output operation so we are only using one error amplifier(1IN) and 2IN was grounded.

Observations-

Now we take output at Vcc=5.5V

this is the output at pin 5 which gave an oscillating Sawtooth waveform.

Now we vary the potentiometer which give the varying reference voltage. So we take output voltage at different reference voltage which can we see it below (in sequence of increasing reference voltage)-