bemicrocv-a9 table of contents - intel | data center ... · gigabit ethernet phy leds, switches,...
TRANSCRIPT
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 Cover Sheet
C
1 10Friday, August 08, 2014
DescriptionRevision Author
Cowling
Date
Release to Manufacturing
Copy r i gh t 2014, Zephyr Engineering, Inc
2 I/O Connectors
DescriptionSheet
1
3 FPGA
4
5
6
7
8
9
10
FPGA Configuration
FPGA Power
DDR3 Memory
Gigabit Ethernet Phy
LEDs, Switches, Micro-SD card, Oscillators, EEprom
USB Blaster
Voltage Regulators, Power Input
Cover page
BeMicroCV-A9 Table of Contents
XB2 2014 Aug 8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EG_P1EG_P2EG_P3EG_P4EG_P5EG_P6EG_P7EG_P8
EG_P9EG_P10EG_P11EG_P12EG_P13
EG_P14EG_P15EG_P16EG_P17EG_P18
EG_P23EG_P24EG_P25EG_P26EG_P27
EG_P19EG_P20EG_P21EG_P22
EG_P28EG_P29
EG_P37EG_P38EG_P39EG_P40EG_P41
EG_P46EG_P47EG_P48EG_P49EG_P50
EG_P55EG_P56EG_P57EG_P58EG_P59
EG_P42EG_P43EG_P44EG_P45
EG_P51EG_P52EG_P53EG_P54
EG_P60
EG_P35EG_P36
EXP_PRESENT
GPIO3GPIO5GPIO7
GPIO2GPIO4GPIO6GPIO8
D IFF_RX_P1D IFF_RX_P2D IFF_RX_P3D IFF_RX_P4D IFF_RX_P5
D IFF_RX_P6D IFF_RX_P7D IFF_RX_P8
DIF F_RX_N9D IFF_RX_P9
LVDS_TX_E_N4LVDS_TX_E_N3
LVDS_TX_OCLK_N
LVDS_TX_O_N2LVDS_TX_O_N1
G PIO_C
LVDS_TX_E_P4
LVDS_TX_OCLK_P
LVDS_TX_ O_P2LVDS_TX_ O_P1
GPIO_A GPIO_B
EG_P[60:35]
EG_P[29:1]
RESET_EXPn
GPIO[8:1]
DIF F_RX_N2
DIF F_RX_N7
DIF F_RX_N1
DIF F_RX_N6
DIF F_RX_N5
DIF F_RX_N8
DIF F_RX_N4DIF F_RX_N3
DIFF_RX_P[9:1]
D IFF_RX_N[9:1]
LVDS_TX_O_P[3:0]
LVDS_TX_E_N[4:3]
LVDS_TX_O_N[3:0]GPIO1
DIFF_TX_P9 DI FF_TX_N9LVDS_TX_O_N3 LVDS_TX_ O_P3LVDS_TX_O_N0 LVDS_TX_ O_P0
G PIO_D
VCC3P3 VCC3P3
VCC3P3 VCC3P3
VCC3P3
VCC5P0
VCC5P0 VCC5P0
DIFF_RX_N[9:1] 3,4
GPIO[8:1] 3
DIFF_RX_P[9:1] 3,4
EG_P[60:35] 3,4
LVDS_TX_OCLK_P 4LVDS_TX_OCLK_N4
GPIO_A4 GPIO_B 4
EG_P[29:1]3
DIFF_TX_N9 3
DIFF_TX_P9 3
LVDS_TX_E_P4 4
LVDS_TX_O_P[3:0] 4
LVDS_TX_O_N[3:0]4
LVDS_TX_E_N[4:3]4
RESET_EXPn3
EXP_PRESENT 3
GPIO_D 4
GPIO_C4
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 I/O Connectors
C
2 10Friday, August 08, 2014
Copy r i gh t 2014, Zephyr Engineering, Inc
J4HDR_20X2
246810121416182022242628303234363840
13579
111315171921232527293133353739
J1HDR_20X2
246810121416182022242628303234363840
13579
111315171921232527293133353739
J 2MEC80_PCB
2468101214161820222426283032343638404244464850525456586062646668707274767880
13579
1113151719212325272931333537394143454749515355575961636567697173757779
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
D IFF_RX_P5D IFF_RX_P6D IFF_RX_P7D IFF_RX_P8
DIF F_RX_N5DIF F_RX_N6DIF F_RX_N7DIF F_RX_N8
DIFF_RX_P[9:1]
D IFF_RX_N[9:1]
D IFF_RX_P9
DIF F_RX_N9
EEPROM_SDAEEPROM_SCL
GPIO[8:1]
EG_P[29:1]
DIFF_TX_P9
DI FF_TX_N9
GPIO8GPIO7GPIO6GPIO5GPIO4GPIO3GPIO2GPIO1
D DR3_A0D DR3_A1D DR3_A2D DR3_A3D DR3_A4D DR3_A5D DR3_A6D DR3_A7D DR3_A8D DR3_A9D DR3_A10D DR3_A11D DR3_A12D DR3_A13
DDR3_A[13:0]
DDR3_BA1DDR3_BA0
DDR3_BA2
D DR3_CLK_PDD R3_CLK_N
D DR3_CASnD DR3_RASn
DD R3_CSnD DR3_WEn
USER_LED[8:1]
USER_LED8USER_LED7USER_LED6USER_LED5USER_LED4USER_LED3USER_LED2USER_LED1
EG_P27
EG_P10
EG_P5
EG_P1
EG_P26
EG_P16
EG_P25
EG_P15
EG_P9
EG_P4EG_P3EG_P2
EG_P28
EG_P24
EG_P11
EG_P13
EG_P29
EG_P20
EG_P8
EG_P18
EG_P14
EG_P17
EG_P23
EG_P21
EG_P7
RESET_EXPnEG_P22
EG_P12
ENET_MDC
EG_P6
EG_P19
DDR3_RESETn
DD R3_DM1DD R3_DM0
DD R3_CLK_50MHZ
DDR 3_ODT
DD R3_DQ15DD R3_DQ14DD R3_DQ13DD R3_DQ12DD R3_DQ11DD R3_DQ10DDR 3_DQ9DDR 3_DQ8DDR 3_DQ7DDR 3_DQ6DDR 3_DQ5DDR 3_DQ4DDR 3_DQ3DDR 3_DQ2DDR 3_DQ1DDR 3_DQ0
DD R3_DQS_N1DD R3_DQS_N0
DD R3_CKE
DDR3_BA[2:0]
DIP_SW[4:1]
TACT[2:1]
D DR3_DQ[15:0]
D DR3_DQS_P0D DR3_DQS_P1
DDR3_DQS_P[1:0]
DDR3_DQS_N[1:0]
DDR3_DM[1:0]
EG_P45
EG_P56
EG_P58
EG_P48
EG_P50
EG_P57
EG_P55
EG_P49
EG_P51
EG_P46
EG_P53
EXP_PRESENT
EG_P59
EG_P[60:35]
EG_P54
EG_P52
EG_P47
EG_P60
TACT1TACT2
DIP_SW1DIP_SW2DIP_SW3DIP_SW4
RE CONF
ENET_MDIO
ENET_TXD[3:0]
ENET_TXD3ENET_TXD2ENET_TXD1ENET_TXD0
ENET_TX_EN
ENET_GTX_ CLKSDCLK
ENET__RSTn
EG_P2
V REF_DDR3
V REF_DDR3
VCCIO_POWER
GPIO[8:1] 2
DIFF_TX_N9 2
DIFF_TX_P9 2
USER_LED[8:1] 8
DDR3_A[13:0] 6
DDR3_CLK_P6DDR3_CLK_N6
DDR3_RASn6DDR3_CASn6DDR3_WEn6DDR3_CSn6
DDR3_BA[2:0]6
EG_P[29:1]2
EEPROM_SDA8EEPROM_SCL8
EG_P[60:35]2,4
DIFF_RX_P[9:1]2,4
DIFF_RX_N[9:1]2,4
EXP_PRESENT2
DIP_SW[4:1]8
TACT[2:1]8
DDR3_CLK_50MHZ8
RESET_EXPn 2
DDR3_DQ[15:0] 6
DDR3_DQS_P[1:0] 6
DDR3_DQS_N[1:0] 6
DDR3_DM[1:0] 6
DDR3_CKE 6
DDR3_RESETn6
DDR3_ODT6
ENET_MDC 7ENET_MDIO 7
RE CONF 4
ENET_TXD[3:0] 7
ENET_TX_EN 7
ENET_GTX_CLK 7SDCLK 8
ENET_RSTn 7
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 FPGA
C
3 10Friday, August 08, 2014
CAD Note:Use tree-topology for termination signalsUse star via to branch out address/command/control signals from FPGAto memory devices and termination resistors
Copy r i gh t 2014, Zephyr Engineering, Inc
1.5V
1.5V
VCCIO
VCCIO
VCCIO
1.5V
R22100R 1%
1 2
TP19EE_SDA
1
R114220R DNI1%
12
TP20EE_SCL
1
B A N K 8A5CEFA9F23C8NU6H
IO,G10,CLK9P,,DIFFIO_RX_T49P,G10
IO,L7,,,DIFFIO_TX_T50P,T_A_0 L7
IO,F10,CLK9N,,DIFFIO_RX_T49N,F10
IO,K7,,,DIFFIO_TX_T50N,T_A_1 K7
IO,J7,,,DIFFIO_RX_T51P,T_A_4 J7
IO,H8,FPLL_TL_CLKOUT0,FPLL_TL_CLKOUTP,FPLL_TL_FB,,DIFFIO_TX_T52P,T_A_2 H8
IO,J8,,,DIFFIO_RX_T51N,T_A_5 J8
IO,G8,FPLL_TL_CLKOUT1,FPLL_TL_CLKOUTN,,DIFFIO_TX_T52N,T_A_3 G8
IO,J9,,,DIFFIO_RX_T53P,T_CKJ9
IO,A10,,,DIFFIO_TX_T54P,T_A_6 A10IO,H9,,,DIFFIO_RX_T53N,T_CK#H9
IO,A9,,,DIFFIO_TX_T54N,T_A_7 A9
IO,B10,,,DIFFIO_RX_T55P,T_BA_1B10
IO,A5,,,DIFFIO_TX_T56P,T_BA_0A5
IO,C9,,,DIFFIO_RX_T55N,T_BA_2C9
IO,B5,,,DIFFIO_TX_T56N,GND B5
IO,E10,CLK8P,FPLL_TL_FBP,,DIFFIO_RX_T57P,E10
IO,B6,,,DIFFIO_TX_T58P,T_CAS#B6
IO,F9,CLK8N,FPLL_TL_FBN,,DIFFIO_RX_T57N,F9
IO,B7,,,DIFFIO_TX_T58N,T_RAS#B7
IO,A8,,,DIFFIO_RX_T59P,T_A_8 A8
IO,C6,,,DIFFIO_TX_T60P,T_A_10 C6IO,A7,,,DIFFIO_RX_T59N,T_A_9 A7
IO,D6,,,DIFFIO_TX_T60N,T_A_11 D6IO,E9,,,DIFFIO_RX_T61P,T_CS#_0E9
IO,D7,,,DIFFIO_TX_T62P,T_A_12 D7IO,D9,,,DIFFIO_RX_T61N,T_CS#_1D9
IO,C8,,,DIFFIO_TX_T62N,T_A_13 C8
IO,G6,,,DIFFIO_RX_T63P,T_A_14 G6
IO,F7,,,DIFFIO_TX_T64P,T_WE#F7
IO,H6,,,DIFFIO_RX_T63N,T_A_15 H6
IO,E7,,,DIFFIO_TX_T64N,GND E7VREFB8AN0,B8,,,,B8
R20100R1%
1 2
B A N K 5B5CEFA9F23C8NU6F
IO,N16,CLK6P,,DIFFIO_RX_R41P,N16 IO,N20,,,DIFFIO_TX_R42P, N20
IO,M16,CLK6N,,DIFFIO_RX_R41N,M16
IO,N21,,,DIFFIO_TX_R42N, N21IO,N19,,,DIFFIO_RX_R43P,N19
IO,M22,FPLL_BR_CLKOUT0,FPLL_BR_CLKOUTP,FPLL_BR_FB,,DIFFIO_TX_R44P, M22IO,M18,,,DIFFIO_RX_R43N,M18
IO,L22,FPLL_BR_CLKOUT1,FPLL_BR_CLKOUTN,,DIFFIO_TX_R44N, L22
IO,K17,,,DIFFIO_RX_R45P,K17 IO,M20,,,DIFFIO_TX_R46P, M20
IO,L17,,,DIFFIO_RX_R45N,L17
IO,M21,,,DIFFIO_TX_R46N, M21IO,L19,,,DIFFIO_RX_R47P,L19
IO,K21,,,DIFFIO_TX_R48P, K21
IO,L18,,,DIFFIO_RX_R47N,L18
IO,K22,,,DIFFIO_TX_R48N, K22
VREFB5BN0,L20,,,,L20
B A N K 7A5CEFA9F23C8NU6G
GND,F17,,,,F17
IO,K20,,,DIFFIO_RX_T25P,GNDK20
IO,B16,,,DIFFIO_TX_T26P,T_DM_2 B16
IO,K19,,,DIFFIO_RX_T25N,GNDK19
IO,C16,,,DIFFIO_TX_T26N,T_DQ_23C16 IO,D17,,,DIFFIO_RX_T27P,T_DQ_21D17 IO,G17,,,DIFFIO_TX_T28P,T_DQ_22G17 IO,E16,,,DIFFIO_RX_T27N,T_DQ_20E16
IO,G16,,,DIFFIO_TX_T28N,GNDG16
IO,G18,,,DIFFIO_RX_T29P,T_DQS_2G18
IO,J19,,,DIFFIO_TX_T30P,T_RESET#J19
IO,H18,,,DIFFIO_RX_T29N,T_DQS#_2H18 IO,J18,,,DIFFIO_TX_T30N,T_DQ_19J18
IO,E15,,,DIFFIO_RX_T31P,T_DQ_17E15
IO,A15,,,DIFFIO_TX_T32P,T_DQ_18A15
IO,F15,,,DIFFIO_RX_T31N,T_DQ_16F15
IO,A14,,,DIFFIO_TX_T32N,GNDA14
IO,H16,CLK11P,,DIFFIO_RX_T33P,H16
IO,J17,,,DIFFIO_TX_T34P,T_DM_1 J17
IO,H15,CLK11N,,DIFFIO_RX_T33N,H15
IO,K16,,,DIFFIO_TX_T34N,T_DQ_15 K16
IO,C15,,,DIFFIO_RX_T35P,T_DQ_13 C15IO,G15,,,DIFFIO_TX_T36P,T_DQ_14 G15
IO,B15,,,DIFFIO_RX_T35N,T_DQ_12 B15
IO,F14,,,DIFFIO_TX_T36N,T_CKE_0 F14
IO,H14,,,DIFFIO_RX_T37P,T_DQS_1 H14
IO,B13,,,DIFFIO_TX_T38P,T_CKE_1 B13
IO,J13,,,DIFFIO_RX_T37N,T_DQS#_1 J13
IO,A13,,,DIFFIO_TX_T38N,T_DQ_11 A13
IO,E14,,,DIFFIO_RX_T39P,T_DQ_9 E14IO,J11,,,DIFFIO_TX_T40P,T_DQ_10 J11
IO,F13,,,DIFFIO_RX_T39N,T_DQ_8 F13
IO,H10,,,DIFFIO_TX_T40N,GNDH10
IO,H13,CLK10P,,DIFFIO_RX_T41P,H13
IO,G11,,,DIFFIO_TX_T42P,T_DM_0 G11
IO,G13,CLK10N,,DIFFIO_RX_T41N,G13
IO,F12,,,DIFFIO_TX_T42N,T_DQ_7 F12
IO,D13,,,DIFFIO_RX_T43P,T_DQ_5 D13IO,B12,,,DIFFIO_TX_T44P,T_DQ_6 B12
IO,C13,,,DIFFIO_RX_T43N,T_DQ_4 C13
IO,A12,,,DIFFIO_TX_T44N,T_ODT_1A12
IO,H11,,,DIFFIO_RX_T45P,T_DQS_0 H11
IO,L8,,,DIFFIO_TX_T46P,T_ODT_0L8
IO,G12,,,DIFFIO_RX_T45N,T_DQS#_0 G12
IO,K9,,,DIFFIO_TX_T46N,T_DQ_3 K9
IO,D12,,,DIFFIO_RX_T47P,T_DQ_1 D12IO,C11,,,DIFFIO_TX_T48P,T_DQ_2 C11
IO,E12,,,DIFFIO_RX_T47N,T_DQ_0 E12
IO,B11,RZQ_2,,DIFFIO_TX_T48N, B11
VREFB7AN0,C14,,,,C14
B A N K 7A5CEFA9F23C8NU6Q
IO,J22,,,DIFFIO_RX_T13N,T_DQS#_4J22
IO,J21,,,DIFFIO_RX_T13P,T_DQS_4J21
IO,H21,,,DIFFIO_RX_T9P,GNDH21 IO,G22,,,DIFFIO_TX_T16P,T_DQ_34G22
IO,G21,,,DIFFIO_RX_T9N,GNDG21
IO,F22,,,DIFFIO_TX_T16N,GNDF22 IO,E21,,,DIFFIO_TX_T10P,T_DM_4 E21
IO,E19,,,DIFFIO_RX_T11P,T_DQ_37 E19
IO,D21,,,DIFFIO_TX_T10N,T_DQ_39 D21
IO,D19,,,DIFFIO_RX_T11N,T_DQ_36 D19
IO,C21,,,DIFFIO_RX_T15P,T_DQ_33 C21
IO,C20,,,DIFFIO_TX_T12P,T_DQ_38 C20
IO,B21,,,DIFFIO_RX_T15N,T_DQ_32 B21
IO,B20,,,DIFFIO_TX_T12N,GNDB20
IO,B18,,,DIFFIO_TX_T14P,GNDB18 IO,B17,,,DIFFIO_TX_T14N,T_DQ_35 B17
C153100nF10V
12
B A N K 5A5CEFA9F23C8NU6E
IO,T19,RZQ_1,,DIFFIO_TX_R1P, T19IO,T18,,INIT_DONE,DIFFIO_RX_R2P,T18
IO,T20,,PR_REQUEST,DIFFIO_TX_R1N, T20IO,T17,,CRC_ERROR,DIFFIO_RX_R2N,T17
IO,T22,,NCEO,DIFFIO_TX_R3P, T22IO,T15,,,DIFFIO_RX_R4P, T15
IO,R22,,CVP_CONFDONE,DIFFIO_TX_R3N, R22
IO,R15,,,DIFFIO_RX_R4N, R15
IO,R21,,DEV_OE,DIFFIO_TX_R5P, R21
IO,R16,,NPERSTL0,DIFFIO_RX_R6P, R16
IO,P22,,DEV_CLRN,DIFFIO_TX_R5N, P22
IO,R17,,NPERSTL1,DIFFIO_RX_R6N, R17
IO,P19,,,DIFFIO_TX_R7P,P19
IO,P16,,,DIFFIO_RX_R8P,P16
IO,P18,,,DIFFIO_TX_R7N,P18
IO,P17,,,DIFFIO_RX_R8N,P17
VREFB5AN0,R20,,,,R20
R113110R1%
12
C87100nF10V
12
B A N K 4A5CEFA9F23C8NU6D
IO,AB13,RZQ_0,,DIFFIO_TX_B49N, AB13
IO,V13,,,DIFFIO_RX_B50N, V13
IO,AB12,,,DIFFIO_TX_B49P, AB12
IO,U13,,,DIFFIO_RX_B50P, U13
IO,T12,,,DIFFIO_RX_B51N, T12
IO,AA14,,,DIFFIO_TX_B52N,AA14 IO,T13,,,DIFFIO_RX_B51P, T13IO,AA13,,,DIFFIO_TX_B52P,AA13
IO,AB15,,,DIFFIO_TX_B53N,AB15 IO,Y14,,,DIFFIO_RX_B54N,Y14
IO,AA15,,,DIFFIO_TX_B53P,AA15
IO,Y15,,,DIFFIO_RX_B54P,Y15
IO,V14,CLK2N,,DIFFIO_RX_B55N, V14
IO,AB17,,,DIFFIO_TX_B56N,AB17
IO,V15,CLK2P,,DIFFIO_RX_B55P,V15
IO,AB18,,,DIFFIO_TX_B56P,AB18
IO,AB20,,,DIFFIO_TX_B57N,AB20
IO,Y16,,,DIFFIO_RX_B58N,Y16
IO,AB21,,,DIFFIO_TX_B57P,AB21
IO,Y17,,,DIFFIO_RX_B58P,Y17
IO,T14,,,DIFFIO_RX_B59N, T14
IO,AA17,,,DIFFIO_TX_B60N,AA17
IO,U15,,,DIFFIO_RX_B59P, U15
IO,AA18,,,DIFFIO_TX_B60P,AA18
IO,AA19,,,DIFFIO_TX_B61N,AA19 IO,V20,,,DIFFIO_RX_B62N, V20
IO,AA20,,,DIFFIO_TX_B61P,AA20
IO,W19,,,DIFFIO_RX_B62P, W19
IO,V16,CLK3N,,DIFFIO_RX_B63N, V16
IO,AB22,,,DIFFIO_TX_B64N,AB22
IO,W16,CLK3P,,DIFFIO_RX_B63P,W16
IO,AA22,,,DIFFIO_TX_B64P,AA22
IO,Y22,,,DIFFIO_TX_B65N,Y22
IO,Y20,,,DIFFIO_RX_B66N,Y20
IO,W22,,,DIFFIO_TX_B41P,W22
IO,Y19,,,DIFFIO_RX_B66P,Y19
IO,P14,,,DIFFIO_RX_B67N, P14
IO,Y21,,,DIFFIO_TX_B68N,Y21
IO,R14,,,DIFFIO_RX_B14P, R14
IO,W21,,,DIFFIO_TX_B68P,W21
IO,U22,,,DIFFIO_TX_B69N,U22
IO,V19,,,DIFFIO_RX_B70N, V19
IO,V21,,,DIFFIO_TX_B69P,V21
IO,V18,,,DIFFIO_RX_B70P, V18
IO,U16,,,DIFFIO_RX_B71N, U16
IO,U21,,,DIFFIO_TX_B72N,U21
IO,U17,,,DIFFIO_RX_B71P, U17
IO,U20,,,DIFFIO_TX_B72P, U20
VREFB4AN0,AB16,,,, AB16
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EG_P42EG_P41EG_P40EG_P39
EG_P43EG_P44
EG_P38EG_P37
LVDS_TX_E_P4
EG_P[60:35]
LVDS_TX_E_N[4:3]
EG_P36EG_P35
GPIO_AGPIO_B
DIF F_RX_N4
D IFF_RX_P4
DIF F_RX_N3
D IFF_RX_P3
DIF F_RX_N2
D IFF_RX_P2
DIF F_RX_N1
D IFF_RX_P1
FPGA_NCSO
FPGA_DATA0
LVDS_TX_O_P[3:0]
LVDS_TX_O_N[3:0]
DIFF_RX_P[4:1]
D IFF_RX_N[4:1]
LVDS_TX_OCLK_PLVDS_TX_OCLK_N
MSEL1
nSTATUS
MSEL2
MSEL4
MSEL0
nC ONFIG
DO
NE
_N
CO NF_DONE
FPGA_DCLK
FPGA_TDOFPGA_TMS
FPGA_TCK
FPGA_TDI
MSEL3
RE CONF
SDD[3:0]
S DD3S DD2S DD1S DD0S DCMD
LVDS_TX_E_N3LVDS_TX_E_N4
ENET_RXD[3:0]
ENET_RXD3ENET_RXD2ENET_RXD1ENET_RXD0
FPGA_DATA1FPGA_DATA2FPGA_DATA3
G PIO_CG PIO_D
CLK_24MHZ
ENET_RX_ DVENET_INTnENET_RX_CLK
LVDS_TX_ O_P2LVDS_TX_ O_P1LVDS_TX_ O_P0
LVDS_TX_ O_P3
LVDS_TX_O_N2LVDS_TX_O_N1LVDS_TX_O_N0
LVDS_TX_O_N3
VCCIO_POWER
VCC3P3
VCCPGM
VCCPGM
VCCPGM
EG_P[60:35] 2,3
LVDS_TX_E_P4 2
LVDS_TX_E_N[4:3] 2
LVDS_TX_O_P[3:0] 2
LVDS_TX_O_N[3:0] 2
FPGA_TDI9FPGA_TMS9
FPGA_TCK9FPGA_TDO9
DIFF_RX_N[4:1]2
DIFF_RX_P[4:1]2
LVDS_TX_OCLK_P 2LVDS_TX_OCLK_N 2
GPIO_A2GPIO_B2
RE CONF3
SDD[3:0] 8
S DCMD 8
ENET_RXD[3:0] 7
GPIO_C2GPIO_D2
CLK_24MHZ8,9
ENET_RX_ DV7ENET_INTn7
ENET_RX_CLK7
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 FPGA Configuration
C
4 10Friday, August 08, 2014
---MSEL-- 4 3 2 1 0Fast AS 1 0 0 1 0Std AS (default) 1 0 0 1 1
FPGA_JTAG
Copy r i gh t 2014, Zephyr Engineering, Inc
VCCIO
VCCIO
VCCPGMB A N K 9A
5CEFA9F23C8NU6I
MSEL0,L6,,MSEL0,,L6
CONF_DONE,K6,,CONF_DONE,, K6
MSEL1,J6,,MSEL1,,J6
NSTATUS,H5,,NSTATUS,,H5
NCE,G5,,NCE,,G5
MSEL2,A2,,MSEL2,,A2 MSEL3,E5,,MSEL3,,E5
NCONFIG,A4,,NCONFIG,,A4
MSEL4,F3,,MSEL4,,F3
GND,C5,,,,C5
R9510K1%
12 Q2
SSM3K36MFV
2
1
3
R3410K1%
12
R4010K1%
12
TP11 FPGA_TDO1
TP12 FPGA_TMS1
LED10Green
12
R99330R5%
12
U12N25Q256A13EF8
VCC8
nCS 1
DQ1 2
CLK 6
DQ0 5
W#/VPP/DQ2 3
HOLD#/DQ3 7
VSS4
PAD9
R371K
12
TP10 FPGA_TCK1
C216100nF10V
12
R980R - DNI
12
Q1SSM3K36MFV
2
1
3B A N K 3B
5CEFA9F23C8NU6C
IO,AB6,,,DIFFIO_TX_B33N, AB6
IO,V9,,,DIFFIO_RX_B34N,V9
IO,AB5,,,DIFFIO_TX_B33P, AB5
IO,V10,,,DIFFIO_RX_B34P,V10
IO,P8,,,DIFFIO_RX_B35N,P8
IO,AA7,,,DIFFIO_TX_B36N, AA7
IO,N8,,,DIFFIO_RX_B35P,N8
IO,AB7,,,DIFFIO_TX_B36P, AB7
IO,AA8,,,DIFFIO_TX_B37N, AA8
IO,T9,,,DIFFIO_RX_B38N,T9
IO,AB8,,,DIFFIO_TX_B37P, AB8
IO,U10,,,DIFFIO_RX_B38P,U10
IO,M8,CLK0N,FPLL_BL_FBN,,DIFFIO_RX_B39N,M8
IO,AA10,,,DIFFIO_TX_B40N,AA10
IO,M9,CLK0P,FPLL_BL_FBP,,DIFFIO_RX_B39P,M9
IO,AA9,,,DIFFIO_TX_B40P,AA9
IO,Y10,,,DIFFIO_TX_B41N, Y10
IO,T10,,,DIFFIO_RX_B42N,T10
IO,Y9,,,DIFFIO_TX_B41P, Y9
IO,R9,,,DIFFIO_RX_B42P,R9
IO,U11,,,DIFFIO_RX_B43N,U11
IO,R12,,,DIFFIO_TX_B44N, R12
IO,U12,,,DIFFIO_RX_B43P,U12
IO,P12,,,DIFFIO_TX_B44P, P12
IO,AB10,FPLL_BL_CLKOUT1,FPLL_BL_CLKOUTN,,DIFFIO_TX_B45N, AB10
IO,R10,,,DIFFIO_RX_B46N,R10
IO,AB11,FPLL_BL_CLKOUT0,FPLL_BL_CLKOUTP,FPLL_BL_FB,,DIFFIO_TX_B45P, AB11
IO,R11,,,DIFFIO_RX_B46P,R11
IO,P9,CLK1N,,DIFFIO_RX_B47N, P9
IO,Y11,,,DIFFIO_TX_B48N, Y11
IO,N9,CLK1P,,DIFFIO_RX_B47P, N9
IO,AA12,,,DIFFIO_TX_B48P, AA12
VREFB3BN0,Y12,,,,Y12
R251K5%
12
TP13 FPGA_TDI1
R970R
12
R9610K1%
12
R3910K1%
12
B A N K 3A5CEFA9F23C8NU6B
TDO,M5,,TDO,,M5
NCSO,R4,,DATA4,,R4
TMS,P5,,TMS,,P5
AS_DATA3,T4,,DATA3,,T4
TCK,V5,,TCK,,V5
AS_DATA2,AA5,,DATA2,,AA5
TDI,W5,,TDI,,W5
AS_DATA1,AB3,,DATA1,,AB3
DCLK,V3,,DCLK,,V3
AS_DATA0,ASDO,AB4,,DATA0,,AB4
IO,R6,,DATA6,DIFFIO_RX_B1N, R6
IO,U7,,DATA5,DIFFIO_TX_B2N, U7
IO,R5,,DATA8,DIFFIO_RX_B1P, R5
IO,U8,,DATA7,DIFFIO_TX_B2P, U8
IO,P6,,DATA10,DIFFIO_RX_B3N, P6
IO,W8,,DATA9,DIFFIO_TX_B4N, W8
IO,N6,,DATA12,DIFFIO_RX_B3P, N6
IO,W9,,DATA11,DIFFIO_TX_B4P, W9
IO,T7,,DATA14,DIFFIO_RX_B5N, T7
IO,U6,,DATA13,DIFFIO_TX_B6N, U6
IO,T8,,CLKUSR,DIFFIO_RX_B5P, T8
IO,V6,,DATA15,DIFFIO_TX_B6P, V6
IO,M6,,PR_DONE,DIFFIO_RX_B7N, M6
IO,R7,,PR_READY,DIFFIO_TX_B8N, R7
IO,M7,,PR_ERROR,DIFFIO_RX_B7P, M7
IO,P7,,,DIFFIO_TX_B8P, P7
VREFB3AN0,Y7,,,, Y7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC2P5F
V CC2P5
VCCIO_POWER
VCC2P5
V CCIO_POWER
VCC3P3
VCC2P5VCCIO_POWER
VCC2P5
VCC1P1
VCC3P3
VCCPGM
VCC1P5
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 FPGA Power
C
5 10Friday, August 08, 2014
Copy r i gh t 2014, Zephyr Engineering, Inc
Bank 2 on A2N/C on A9
VCCIO SELECTJumper 1-2 for 3.3VJumper 2-3 for 2.5V
C108100nF10V
12
C134100nF10V
12
C161100nF10V
12
C1731uF10V
12
C105100nF10V
12
C17610nF16V
12
C121100nF10V
12
C77100nF10V
12
C50100nF10V
12
C162100nF10V
12
C196100nF10V
12
C43100nF10V
12
C17110nF16V
12
C192100nF10V
12
C102100nF10V
12
C142100nF10V
12
C40100nF10V
12
5CEFA9F23C8NU6T
VCC_AUX,E6,,,,E6
VCC_AUX,D11,,,,D11
VCC_AUX,D18,,,,D18
VCC_AUX,W18,,,,W18
VCC_AUX,W13,,,,W13
VCC_AUX,W7,,,,W7
C1721uF10V
12
C136100nF10V
12
C175100nF10V
12
C14410nF16V
12
C138100nF10V
12
C92100nF10V
12
C581uF10V
12
C119100nF10V
12
C146100nF10V
12
J11JMP_3P_2MM
VCCIO SEL123
C57100nF10V
12
C5110nF16V
12
C82100nF10V
12
C189100nF10V
12
C133100nF10V
12
C152100nF10V
12
C1411uF10V
12
C80100nF10V
12
C174100nF10V
12
FB8BLM18PG600
1 2
C6610nF16V
12
C41100nF10V
12
C193100nF10V
12
C118100nF10V
12
C143100nF10V
12
5CEFA9F23C8NU6R
RREF_TL,A1,,,,A1
C56100nF10V
12
C4910nF16V
12
5CEFA9F23C8NU6J
GND,P2,,,,P2
GND,AB19,,,,AB19
GND,AB14,,,,AB14
GND,AB9,,,,AB9
GND,AB2,,,,AB2
GND,AB1,,,,AB1
GND,AA11,,,,AA11
GND,AA6,,,,AA6
GND,AA4,,,,AA4
GND,AA3,,,,AA3
GND,Y18,,,,Y18
GND,Y5,,,,Y5
GND,Y2,,,,Y2
GND,Y1,,,,Y1
GND,W4,,,,W4
GND,W3,,,,W3
GND,V22,,,,V22
GND,V17,,,,V17
GND,V12,,,,V12
GND,V7,,,,V7
GND,V4,,,,V4
GND,V2,,,,V2
GND,V1,,,,V1
GND,U9,,,,U9
GND,U5,,,,U5
GND,U4,,,,U4
GND,U3,,,,U3
GND,T21,,,,T21
GND,T16,,,,T16
GND,T2,,,,T2
GND,T1,,,,T1
GND,R13,,,,R13
GND,R3,,,,R3
GND,P10,,,,P10
GND,P4,,,,P4
GND,P1,,,,P1
GND,N22,,,,N22
GND,N17,,,,N17
GND,N15,,,,N15
GND,N13,,,,N13
GND,N11,,,,N11
GND,N7,,,,N7
GND,N5,,,,N5
GND,N3,,,,N3
GND,M14,,,,M14
GND,M12,,,,M12
GND,M10,,,,M10
GND,M4,,,,M4
GND,M2,,,,M2
GND,M1,,,,M1
C81100nF10V
12
C30100nF10V
12
C104100nF10V
12
TP7V CCIO
1
C12410uF6.3V
12
5CEFA9F23C8NU6L
VCC,N4,,,,N4
VCC,P15,,,,P15
VCC,P13,,,,P13
VCC,P11,,,,P11
VCC,P3,,,,P3
VCC,N14,,,,N14
VCC,N12,,,,N12
VCC,N10,,,,N10
VCC,M15,,,,M15
VCC,M13,,,,M13
VCC,M11,,,,M11
VCC,L16,,,,L16
VCC,L14,,,,L14
VCC,L12,,,,L12
VCC,L10,,,,L10
VCC,L4,,,,L4
VCC,K15,,,,K15
VCC,K13,,,,K13
VCC,K11,,,,K11
VCC,K5,,,,K5
VCC,K3,,,,K3
VCC,J16,,,,J16
VCC,J14,,,,J14
VCC,J12,,,,J12
VCC,J10,,,,J10
VCC,J4,,,,J4
C151100nF10V
12
C5310uF6.3V
12
C421uF10V
12
C137100nF10V
12
C1201uF10V
12
C177100nF10V
12
5CEFA9F23C8NU6P
VCCPD3A,W6,,,,W6
VCCPD3B4A,W17,,,,W17
VCCPD3B4A,W14,,,,W14
VCCPD3B4A,W12,,,,W12
VCCPD3B4A,W11,,,,W11
VCCPD5A,P21,,,,P21
VCCPD5B,N18,,,,N18
VCCPD5B,M17,,,,M17
VCCPD7A8A,D16,,,,D16
VCCPD7A8A,E11,,,,E11
VCCPD7A8A,D14,,,,D14
VCCPD7A8A,D8,,,,D8
VCCPD7A8A,C10,,,,C10
C5510nF16V
12
C19847uF6.3V
12
C84100nF10V
12
C64100nF10V
12
C132100nF10V
12
C95100nF10V
12
C1781uF10V
12
C86100nF10V
12
C10310nF16V
12
C29100nF10V
12
C122100nF10V
12
C135100nF10V
12
C39100nF10V
12
C140100nF10V
12
C179100nF10V
12
C195100nF10V
12
5CEFA9F23C8NU6O
VCCIO3A,T6,,,,T6
VCCIO3A,Y8,,,,Y8
VCCIO3B,T11,,,,T11
VCCIO3B,Y13,,,,Y13
VCCIO3B,W10,,,,W10
VCCIO3B,R8,,,,R8
VCCIO4A,U19,,,,U19
VCCIO4A,AA21,,,,AA21
VCCIO4A,AA16,,,,AA16
VCCIO4A,W20,,,,W20
VCCIO4A,W15,,,,W15
VCCIO4A,U14,,,,U14
VCCIO5A,P20,,,,P20
VCCIO5A,R18,,,,R18
VCCIO5B,M19,,,,M19
VCCIO5B,K18,,,,K18
VCCIO7A,A16,,,,A16
VCCIO7A,H17,,,,H17
VCCIO7A,G14,,,,G14
VCCIO7A,F21,,,,F21
VCCIO7A,F11,,,,F11
VCCIO7A,E18,,,,E18
VCCIO7A,D15,,,,D15
VCCIO7A,C22,,,,C22
VCCIO7A,C12,,,,C12
VCCIO7A,B19,,,,B19
VCCIO8A,A6,,,,A6
VCCIO8A,G7,,,,G7
VCCIO8A,E8,,,,E8
VCCIO8A,C7,,,,C7
5CEFA9F23C8NU6M
DNU,B3,,,,B3
DNU,B4,,,,B4
DNU,E17,,,,E17
DNU,L9,,,,L9
DNU,Y6,,,,Y6
DNU,V11,,,,V11
C107100nF10V
12
R432K1%
12
C27100nF10V
12
C65100nF10V
12
C67100nF10V
12
C1451uF10V
12
C68100nF10V
12
C190100nF10V
12
C1831uF10V
12
C1501uF10V
12
C12310uF6.3V
12
C26100nF10V
12
C194100nF10V
12
C19110nF16V
12
C83100nF10V
12
5CEFA9F23C8NU6K
GND,L21,,,,L21
GND,L15,,,,L15
GND,L13,,,,L13
GND,L11,,,,L11
GND,L5,,,,L5
GND,L3,,,,L3
GND,K14,,,,K14
GND,K12,,,,K12
GND,K10,,,,K10
GND,K8,,,,K8
GND,K4,,,,K4
GND,K2,,,,K2
GND,K1,,,,K1
GND,J20,,,,J20
GND,J15,,,,J15
GND,J5,,,,J5
GND,J3,,,,J3
GND,H22,,,,H22
GND,H12,,,,H12
GND,H7,,,,H7
GND,H4,,,,H4
GND,H3,,,,H3
GND,H2,,,,H2
GND,H1,,,,H1
GND,G19,,,,G19
GND,G9,,,,G9
GND,G4,,,,G4
GND,G3,,,,G3
GND,F16,,,,F16
GND,F6,,,,F6
GND,F5,,,,F5
GND,F2,,,,F2
GND,F1,,,,F1
GND,E13,,,,E13
GND,E4,,,,E4
GND,E3,,,,E3
GND,D20,,,,D20
GND,D10,,,,D10
GND,D5,,,,D5
GND,D2,,,,D2
GND,D1,,,,D1
GND,C17,,,,C17
GND,C4,,,,C4
GND,C3,,,,C3
GND,B14,,,,B14
GND,B9,,,,B9
GND,B2,,,,B2
GND,B1,,,,B1
GND,A21,,,,A21
GND,A11,,,,A11
C38100nF10V
12
C18810nF16V
12
C139100nF10V
12
C54100nF10V
12
C28100nF10V
12
FB6BLM18PG600
1 2
C961uF10V
12
C85100nF10V
12
C160100nF10V
12
C93100nF10V
12
5CEFA9F23C8NU6A
NC,C1,,,,C1
NC,G1,,,,G1
NC,C2,,,,C2
NC,G2,,,,G2
NC,E2,,,,E2
NC,L1,,,,L1
NC,D3,,,,D3 NC,L2,,,,L2
NC,N1,,,,N1
NC,U1,,,,U1 NC,N2,,,,N2 NC,U2,,,,U2 NC,W2,,,,W2 NC,AA1,,,,AA1 NC,Y3,,,,Y3 NC,AA2,,,,AA2
NC,W1,,,,W1
NC,D4,,,,D4
NC,Y4,,,,Y4
NC,R1,,,,R1
NC,J1,,,,J1
NC,E1,,,,E1
NC,R2,,,,R2
NC,J2,,,,J2
NC,H20,,,,H20
NC,G20,,,,G20
NC,F20,,,,F20
NC,F19,,,,F19
NC,F18,,,,F18
NC,E22,,,,E22
NC,E20,,,,E20
NC,D22,,,,D22
NC,C19,,,,C19
NC,C18,,,,C18
NC,B22,,,,B22
NC,A22,,,,A22
NC,A20,,,,A20
NC,A19,,,,A19
NC,A18,,,,A18
NC,A17,,,,A17
5CEFA9F23C8NU6S
VCCA_FPLL,M3,,,,M3
VCCA_FPLL,T3,,,,T3
VCCA_FPLL,T5,,,,T5
VCCA_FPLL,F4,,,,F4
VCCA_FPLL,U18,,,,U18
VCCA_FPLL,H19,,,,H19
C76100nF10V
12
C106100nF10V
12
C79100nF10V
12
C18410nF16V
12
C94100nF10V
12
C78100nF10V
12
C170100nF10V
12
C18110nF16V
12
C182100nF10V
12
5CEFA9F23C8NU6N
VCCPGM,V8,,,,V8
VCCPGM,R19,,,,R19
VCCPGM,F8,,,,F8
VCCBAT,A3,,,,A3
C52100nF10V
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR 3_DQ5
DD R3_DQ11
DDR 3_DQ6
DD R3_DQ12
DDR 3_DQ0DDR 3_DQ1
DDR 3_DQ7
DD R3_DQ13
DDR 3_DQ2
DDR 3_DQ8
DD R3_DQ14
DDR 3_DQ3
DDR 3_DQ9
DD R3_DQ15
DDR 3_DQ4
DD R3_DQ10
D DR3_DQS_P0D DR3_DQS_P1DD R3_DQS_N0DD R3_DQS_N1
DD R3_DM0DD R3_DM1
D DR3_WEnD DR3_RASn
DDR3_BA2DDR3_BA1
DDR3_RESETnDDR 3_ODT
DDR 3_ZQ01
DD R3_CSn
DD R3_CKE
DD R3_CLK_N
D DR3_CASn
D DR3_CLK_P
DDR3_BA0
D DR3_A6
D DR3_A4
D DR3_A12
D DR3_A11
D DR3_A7
D DR3_A5
D DR3_A3
D DR3_A0
D DR3_A5
D DR3_A11
D DR3_A8
D DR3_A0
D DR3_A8
D DR3_A3
D DR3_A2
D DR3_A4
D DR3_A13
D DR3_A6
DDR3_A[13:0]
D DR3_A7
D DR3_A9
D DR3_A2D DR3_A1
D DR3_A13
D DR3_A10
D DR3_A10
D DR3_A12
D DR3_A9
D DR3_A1
D DR3_DQ[15:0]
DDR3_DQS_P[1:0]
DDR3_DQS_N[1:0]
VCC1P5
V REF_DDR3
0.75V_VTT
0.75V_VTT
0.75V_VTT
DDR3_A[13:0]3
DDR3_CKE3DDR3_CLK_P3DDR3_CLK_N3
DDR3_DM03DDR3_DM13
DDR3_CSn3DDR3_WEn3DDR3_RASn3DDR3_CASn3
DDR3_BA03DDR3_BA13DDR3_BA23
DDR3_RESETn3DDR3_ODT3
DDR3_DQ[15:0] 3
DDR3_DQS_P[1:0] 3
DDR3_DQS_N[1:0] 3
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 DDR3 Memory
C
6 10Friday, August 08, 2014
Copy r i gh t 2014, Zephyr Engineering, Inc
CAD Note:Place cap arrays nearresistors and on thesame side of PCB
C70100nF10V
12
R7656R21%
12
R78 56R2 1%12
R81 56R2 1%12
C97100nF10V
12
CN1100nFx416V
17
3546
28
C110100nF10V
12
C127100nF10V
12
R694K71%
12
R8056R21%
12
R85 56R2 1%12
R87 56R2 1%12
C91uF10V
12
C59100nF10V
12
R77 56R2 1%12
R84 56R2 1%12
R7156R2 DNI1%
12
C125100nF10V
12
R7256R21%
12
R67100R1%
12
R86 56R2 1%12
R90 56R2 1%12CN3100nFx416V
17
3546
28
C69100nF10V
12
R89 56R2 1%12
R83 56R2 1%12
C163100nF10V
12
C101uF10V
12
R6856R21%
12
R92 56R2 1%12
R70 56R2 1%12
C89100nF10V
12
R7556R21%
12
C154100nF10V
12
R7356R21%
12
CN2100nFx416V
17
3546
28
C98100nF10V
12
R88 56R2 1%12
C88100nF10V
12
C126100nF10V
12
R21240R
12
R9156R21%
12
C164100nF10V
12
R7456R21%
12
C71100nF10V
12
C109100nF10V
12
C60100nF10V
12
R7956R21%
12
C155100nF10V
12
U 5MT41J64M16LA
A5P2 A4P8 A3N2 A2P3 A1P7 A0N3
NC_L9 L9
A10/APL7
A11R7
A12/BCnN7
RESETnT2 VSSQ B1
VSSQ B9
VSSQ D1
A9R3 A8T8 A7R2 A6R8
NC/A15M7
NC_J1 J1
NC_L1 L1
ZQ L8
CK_NK7
WEL3
CKEK9
NC/A13T3
ODTK1
NC_J9 J9
RASJ3
CK_PJ7
CSL2
BA0M2
BA1N8
BA2M3
CASK3
DM1D3
NC/A14T7
DM0E7
VDDB2
VDDD9
VDDG7
VDDK2
VSS A9
VSS B3
VSS E1
VSS G8
DQ0 E3
DQS0p F3
DQ1 F7
DQ2 F2
DQ3 F8
DQ4 H3
DQ5 H8
DQ6 G2
DQ7 H7
DQ8 D7
DQ9 C3
DQ10 C8
DQ11 C2
DQ12 A7
DQ13 A2
DQ14 B8
DQ15 A3
DQS1p C7
DQS0n G3
DQS1n B7
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VDDQH9
VDDK8
VDDN1
VDDN9
VDDR1
VDDR9
VREFDQ H1
VREFCA M8
VSSQ G1
VSSQ G9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
VDDQD2
VDDQE9
VDDQF1
VDDQH2
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
R82 56R2 1%12
C61100nF10V
12
C147100nF10V
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ENET_RSTn
ENET_TX_EN
ENET_LED2_LINKENET_LED1_ACT
ENET_TXD2
ENET_TXD0
ENET_TXD3
ENET_TXD1
ENET_ISET
1P2V_AVDDL
1P2V_DVDDL
ENET_LED_MODE
M DI_N1MDI_P2
MDI_P1
M DI_N2MDI_P3M DI_N3
M DI_N0MDI_P0
ENET_TXD[3..0]
ENET_RXD[3. .0]
OSC_ENET_25M
ENET_RX_CLK
ENET_RXD3ENET_RXD2
ENET_MDC
ENET_RXD1
ENET_MDIO
ENET_INTn
ENET_RXD0C T4
C T3
C T2
C T1
VCCI O_DVDDH
3P3V_AVDDH
1P2V_PHY
1P2V_AVDDL_PLL
ENET_GTX_ CLK
ENET_RX_ DV
VCCIO_POWER
VCC5P0
VCC3P3
VCC3P3
VCC3P3
VCC3P3
VCCIO_POWER
VCCIO_POWER
V CCIO_POWER
ENET_MDC3ENET_MDIO3
ENET_RSTn3
ENET_GTX_ CLK 3
ENET_TX_EN 3
ENET_TXD[3:0] 3
ENET_INTn4
ENET_RX_CLK 4
ENET_RX_DV 4
ENET_RXD[3:0] 4
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 Gigabit Ethernet
C
7 10Friday, August 08, 2014
10/100/1000 Ethernet
Copy r i gh t 2014, Zephyr Engineering, Inc
C11110nF10V
12
R274K71%
12
C4510nF10V
12
C4422uF6.3V
12
C16510nF10V
12
R314K71%
12
FB5HI0805O121R-10
1 2
R1110K1%
12
C12910nF10V
12
TP41.2V_PHY1
TP9RX_CLK
1
C16610nF10V
12
R234K71%
12
C3310nF10V
12
FB3HI0805O121R-10
1 2
R45240R5%
1 2
R324K71%
12
R710R1%
1 2
C11210nF10V
12
TP8TX_CLK
1
U425MHz
VDD 4
GND2 OUT 3
EN1
R1010K1%
12
C128100nF10V
12
C11310nF10V
12
C180100nF10V
12
C18610uF6.3V
12
C14910uF6.3V
12
R334K71%
12
C3410nF10V
12
R54240R5%
1 2
C11410nF10V
12
FB4HI0805O121R-10
1 2
C11510nF10V
12
C16810uF6.3V
12
C99100nF10V
12
C13100nF10V
12
R244K71%
12
C32100nF10V
12
C4610nF10V
12
C15810nF10V
12
R194K991%
1 2
U7BK SZ9021RN
DVDDL 39
DVDDH40
LDO_O 43AVDDL_PLL 44
AVDDH47
P_GND49
VSS29 VSS_PS13
AVDDL 9
AVDDL 4AVDDH1 AVDDH12
DVDDL 30
DVDDL 26
DVDDL 23
DVDDL 14DVDDH16 DVDDL 18
DVDDH34
C6210uF6.3V
12
FB1HI0805O121R-10
1 2
R284K71%
12
C14810nF10V
12
C13010nF10V
12
C31100nF10V
12
C131100nF10V
12 C117
10uF6.3V
12
FB2HI0805O121R-10
1 2
MDI INTERFACE
U7AK SZ9021RN
TXRXP_A2
LED1_PHYAD017
TXRXP_D10
TXRXP_C7
TXRXM_C8
TXRXP_B5
TXRXM_B6
TXRXM_A3
TXRXM_D11
LED2_PHYAD115
TXD1 20
TXD0 19
GTX_CLK 24
RXD0_MODE0 32
RX_DV_CLK125_EN 33
TXD3 22
RXD2_MODE2 28
TX_EN 25
RXD3_MODE3 27
RXD1_MODE1 31
TXD2 21
RX_CLK_PHYAD2 35
MDC36
MDIO37
INT_N38
XO45 XI46
ISET48
RESET_N42
CLK125_NDO_LED_MODE 41
R294K71%
12
C11610nF10V
12
J3
RJ45 (L829)
GIG-E
TRD1+ 11
TRD1- 10
TRD2+ 4
TRD2- 5
TRD3+ 3
TRD3- 2
L1A14
L2GR 17
L2COM 16
L1K13
TRD4+ 8
TRD4- 9
TRCT112
SHLD18
SHLD219
TRCT26
TRCT31
TRCT47
L2OR 15
L31.5uH
1 2ADP2120U1
VIN1
PVIN2
S/MODE9
EN10
TRK7
SW 3
FB 6
PGOOD 8
PGND 4GND5
PAD11
C159100nF10V
12
C15610nF10V
12
C16710nF10V
12
R441K5%
12
C9010uF6.3V
12
R264K71%
12
R304K71%
12
C1222uF6.3V
12
C100100nF10V
12
C15710nF10V
12
R551K5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
S DD3S DD2S DD1S DD0S DCMD
SDD[3:0]
SDCLK
DD R3_CLK_50MHZ
EEPROM_SCLEEPROM_SDA
DIP_SW[4:1]
TACT[2:1]
TACT1
TACT2
DIP_SW2DIP_SW3
DIP_SW1
CLK_24MHZ
USER_LED4
USER_LED3
USER_LED5
USER_LED7
USER_LED6
USER_LED[8:1]
USER_LED1
USER_LED2
USER_LED8
DIP_SW4
VCC3P3VCC3P3
VCC2P5
V CC1P8
VCCIO_POWER
VCCIO_POWER
VCC1P5
VCC1P5
VCC3P3
VCCIO_POWER
SDD[3:0]4
S DCMD4S DCLK3
USER_LED[8:1]3
DDR3_CLK_50MHZ 3
EEPROM_SDA 3EEPROM_SCL 3
DIP_SW[4:1] 3
TACT[2:1] 3
CLK_24MHZ 4,9
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 LED, SW, uSDC, Osc, PROM
C
8 10Friday, August 08, 2014
Copy r i gh t 2014, Zephyr Engineering, Inc
LED4Green
12
P1Micro_SD_Socket
D21 D32
CMD3
VDD4
CLK5
GND6
D07 D18
CA
GE
19
CA
GE
210
CA
GE
311
CA
GE
412
R53 100R 1%1 2
R48 100R 1%1 2
Y 1SiT9201AC-S3-18E-50
GND1
NC2
OE3
VDD4 OUT 5
C22100nF10V
12
S2
SW_PB_MOM_SPST
1 23 4
C21100nF10V
12
R46 100R 1%1 2
LED5Green
12
R6010K1%
12
U11AT24C01CN
A01
A12
A23
GND4
SDA 5
SCL 6
WC7
VCC8
R49 100R 1%1 2
R10210K1%
12
LED6Green
12
C217100nF10V
12
S3
S W_DIP4_GDH
123 6
54
78
Y 2SiT9201AC-S3-XXE-24
GND1
NC2
OE3
VDD4 OUT 5
R5810K1%
12
R6110K1%
12
R10010K1%
12
LED7Green
12
LED1Green
12
R5610K1%
12
R10410K1%
12
R5910K1%
12
R50 100R 1%1 2
R101270K1%
12
LED2Green
12
LED8Green
12
R624K71%
12
C23100nF10V
12
R10310K1%
12
R51 100R 1%1 2
R47 100R 1%1 2
LED3Green
12
R634K71%
12
C2121uF10V
12
R52 100R 1%1 2
S1
SW_PB_MOM_SPST
1 23 4
R5710K1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC_USB_5P0
PWREN2#
USB_NCS
USB_TEST0
USB_TEST1
USB_TEST2
USB_TEST3
D-D+
BLASTER_D6
USB_NCEUSB_NCS
USB_BLASTER_LED13
BLASTER_D7
PWREN2#
BLASTER_WR
BLASTER_RXF#
FPGA_TDIFPGA_TMSFPGA_TDOFPGA_TCK
BLASTER_RD#
BLASTER_TXE#
BLASTER_D3
BLASTER_D0BLASTER_D1BLASTER_D2
PWREN1#
BLASTER_D4BLASTER_D5
USB_NCE
CLK_24MHZ
C PLD_TDOCPLD_TCK
CPLD_TMSCP LD_TDI
USB_TCKUSB_TCK
USB_TMS USB_TMSUSB_TDO
U SB_TDIUSB_ASDO USB_ASDOU SB_TDI
USB_BLASTER_LED12
USB_TDO
USB_BLASTER_POWER
USB_BLASTER_HP
MAXV_B2
D-D+
VCCIO_POWER
V CC1P8
VCCIO_POWER
VCC3P3
VCC3P3
VCC5P0
VCCIO_POWER
VCCIO_POWER
VCC3P3
VCC1P8
VCC3P3
FPGA_TDI 4FPGA_TMS 4FPGA_TDO 4FPGA_TCK 4
CLK_24MHZ4,8
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 USB Blaster
C
9 10Friday, August 08, 2014
CPLD_JTAG
USBBLASTER
USB_Blaster_JTAG
Copy r i gh t 2014, Zephyr Engineering, Inc
R110 330R1 2
R38 22R
1 2
R10810K1%
12
C204100nF10V
12
C2182.2nF50V1
2
C214100nF10V
12
TP16UT11
D 3TPD4E001DPK
D1 1
D2 2
D3 4
GND3 D4 5
VCC6
U10-55M80ZE64C5N
TMS14
TDI15
TCK16
TDO17 IO_1_28/DEV_OE/DIFFIO_B5P 28
IO_1_29/DEV_CLRN/DIFFIO_B5N 29
LED12Green
1 2
R10710K1%
12
R10510K1%
12
U10-35M80ZE64C5N
IO_2_34/DIFFIO_R4N34
IO_2_35/DIFFIO_R4P35
IO_2_36/DIFFIO_R3N36
IO_2_37/DIFFIO_R3P37
IO_2_3838
IO_2_43/DIFFIO_R2N43
IO_2_44/DIFFIO_R2P44
IO_2_4545
IO_2_46/DIFFIO_R1N46
IO_2_47/DIFFIO_R1P47
IO_2_4848
IO_2_49/DIFFIO_T6N49
IO_2_50/DIFFIO_T6P50
IO_2_51 51
IO_2_52/DIFFIO_T5N 52
IO_2_53/DIFFIO_T5P 53
IO_2_54/DIFFIO_T4N 54
IO_2_55/DIFFIO_T4P 55
IO_2_56/DIFFIO_T3N 56IO_2_58/DIFFIO_T3P 58
IO_2_59/DIFFIO_T2N59
IO_2_60/DIFFIO_T2P 60
IO_2_61/DIFFIO_T1N 61
IO_2_62 62
IO_2_63/DIFFIO_T1P 63
C169100nF10V
12
R1091K
12
U9FT245RQ
VCCIO1
VCC19
USBDM15
USBDP14
NC_55
NC_1212
NC_1313
NC_2525
NC_2929
RESET#18
NC_2323
OSCI27
OSCO28
3V3OUT16
AGND24
GND4
GND17
GND20
TEST26
PWREN# 9
WR 11
RD# 10
TXE# 21
RXF# 22
D0 30
D1 2
D2 32
D3 8
D4 31
D5 6
D6 7
D7 3
PAD33
TP15UT31
C209100nF10V
12
LED13Green
1 2
FB7BLM21BB600SH1D
1 2
D5BAT54C
3
1
2
U10-15M80ZE64C5N
VCCIO16
VCCIO123
VCCIO239
VCCIO257
VCCINT8
VCCINT41
Pad 65
J10USB mini RA
VCC_5V 1
D- 2
D+ 3
ID 4
GND 5
She
ll16
She
ll27
She
ll38
She
ll49
Loc
pin
110
Loc
pin
211
J12HDR_1x6_0.100_vert DNI
123456
TP14UT41
C215100nF10V
12
C211100nF10V
12
R9310K1%
12
J7HDR_2x5_0.100_vert
13579 10
8642
D 4TPD4E001DPK
D1 1
D2 2
D3 4
GND3 D4 5
VCC6
R111 330R1 2
C207100nF10V
12
TP17UT01
D2B360A-1 3-F
1 2
U10-25M80ZE64C5N
IO_1_1/DIFFIO_L1N 1
IO_1_2 2
IO_1_3/DIFFIO_L2P 3
IO_1_4/DIFFIO_L2N 4
IO_1_5 5
IO_1_10 10
IO_1_11/DIFFIO_L3P11
IO_1_12/DIFFIO_L3N12
IO_1_13 13
IO_1_18/DIFFIO_B1P 18
IO_1_19/DIFFIO_B1N19
IO_1_20/DIFFIO_B2P20
IO_1_21/DIFFIO_B2N21
IO_1_22/DIFFIO_B3P22
IO_1_24/DIFFIO_B3N24
IO_1_2525
IO_1_26/DIFFIO_B4P26
IO_1_27/DIFFIO_B4N27
IO_1_30/DIFFIO_B6P30
IO_1_31/DIFFIO_B6N31
IO_1_32/DIFFIO_B7P32
IO_1_33/DIFFIO_B7N33
IO_1_64/DIFFIO_L1P 64
C210100nF10V
12
R3610K1%
12
U10-45M80ZE64C5N
IO_1_7/CLK07
IO_1_9/CLK19
IO_2_40/CLK240
IO_2_42/CLK342
R106100K DNI5%
12
R94 1K1 2
C2061uF10V
12
C21310uF6.3V
12
D6TPD4E001DPK
D1 1
D2 2
D3 4
GND3 D4 5
VCC6
R1121M5%
12
C208100nF10V
12
C205100nF10V
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SW1
SW3
VOUT1
G2
G1
SW2
SW4
VOUT5
P WRGD
VOUT4
VOUT2
VOUT3
P WRON
V REF_DDR3
VCC5P0 VCC1P5
0.75V_VTT
VREG
VCC1P1
VCC1P5
VCC2P5
VCC3P3
VCC1P8VCC2P5
VREG
VCC5P0
VREG
VREG
VREG
VREG
VREG
VCC5P0
Title
Size Document Number R e v
Date: Sheet o f
<Doc> XB2
BeMicroCV-A9 Regulators
C
10 10Friday, August 08, 2014
CAD Note:Place caps & res near regulatorPlace regulator on the same side asDDR3 addr/ctrl/cmd termination resistors and capac itor arraysPour copper on outer layer to coverthese components
Monitor CH1 Output
1.0MHz
8ms SS
FPWM Mode
0.75V VTT (3A Sink/Src)
DDR3 VTT
8ms SS
Copy r i gh t 2014, Zephyr Engineering, Inc
5.0V DC INPUT
R210K21%
12
TP23.3V
1
C1422uF6.3V
12
C1100nF10V
12
LED11Green
12
LED9Green
12
R641K
1 2
C199100nF10V
12
C37100nF10V
12
C19747uF6.3V
12
C47100nF10V
12
C6100nF10V
1 2
C3510uF6.3V
12
C200100nF10V
12
L41.5uH
1 2
R1521K1%
12
C361uF10V
12
R6621K51%
12
C20210uF6.3V
12
R351K5%
1 2
U2AS I7232DN
1
2
78
R1610K21%
12
C74100nF10V
12
R310K21%
12
R1821K51%
12
C7210uF6.3V
12
R1310K1%
1 2
R4110K1%
12
C31.8nF50V1
2C731uF10V
12
C20310uF6.3V
12
R810K1%
12
R431K61%
12
C201.8nF50V1
2
C4810uF6.3V
12
C172.2nF50V1
2
C16100nF10V
1 2
TP11.5V
1
C6310uF6.3V
12
U2BS I7232DN
3
4
65
R4210K1%
12
R615K1%
1 2
C18510uF6.3V
12
C81uF10V1
2
C10122uF6.3V
12
R6547K1%
12
R1715K1%
1 2
R510K1%
1 2
C11100nF10V
1 2
C911uF10V
12
C251uF10V
12
TPS51100DGQU 8
VIN10
S37
S59
VTTREF6
VLDOIN 2
VDDQSNS 1
VTT 3
VTTSNS 5
PGND 4GND8
TPAD11
C4100nF10V
1 2
R123K741%
12
C2422uF6.3V
12
TP51.1V
1
TP31.8V
1
R926K11%
1 2
C201100nF10V
12
C15100nF10V
12
TP62.5V
1
J84.5x1.3mm
231
C187100nF10V
12
R1410K1%
12
R18K871%
12
C22.2nF50V1
2
CH1:BUCK
CH2:BUCK
CH3:BUCK
CH4:BUCK
CH5:LDO
U 3ADP5052
VREG 44
PVIN1a36
PVIN1b35
SYNC/MODE 43RT41
COMP139
VDD 42
EN137
FB1 40
BST1 32
SW1a 34
SW1b 33
DL1 31
PGND 30
PVIN2a25
PVIN2b24 SW2a 27
SW2b 26
BST2 28
DL2 29
FB2 21
COMP222
SS1238
EN223
PVIN34
COMP346
EN348
BST3 1
SW3 3
FB3 45
PGND3 2
PVIN49
COMP415
EN414
SS3447
BST4 12
SW4 10
FB4 16
EN55 VOUT5 7
FB5 6
PVIN58
PGND4 11
GND17
GND19
GND18
PWRGD/A0 20
GND13
AGND49
C7522uF6.3V
12
TP181.5V
1
L23.3uH
1 2
C181uF10V1
2
L53.3uH
1 2
L13.3uH
1 2
D1B360A-13-F
1 2
C522uF6.3V
12
C191uF10V1
2
C71uF10V
12