basic electronics - wayne state...

Basic Electronics:Carnegie Mellon Lab Manual

Edited by Curtis A. Meyer

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COPYRIGHT c©2012 Carnegie Mellon Department of Physics and Curtis A. Meyer

ALL RIGHTS RESERVED. No part of this work covered by the copyright hereon may be repro-duced or used in any form or by any means—graphic, electronic, mechanical, including but not limitedto photocopying, recording, taping, web distribution, information networks, or information storage andretrieval systems—without written permission of the editor.

For permission to use material from this manual, contact the editor viaEmail: [email protected]

Web: http://www.curtismeyer.com

Foreword

The laboratory projects described in this manual are the basis of the electronics course taught at CarnegieMellon University. The labs follow the textbook Basic Electronics: An Introduction to Electronics forScience Students by Curtis A. Meyer and span topics from simple DC circuits through an introductionto digital electronics. The lab course meets about twice per week for three hours at a time and willcover all eleven labs in this manual.

Each lab starts with short section identifying which material in the textbook is related to the laband what the goals are for the particular lab. This is followed by an introduction to the material coveredin the lab which tries to summarize the material in the textbook. After the introduction is a sectionwhich contains preliminary lab questions. These questions are based on the material in the introductionand should be answered before starting to work on your lab. This section is followed by one which liststhe equipment and parts that are needed for the lab. The final section in each lab is the procedure thatyou will follow in doing the lab. You will find boxed questions throughout the procedure which shouldbe answered in your lab.

Your lab work will be recorded in a lab book that is provided in lab. Do your preliminary labquestions in this book and then have an instructor sign off when you have completed them. Your actualwork should be recorded in your lab book in ink, although you may tape in printouts of data spreadsheets and computer-generated plots of your data. A lab book should roughly follow the followingorganization.

1. Your preliminary lab questions with an instructor’s signature to verify that this has been accuratelycompleted. This accounts for 10% of your lab’s score.

2. An introduction/purpose for the lab which identifies the goals of the lab. This should be at mosta three-to-four sentence description of what you will be doing, and what you expect to learn fromthe lab. This accounts for 5% of your lab score.

3. A procedure of how you did this lab. This should be a short description of how you set up the lab.It MUST include relevant circuit diagrams. It is also a good place to include the measured valuesof all the components that you are using. Finally, you should summarize the measurements thatyou will be making. eg “We will measure the frequency response of the circuit by using a measuredinput signal and scanning over a frequency range from 1 to 1,000,000 Hz. We will measure theinput voltage, the output voltage and the phase difference between the input and the output usingour oscilloscope.” Do not write a novel, but write enough information that you can set up andrepeat your measurement using only your lab book. If there are multiple sections to the lab, youneed a procedure for each section. This accounts for 10 to 20% of your lab score.

4. Your data and preliminary plots show the data that you collected. This should contain the datathat you collected during the lab. It is either in hand-written, properly labeled tables, or from aprinted out spreadsheet. Be sure this is labeled including units. This section can also contain neat,hand-drawn sketches of the data to help identify where you need to collect additional data points.

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These are not your analysis plots, they only help you identify when the data are changing rapidlyand allow you to collect additional points if needed. Finally, if there were problems encounteredduring data collection, mention them here, and describe how they were resolved. This accountsfor 10 to 30% of your lab’s score.

5. Your analysis and discussion of your data is a very important part of your lab. This section shouldinclude computer-generated plots of your data. If possible, you should also overlay the expectedtheoretical curves on top of your data and comment on where things agree and disagree. Formajor disagreements, there should be some additional discussion as to why this occurred. Thissection should also contain any calculations that you need to carry out, and if there are theoreticalexpectations, it should contain the mathematical formula that are needed. You do not need toderive the formulas, but the formulas must be present in your lab book. This accounts for 20 to50% of your lab’s score.

6. As noted above, there are questions throughout the lab write up. It is necessary to answer thesequestions in your lab book. This can be done when they are encountered, or you can do it ina dedicated section in your report. These questions are enclosed in boxes in the text that leavesufficient space for you to write the answer. You may find this a convenient way of making surethat you have answered all these question. You can then copy the answers into your lab booxk.These questions account for about 10% of your lab’s score.

Question Is this enough space for an answer?

7. You lab work must have a summary or conclusion. What did you learn in the lab? This sectionshould contain a brief description of what you learned in the lab. It should also summarize how wellyour lab agreed with expectations. You may also make suggestions for improving your procedure.This accounts for 5% of your lab’s score.

In order to help you in the early labs, sections on data collection have been provided in labs 1, 2,3 and 4. These give a suggested data table for collecting some of your data, as well as providing a fewhints in data collection. It is expected that by the end of lab 4, you will have mastered this skill andare expected to be able to do this your self in the remaining labs.

We have also provided an Appendix to this lab manual which describes the proto-board that is usedto build your circuits. Before starting the first lab, it is advisable that you read through this Appendixto become familiar with the board.

Contents

1 DC Elements and Measurements 1

1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.2 Preliminary Lab Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Equipment and Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.5 Additional Problems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2 Oscilloscope and Signal Generator Operation 15

2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15



2.4 Procedure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22


3 RC and RL circuits: Time Domain Response 29

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29



3.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35


4 RC, RL, and RLC circuits:Frequency Domain Response 43

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43



4.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50


5 AC to DC Conversion and Power Supplies 57

5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57



5.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63


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6 Voltage Multipliers 71

6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71



6.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82


7 Bipolar Junction Transistors, Emitter Followers 89

7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89



7.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94


8 Bipolar Junction Transistor: Inverting Amplifiers 101

8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101



8.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106


9 Introduction to Operational Amplifiers 113

9.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113



9.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118


10 Operational Amplifiers with Reactive Elements 127

10.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127



10.4 Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132


11 The Transition from Analog to Digital Circuits 139

11.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139



11.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146


12 Digital Circuits and Logic Gates 153

12.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153



12.4 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162


CONTENTS vii

A The PB10 Proto-board 171A.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171A.2 Connections on the PB10 Proto-board . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172A.3 Hints on wiring circuits on the PB10 Proto-board . . . . . . . . . . . . . . . . . . . . . . 173

B Component Labels 175B.1 Resistor Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175B.2 Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178B.3 Semiconductor Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180B.4 Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181B.5 Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183B.6 Integrated Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184

C Curve Fitting in Excel 185C.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185C.2 Performing Linear Fits to our Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185C.3 Performing General Fits to our Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

viii CONTENTS

Chapter 1

DC Elements and Measurements

Reference Reading: Chapter 1, Sections 1.3, 1.4, 1.5 and 1.6.Time: Two lab periods will be devoted to this lab.Goals:

1. Become familiar with basic DC (“direct current”: zero frequency or constant bias) elements,measurements, and responses.

2. Become familiar with I-V curves for several (linear and non-linear) elements we will use throughoutthe semester.

3. Become familiar with power computation and the power limitations of real devices.

4. Be able to replace a circuit element with a “Thevenin equivalent” circuit which has the same I-Vcurve.

5. Test the basic circuit theory of linear devices developed in class and the textbook, most impor-tantly, the voltage divider equation and Thevenin’s theorem.

1.1 Introduction

The electrical current, I, through a circuit element is almost always related to electric fields resultingfrom the application of a voltage, V , across the circuit element. The potential energy difference acrossthe circuit element for a charge Q is just QV . Increasing V across a device corresponds to increasingthe average electric field inside the device. The actual electric field inside the device may be highly non-uniform and depend on the arrangement and properties of the materials within the object. However,the behavior of a circuit element within a circuit is generally determined by the relationship between Iand V without detailed knowledge of the actual electric field. In this lab, you will study the relationshipbetween I and V for a variety of devices.

1.1.1 The I-V curve.

The “I-V curve” of a circuit element or device may be obtained in the following manner. First, theelement is connected to an external power source such as a variable voltage power supply. Next, thecurrent through the device, I, and the voltage across the device, V , are measured. The external powersupply is then varied so I and V are changed and the new values are measured. This procedure isrepeated and the points are plotted on a graph of I vs V . The curve which connects these points iscalled the I-V curve for the device being tested.

1

2 CHAPTER 1. DC ELEMENTS AND MEASUREMENTS

“Linear” devices have I-V curves that are straight lines. For many devices, the “response” or currentthrough the device is proportional to the “input” or voltage across the device over a broad range andtheir I-V curves obey Ohm’s law:

V = IR. (1.1)

Devices which obey Ohm’s law are called “resistive” elements. Other elements may have non-linear I-Vcurves or response. In some cases the response is not even symmetric about zero voltage (the responsedepends on the polarity of the applied voltage).

For direct current, power dissipation can always be written as

P = V I. (1.2)

This is just the potential energy change per charge (V ) times the amount of charge per second (I)passing through. For resistive elements, this reduces, using Ohm’s law, to

P = V I = I2R =V 2

R. (1.3)

Any of these forms can be used for resistors – choose the most convenient for your purposes. Fornon-linear devices, you have to use (1.2).

1.1.2 Diodes and light-emitting diodes

Most of the components whose I-V curves we measure will be symmetric for positive and negativevoltage. However, both the Zener diode and the light-emitting diodes are exceptions to this behavior.They have a very definite polarity. These components are discussed in Section B.4 of Appendix B whereit is shown that the two legs of a diode have different names. They are known as the anode and thecathode. A diode is said to be forward biased if the voltage at the anode is more positive than thevoltage at the cathode. The diode is said to be reverse biased if the opposite is true.

1.2. PRELIMINARY LAB QUESTIONS 3

1.2 Preliminary Lab Questions

The work in this section must be completed and signed off by an instructor before you start working onthe lab. Do this work in your lab book.

1. Carefully plot the I − V curve of an ideal resistor of R = 100Ω for voltage values between 0and 15 Volts. Be sure to label all axis and put the correct values on them.

2. Two resistors, R1 and R2 are placed in series, what is the equivalent resistance of the two?


3. Three resistors, R1, R2 and R3 are placed in parallel. Sketch the circuit represented by this.What is the equivalent resistance of the three? Sketch the equivalent circuit.

4. You have a perfect current source of I = 1A and hook it up to a load, RL. What is the I −Vcurve of this device for voltages between 0.001 and 10 Volts.

1.3 Equipment and Parts

In this lab we will utilize the following equipment. This equipment is located at your lab station.

1. The Global Specialities 1302 DC Power supply.

2. The Metex 4650 digital meter.

3. The Global Specialities PB10 proto-board (see Appendix A for a description). Note that thisboard should be part of the PRO-S-LAB kit that include a power brick and power bus as well.These latter two parts are not needed until lab 7.

You will also need the following components in order to carry out this lab. It makes more sense to getthem as you need them, rather than all at once before the start of the lab.

1. A 10 Ω resistor.



4. Two 1 kΩ resistor.

1.4. PROCEDURE 5

5. A 10 kΩ resistor.

6. 4 precision 10 kΩ resistors.


8. A 1 kΩ potentiometer.

9. A 10 kΩ potentiometer.

10. A low-current light-emitting diode (red, green or yellow).

11. A very bright light-emitting diode (blue or violet).

12. Either a 5.6 V or a 7.2 V Zener diode, depending on what is available.

13. A light bulb.

14. An AA 1.5 V battery.

15. Assorted wires for connections.

1.4 Procedure

1.4.1 I-V (current-voltage) curves of passive circuit elements

A passive element is a two-contact device that contains no source of power or energy; an element thathas a power source is called an “active” element. In the first part of the laboratory, you are to measureand plot the current vs. voltage curve for various passive circuit elements. You are also toplot the power dissipation in each element vs. applied voltage.

You need to decide which of the circuit elements are resistive and which are not resistive. For thoseelements which are resistive, determine the resistance, R. To do these measurements, you will connectthe device under test to a variable voltage power supply and measure I and V as you vary the voltagecontrol of the power supply. Use the circuit shown in Fig. 1.1.

VXV

X

I ≈ IX

A ý0− 15V

1kΩ

Figure 1.1: The setup for measuring the IV curve for a passive element, X. The objects labeled A andV are ammeters (ampere-meters) and voltmeters, respectively. The voltage supply is a variable one with arange from 0 to 15 Volts.

1. In this first lab, your first challenge is to correctly wire the circuit in Figure 1.1 on the proto-board at your lab station. A description of the internal connections of this board can be found inAppendix A of this lab manual.

2. If you have not wired up circuits before, have the instructor check your wiring before switchingon the power supply.


3. Use your circuit from Figure 1.1 to measure the I-V curves and the power dissipation of thefollowing elements.

• A 1kΩ resistor.

• A 47Ω resistor.

• Either a 5.6V or a 7.2V “Zener diode” (depending on availability).

• A “low-current LED” (red, green or yellow).

• A “very-bright LED” (blue or violet).

• light bulb (replace the 1k resistor in Fig. 1.1 with 100 Ω).

The symbols for these electronic symbols for these elements are shown in Figure 1.2, where we alsoinclude the symbol for a variable DC voltage supply. When making these measurements, record theApplied Voltage from the supply, the voltage across the device from the volt meter, and the currentthrough the device.

Resistor

Zener Diode

LED

Lamp

Variable DC Supply

Figure 1.2: The electronic symbols for the components used in this lab. For the diodes, the end with thevertical line is the cathode.

4. Make a table of all your data points and plot them as you go along. Reverse the polarity of theapplied voltage by reversing the orientation of the element; this allows you to do measurementsfrom −15 to +15 volts on the supply.

5. When measuring the Zener diode and the LEDs, be sure to have positive voltages correspond toforward biasing the diode and negative voltages corresponding to reverse biasing the diode (seeSection 1.1.2).

Data Collection: In this section of the lab, we want to collect data to allow us to measure the I −Vcurves of the passive elements, X in Figure 1.1. In order to do this, we need to record the voltage,VX , across the element X and the current IX through the element X. It would also be advisable torecord the supply voltage, VS , which we are varying from −15V to +15V . As you collect this data, itis advisable to make sketches by hand in your lab notebook. Alternatively, if you are recording thedata in a spread sheet, then making a plot of the data on your computer is useful. The purpose of thisis to let you know if you have collected enough data. If the curve is a simple straight line, then fewerpoints are necessary than the case where the curve is changing rapidly.

You should also think about the order in which you will take data points before you start – inorder to plot as you go, you need to know what scale to use for your the axes! Finally, you should putcomputer-generated plots of your data in your lab book. You also must have a copy of the numericalvalues of your data in your lab book. It can either be written in by hand, or if you took it in aspread sheet, print out the data and neatly tape it into your lab book. Finally, add plots of the powerdissipation vs. applied voltage. This can also be done in your plotting program, however make sure thatyour results are sensible! Finally, DO NOT JUST STAPLE A BUNCH OF FULL SHEETSOF PAPER IN YOUR LAB BOOK!!!! Trim them to reasonable size and neatly tape orglue them into your lab book.

In collecting your data, the following should guide you in developing your lab book. First, recordthe expected and measured values of all components. For the 1 kΩ resistor in the circuit:

1.4. PROCEDURE 7

The 1 kΩ resistor has a measured value of xxxxΩ.

Similarly, for the components, X, record the measured values when appropriate. Finally, your datashould be collected in a table that looks something like Table 1.1.

Data for the component X.Source Voltage Component Voltage Component CurrentVS (Volts) VX (Volts) IX (Amperes)

Table 1.1: A sample data table for measuring the I − V curve of a passive element X.

1.4.2 I-V (current-voltage) curves of active circuit elements

The I-V (load curves), curve of active circuit elements, such as batteries and power supplies, can beobtained by connecting the elements to an external circuit consisting of a single variable resistor. Acircuit for measuring the I-V curve of active elements is shown in Fig. 1.3. A circuit connected to apower source is often called the “load” on the power source and in this case the single resistor, RL, iscalled the load resistor. As you will see, a big load (that is, a small resistance) tends to load down thesource.

Question 1.1 Think about this language: what’s big about connecting a small resistor?

I ≈ IS A

VSV

ýSource

RL

Figure 1.3: The setup for measuring the load curve of a power source. The objects labeled A and V areammeters (ampere-meters) and voltmeters, respectively. The resistor with the arrow through it is a variableresistor, or a potentiometer.

The I-V curve is obtained by varying the load resistor RL to obtain a set of (I, V ) points to plot ona graph. You must find a suitable range of values for RL so that you get a range of values for I and


V . If all your values of RL are too large, V will vary only a tiny amount; if RL is too small, the totalpower V 2/R could exceed the power limitations of the resistor.

Any circuit with two output terminals can be considered as a source. It can be a battery, a powersupply, two terminals on the outside of a black box. It does not matter. What does matter is that thereis an I-V curve for the source, and there are probably many circuits that give the same or equivalentI-V curves.

Use the circuit shown in Fig. 1.3 to measure the I-V curves and power output of the devices listedbelow. For parts 1 and 2 use a 1 kΩ potentiometer for RL. In part 3, us a 10kΩ potentiometer for RL.

1. battery

2. a “50 mA current source” circuit: set up your power supply as follows

(a) with an open circuit at the output terminals, set the voltage knob to 10V,

(b) turn the “current limit” knob to zero,

(c) attach a 10 Ω resistor across the output terminals, and then

(d) set the “current limit” knob to 50 mA;

(e) remove the 10Ω resistor and use the output terminal as the “source” in Fig. 1.3.

3. the voltage divider network shown in Fig. 1.4 using R1 = R2 = 1 kΩ and V = 10V.

ýV

R1 R2 ò+

ò−Vo = V R2

R1+R2

Figure 1.4: Voltage Divider Circuit for use in part 3.

We will find it useful to be able to mimic the behavior of source circuit elements with an equivalentcircuit consisting of either 1) an ideal voltage source in series with a resistor (Thevenin equivalent cir-cuit), or 2) an ideal current source in parallel with a resistor (Norton equivalent circuit).

Question 1.2 What are the Thevenin and Norton equivalent circuits for each of the active devicesyou investigated above?

1.4. PROCEDURE 9

1.4.3 The R-2R ladder or current divider

ý10V

10 ÿ10 ÿ10 ÿ10 ÿ 20 20 20 20

20

A B C D

Figure 1.5: An R− 2R resistor ladder. In this diagram, 10 stands for 10kΩ and 20 for 20kΩ.

The type of circuit shown in Fig. 1.5 is used in digital-to-analog conversion (DAC), as we will seelater in the semester. For the present, it is an interesting example of a resistor network which can beanalyzed in terms of voltage and current division and, from various points of view, in terms of Theveninequivalents.

(a) (b)

ý 20

ðD

ý 20

10 ðC

20

D

Figure 1.6: (a) shows the circuit to measure the resistance R from D to ground. (b) shows the circuit tomeasure the resistance R from C to ground.

We are going to study the properties of this network as we build it. It will be useful to collect allthe parts that you need to construct this network using 1% metal-film resistors, but do not build ituntil you have read through the remainder of this section. If you are so foolish as to ignore thiswarning, you will find that you need to dismantle the network to make your measurements!

1. Start by simply putting a 20kΩ on the board as shown in Fig. 1.6a. Measure the resistance fromthe point D to ground. We refer to this as looking to the right into the load.

2. Now add the resistors as shown in Fig. 1.6b and measure the resistance looking to the right intothe load (C to ground).

3. Continue to add pairs of resistors and measuring the resistance looking into the load, (B and Ato ground)

4. Add the final pair of resistors and measure the resistance between the terminals to which thevoltage source will be connected.

You should now have the resistance network (without the voltage source) on your proto-board using1% metal-film resistors. These resistors should all be within 1% of their nominal values (that is, thestated tolerance is the maximum deviation, not a standard deviation); the better the precision, thebetter the network that can be constructed. Show by calculation in your notebook that the results fromabove are as expected.


Question 1.3 Calculate what you expect for the above measurements and compare them with whatyou have observed. Draw the equivalent circuit that the voltage source will see once it is connectedto the resistor network that you built.

5. Now connect the 10V source and measure the voltage to ground from points A, B, C and D.

Question 1.4 Show that these are in accord with expectations. Compute the current and powerdrawn from the source.

1.4. PROCEDURE 11

Question 1.5 Lets think about extending the network to an infinite number of resistors in thechain. If we were to do this, what would the equivalent resistance of this network be?

ý10V

10 ÿ10 ÿ10 ÿ10 ÿ 20 20 20 20

20 ò+

ò−A B C D

Figure 1.7: An R− 2R resistor ladder. In this diagram, 10 stands for 10kΩ and 20 for 20kΩ.

Let us now consider our network as shown in Figure 1.7 where we connect two outputs at the end ofthe circuit. A measurement of the voltage between these terminals will yield the “open-circuit voltage”of our ladder. If we look back into these new output terminals, we can talk of the circuit in terms of itsThevenin equivalent.


Question 1.6 Sketch the Thevenin Equivalent for this circuit in your lab book.

6. We can now determine Vth and Rth of the equivalent circuit. You can measure the open-circuitvoltage by measuring the voltage from + to −. The equivalent resistance could then be determinedby measuring the short circuit current, for example by putting an ammeter between + and −.Although it is safe in this case, this is generally considered to be a dangerous procedure.

Question 1.7 Why is this procedure considered dangerous?

7. To illustrate a common practical way to determine the equivalent resistance of a source, do thefollowing: Place a known resistance, with a value of the same order of magnitude as the expectedequivalent resistance, from + to −. By comparing the voltage across this test resistor with theopen circuit voltage, the value of the Thevenin equivalent resistance, Rth, can be determined.

1.4. PROCEDURE 13

Question 1.8 Draw the relevant Thevenin equivalent circuit for this measurement in your note-book and determine Rth. How does the predicted short-circuit current compare to what you foundby connecting an ammeter from +-to-−? Why is it safe to measure the short circuit current withthis circuit?

A conclusion you should assimilate from this part of the lab is that one complicated circuit (forexample, the ladder) can be thought of from many points of view – many terminal pairs. For each pairof terminals, there is an equivalent circuit that would mimic the behavior of those terminals. There is noequivalent circuit for the entire circuit, but only for specific pairs of terminals. Knowing the equivalentfor a pair of terminals makes it easy to think about what will happen to something you want to connectto those terminals. We will use this concept throughout the course!


1.5 Additional Problems

After completing this lab, you should be able to answer the following questions.

1. You build the circuit shown in Figure 1.8 below in lab. You supply an input voltage of V0 to thecircuit and look at the output voltage and current between the terminals A and B. In buildingyour circuit, you have carefully chosen your resistors such that R1, R2 and R4 all have the sameresistance, R, while R3 has twice this resistance (2R). (a) In terms of input voltage, V0, and thecharacteristic resistance, R, what is the output voltage of our circuit, VAB? (b) If you connectan ammeter in series with resistor R4, what does the ammeter read (quantity and value)? (c) Ifyou connect an ammeter in parallel with resistor R4, what does the ammeter read (quantity andvalue)? (d) Sketch the Thevenin equivalent circuit as seen looking into A-B for your circuit. Interms of V0 and R, what are Vth and Rth?

V0

R1

ÿR3 ÿ ÿý

R2

ÿ òA

R4 ÿ òB

VAB Figure 1.8: The circuit diagram for problem 1.

2. You measure the following data for the I–V curve between the two output terminals of the black-box circuit shown in Figure 1.9 below. (a) Make an accurate sketch of the I–V curve for yourdata. (b) What is the open-circuit voltage between the two terminals? (c) What load resistancewas used to measure the 10V data point?

Black

Box Voltage (V) Current (mA)1.0 10.06.0 5.010.0 1.0

Figure 1.9: The black-box circuit and data for problem 2.

Chapter 2

Oscilloscope and Signal GeneratorOperation

Reference Reading: Chapter 2, Sections 2.1, 2.2, 2.3, 2.4 and 2.5.Time: Two lab periods will be devoted to this lab.Goals:

1. Become familiar with the operation of the Stanford Research Systems DS335 signal generator andthe Tektronix TDS 2012B oscilloscope.

2. To become familiar with the various ways of characterizing waveforms: RMS vs. peak-to-peakamplitude, period vs. frequency content of periodic signals.

3. To optimize data collection techniques for measuring the frequency response of circuits.

4. To become acquainted with frequency response plots: Bode and phase plots.

5. To become acquainted with the terminology of decibels as used in standard electronic (and other)applications.

2.1 Introduction

This Lab is designed to help you gain familiarity with the Function Generator and the Tektronixoscilloscope you will be using throughout the semester.

The DS335 Synthesized Function Generator generates a variety of periodic waveforms of dif-ferent periods and amplitudes. This is a precision function generator with a highly stable clock forgenerating signals with different periods. As the name implies, it digitally synthesizes its waveformsin much the same way that a CD player can synthesize signals (the information for which is stored indigital form) that eventually are heard as sound.

The Tektronix TDS 2012B oscilloscope provides a means of observing these and other periodicwaveforms. Very briefly, a digital oscilloscope emulates an analog oscilloscope which images a periodicwaveform by repeatedly passing a dot (the position at which an electron beam hits the phosphor screenof a cathode ray tube) across a screen at a sweep rate (the rate of passage across the screen) and repeatrate (usually determined in various ways to generate a repeating pattern) appropriate for the signalbeing observed. Thus, the horizontal axis is time and the vertical axis is the voltage being measured.You can directly select the sweep rate and the scale factor for the vertical axis. The trickier part is toarrange to have the sweep repeated in such a way as to generate the same picture of the waveform on

15

16 CHAPTER 2. OSCILLOSCOPE AND SIGNAL GENERATOR OPERATION

each sweep – otherwise, you see a confusing jumble on the screen. As described below, the sweep canbe “triggered” in several different ways.

Taking data. Note: This discussion applies both the this lab and to several labs later in the semester.Both the signal generator and the oscilloscope operate over several decades in their key parameters:waveform amplitude and frequency. Not coincidentally, analog circuits must operate properly over asimilar range of signal parameters and you will need to both characterize and display such behavior.The measurements are straightforward enough given the matched scales of the instruments.

For properly displaying circuit behavior over several decades, a linear scale plot fails miserably.However, a base-10 logarithmic scale gives equal space to each decade or factor of 10 (actually, any basewill do the same trick, but base-10 is conventional because of its simple powers-of-ten convenience).In this and subsequent lab exercises, you will want to select where you take data points (primarily atwhat frequencies) so that the points uniformly fill several decades on a log scale. If you want n pointsper decade, you’d choose 101/n and integer powers thereof. For example, in frequency measurementswith n = 1, you could take data at, for example, 1Hz, 10Hz, 100Hz,... or 5Hz, 50Hz, 500Hz,... . Forn = 3, 1Hz, 2.15Hz, 4.62Hz, 10Hz, 21.5Hz,... could be used. When viewed over several decades, greatprecision is generally not necessary, so it is common to see 1Hz, 2Hz, 5Hz, 10Hz, 20Hz... used. Youmight also want to take note of the resistor values available (from about 1Ω through 10MΩ – coveringseven decades) in the laboratory – and from manufacturers.

2.1.1 Using the DS335 synthesized function generator

The controls for the DS335 are in three groups:

1. Buttons on the left control what is displayed: either the frequency, amplitude or the DC offset.

2. The center buttons (FUNC) control the form of the output waveform.

3. To the right is the DATA ENTRY section with a numeric keypad and increment buttons. TheSHIFT key accesses the functions located above the numeric keys and the arrow keys below.

4. On the lower right is the POWER button and STATUS lights which, for our purposes, indicatewhen you input something the generator doesn’t understand or can’t do.

The controls are summarized below; you should experiment to become familiar with these:1. Upon power-up, the display cycles through a start-up procedure; wait for the default display

to appear. Pressing SHIFT and INIT in the DATA ENTRY section puts the device into a defaultconfiguration: the output is a sine wave at 1MHz, 2V peak-to-peak (2Vpp), with no offset (the amplitudewill read 1Vpp because the default “load impedance” is 50Ω – see section 4 below).

2. The default waveform is a sine wave. To change, toggle the FUNC button through square,triangular, sawtooth, and noise, then back to sine.

3. To change frequency: As you know from Fourier analysis, only a sine wave is composed of a singlefrequency component. Nevertheless, it is convenient to specify all the selectable waveforms by a single“frequency” designation. This frequency is really the inverse of the fundamental period (the repeatperiod) of the wave. Non-sine wave signals contain this frequency as well as higher order harmoniccomponents at multiples of the fundamental frequency.

Two methods are available for setting the frequency:

1. With the FREQ displayed, enter a number, then hit either MHz, kHz, or Hz to specify the intendedunits; or

2. With FREQ displayed, you will notice that one of the displayed numbers is blinking. Press theVpp/kHz “up” button and see that the blinking number is incremented upwards by one. PressingSHIFT and→ or← will shift the blinking digit so you can increment in larger or smaller amounts.

2.1. INTRODUCTION 17

4. To change amplitude: The same two options are available as under FREQ mode. Note that youcan specify the amplitude in two different units and with two different modes:

1. In Vpp mode, you enter the peak-to-peak excursion of the output voltage. This works for anywaveform.

2. In Vrms mode, you enter the root-mean-square voltage. Only use this mode for sine wave signals.

The Thevenin equivalent resistance of the DS335 signal source is 50Ω. That is, the output of thegenerator “looks like” an ideal voltage (signal) source in series with a 50Ω resistance. The reading ofthe output display can be changed from “High Z” to “50Ω” with switches in the DATA ENTRY section.The intent of this toggle is to allow you to display the actual voltage delivered to your load underthe conditions that the load is i) much larger than 50Ω (“High Z” setting) or, ii) equal to 50Ω (“50Ω”setting). If you have a load which does not satisfy either of these conditions, you should use the “HighZ” setting and compute and/or measure the voltage delivered to your circuit. Toggling the readingdoes not change the output of the generator in any way!

5. DC level : One can superimpose a DC level on an AC signal:

1. Set up the desired AC signal.

2. Press OFFS

3. Enter the DC offset voltage in data entry.

Using this, you can, for example produce a square wave where the low voltage side is at zero instead ofa negative voltage; this will be useful for digital circuits.

6. Frequency sweep: The DS335 can repeatedly sweep its frequency over the entire range of itsoutput or any fraction thereof at a rate selected by the user. The sweep can cover frequencies at eithera linear or a logarithmic rate. To set up a sweep, follow these directions:

1. Reset to default settings.

2. Set the desired amplitude.

3. Press the SHIFT key, then the STOP FREQ/LIN/LOG key. The display should read Lin.Lo9,with the first L blinking indicating a linear sweep rate. You can toggle this with the → and ←buttons.

4. Press SWEEP RATE, then enter the inverse of the desired sweep time (i.e., 0.5 Hz for a 2 secondsweep through the selected frequency range).

5. Press the START FREQ key and enter the desired starting frequency.

6. Press the STOP FREQ key and enter the stop frequency.

7. To start the sweep, press SHIFT, then the START FREQ/ON/OFF key.

The DS335 puts out a trigger pulse once for each frequency sweep, so you can trigger the scope onceon each sweep in order to quickly visualize the frequency response of a circuit (you will need to set thescope sweep time to be greater than or equal to the DS335 sweep time).


2.1.2 Using the TDS 2012B oscilloscope

The User Manual for your oscilloscope is available in the lab. Pages 1-36 cover the basic operationaldetails. The chapter on Application Examples shows how to do various types of measurements, severalof which are similar to the laboratory exercises. Most features are documented in the instructions underthe HELP button, which you can search via the index or by simply pressing ’HELP’ after pressing abutton about which you would like to learn. Below are a few notes to help orient you.

The TDS 2012B is more than a traditional oscilloscope. The latter would simply show a waveformas it occurs in a circuit. The TDS 2012B is a digital scope: it digitizes the waveform and can store asingle waveform so that you can analyze it after it occurs. Like a ’storage scope’, it will display on itsscreen indefinitely the last trace for which it was triggered. (Warning: This means you may be fooledinto thinking the scope is seeing something when it is really displaying an old waveform! In particular ifyou press the RUN/STOP button, the scope won’t run normally until you press it again. STOP lightsup in red at the top of the screen to warn you if the ’scope has been stopped.) Of course, the scopecan also perform the functions of a traditional real-time oscilloscope. The scope can save waveforms tofloppy disks so you can do further analysis on a computer. The scope performs a variety of analyzes ofwaveforms (amplitude, period,...) and can do so in a continuous way, constantly updating the results.You will use this capability extensively. Some measurements (in particular, comparisons of differentwaveforms) require you to manipulate the cursors and read off values of various quantities.

The controls for the scope are a combination of front panel knobs and menus displayed on the screen.Getting familiar with both of these is one of the main points of this lab.

• You select input channel 1 or 2 with the two buttons so-labeled (yellow and blue). After pressingone of these, you can change the settings for the corresponding channel. (Each channel hasdedicated control knobs for vertical scale and vertical position, regardless whether that channel isselected or not.) Note that pressing a channel menu button when that channel is already selectedturns off the display of that channel. Pressing again turns it back on.

• VERTICAL section: The scale of the vertical axis is controlled by the VOLTS/DIV knob. Thecalibration, in volts per large grid unit, is displayed on the screen. You can move the zero voltpoint with the “position” knob.

Notice that the vertical scale for each channel is displayed on your scope screen (in volts perdivision).

• HORIZONTAL section: The scale of the horizontal axis (time) is controlled by the SEC/DIVknob. The calibration, in time per large grid unit, is displayed on the screen. You can move thetrack horizontally with the “position” knob.

Notice the scope screen always displays the time scale (in time per division).

• TRIGGER section: The triggering of the sweep is controlled by this section. When trying tovisualize a time-varying but periodic voltage (e.g. a sine wave), the scope needs to start its sweepat the same point on the waveform each time – otherwise, you will just see a jumble of lines onthe screen. By starting at the same point, you get a stable pattern. The LEVEL button controlsthe voltage level at which the sweep will begin. Note that, if this level is outside the range overwhich your input signal varies, the scope never triggers! (Or, in AUTO trigger mode, it willtrigger randomly!) Several other controls are on the Trigger menu screen, accessed by pressing theMenu button. The SLOPE control determines whether the sweep begins when the input crossesthe trigger level while rising(increasing in voltage) or while falling (decreasing in voltage). TheSOURCE control decides whether channel 1 or 2 is tested for the trigger condition. (Or whetherthe EXT TRIG input, or the power line is used to trigger the scope.)


Notice that the scope screen (on the bottom right) shows which channel it is triggering on, whetherit is looking for a rising or falling slope, and a what level it will trigger. (It also displays thefrequency at which it is being triggered.)

• In the Vertical, Horizontal and Trigger and sections are MENU buttons that bring up on-screen displays with expanded sets of options.

• One important button is the AUTOSET located on the right side of the top row. This generallysets the scope parameters so that the input signal will appear on the screen. When all else fails,try this!

• The ACQUIRE button allows you to select ’Sample’ mode (which is typically used) or ’Average’mode which can be much more confusing, but is useful for cleaning-up a repetitive signal whichhas non-repetitive noise on it.

• The MEASURE button in the top row allows you to set up a variety of types of automaticmeasurements. Some measurements you will want to use include: the Frequency and RMS(which is usually more reliable than peak-to-peak which is more noise sensitive).

• The SAVE/RECALL and Print buttons allow you to save (to memories in the scope or to aflash drive) all the settings of the scope and/or a screen image and/or the measured values. Ifyou save the settings, you can then re-adjust the scope for a different job and then return to whatyou were doing. (Starting next lab, you will use it to save the measured values of the waveformyou are looking at. You mustn’t confuse these two different ways of using SAVE!) There are alsotwo memories (REFERENCE A and B) which can save a waveform so you can display it on thescreen to compare to what you see later.

• The CURSOR button turns on vertical or horizontal markers (with their exact positions in-dicated). These are sometimes useful for making measurements ’by hand’ when the automatedmeasurements are not trustworthy. It’s always good to check occasionally to make sure the scopeisn’t giving nonsensical values with its automated measurements.

• The DEFAULT SETUP button will turn off any ’crazy’ modes to which the scope may be set(perhaps by the last people who used it).

• The scope probes allow you to test the voltage at various points in a circuit. Notice that theprobes have X1 and X10 settings selected by a switch. Be careful to not use the X10 setting(unless you also set the scope to multiply its input by 10) or you will be off by a factor of 10 inthe measurements you make.




1. In plotting things as a function of frequency, the lab handout indicates that a good choice forfrequencies can be found by choosing them according the the 10

1n rule where n is the number

of points per decade. See page 2 in the middle. Assume that we want to take 5 measurementsper decade for frequencies between 1000 and 100000 Hertz. What values should we choose?

2. The output of your signal generator has two modes, Vpp and Vrms as described on page 3 ofthe lab handout. Assume that the voltage is given as V (t) = Vo cosωt. Sketch two cycles ofthis voltage as a function of time, and then show on your sketch what you would measure forboth Vpp and Vrms. Be sure to express your answers in terms of Vo.

2.3. EQUIPMENT AND PARTS 21

3. On page three of your handout, the voltage source is described as having the Thevenin equiv-alent resistance of 50Ω. Sketch what this circuit looks like. Assume that we set the sourceto “high Z” and connect a 10, 000Ω resistor to it. If we deliver 10V to the load, what isthe voltage output reading of the supply? Now assume that we toggle the supply to its 50Ωsetting. What is the voltage reading on the supply? (What is the actual voltage delivered tothe load?)



1. The Tektronix TDS 2012B digital oscilloscope.

2. Two P2220 probes for the oscilloscope.

3. One USB memory stick.

4. The Stanford Research Systems DS335 signal generator.

5. One BNC to alligator cable.




1. 1 2.2 kΩ resistors.

2. 1 100 kΩ resistors.




2.4 Procedure.

1. Play! Take notes of what you do and what you see/measure with the scope as you do this.Visualize each type of waveform from the DS335 on the oscilloscope. Adjust frequency, amplitudeand DC offsets and observe the resultant waveforms. Be sure to try the different input couplingsettings (DC or AC set using the channel menu buttons) on the scope as you change thingslike the DC offset. (It will be important to keep track of the setting of the coupling, especiallywhen measuring at low frequencies or for signals which don’t average to zero. Usually you wantthe coupling set to ’DC’... except when you don’t.) Try (using the Trigger menu) triggeringinternally and externally using the SYNC OUT from the DS335. Make sure that you understandthe function of the “High Z” - “50Ω” switch on the DS335. You will need to explain this to oneof the instructors.Try saving you scope settings, messing things up and then recalling the saved settings.

You probably can’t trust the amplitude reading of the DS335. Often the most accurate measureof size of a signal is the one found “by hand” by positioning the scope’s horizontal cursors whereyou best estimate the top and bottom of the signal to be. You can also tell the scope to makeautomated measurements of Pk-Pk (peak-to-peak size) and RMS.

Note: You will always get the best accuracy from the scope if the vertical and hor-izontal scales are adjusted so one cycle of the waveform fills most of the screen! Ingeneral, don’t forget to adjust your scope whenever the waveform starts to look small.

2.4. PROCEDURE. 23

Question 2.1 Compare all of these measurements to your “hand” measurements for sine, square,and triangle waves. Which automated measurements are the most accurate? What does the RMSvoltage setting mean when applied to sine, square or triangle waves? Compare calculated RMSvalues to the waveforms you observe.

2. A Voltage Divider. Build a voltage divider with R1 = 100 kΩ and R2 = 2.2 kΩ. Measure theexact values of your two resistors so that you will be able to make accurate predictions. Nowset your DS335 to a sine-wave output with a frequency in the range 100 kHz to 1000 kHz. Setthe output voltage to be 0.75V peak-to-peak. Connect this voltage across your divider, and thenconnect channel one of your scope across the entire divider. Use the scope, set to 1V/division, tomeasure the RMS and Peak-to-Peak voltage.

Question 2.2 Are these consistent with the output of your signal generator? Measure thepeak-to-peak voltage by hand (using the cursors) and compare to the previous measurements.

Now adjust the scope to have 0.1V/division and repeat your measurements.

Connect channel two of the scope across R2. Based on what you measured earlier, predict whatyou should measure on channel 2. Make the measurements and compare them with your predic-


tions.

Question 2.3 Which method is the most accurate? What problems do you encounter inyour measurements?

3. Frequency response of the R-2R ladder circuit. Substitute the DS335 for the DC voltagesource in the R-2R ladder circuit of Laboratory 1 (be sure to include the final 20kΩ resistor).Select a 10Vpp sine wave with zero offset voltage (check with the scope to be sure this is whatyou’ve got). Measure the amplitude of the voltage at point D as a function of frequency over therange 1Hz to 3MHz. As discussed in the introduction, take data so that when you make a plot witha logarithmic frequency scale the points are roughly equally spaced. To verify that the frequencydependence you observe is not a result of a variation in output of the DS335 or sensitivity of thescope, use both scope channels with one directly connected to the DS335 output. Be sure to useDC coupling of the input signal on both channels.

Make a Bode plot of the measured frequency response. This is a log-log plot of the relativegain (Vout(f)/Vref )) vs. frequency, where Vref is a chosen reference voltage. In this case, use20 log10(V (f)/V (1000Hz) for the vertical axis and log10(f) for the horizontal axis. The verticalaxis is referred to as a “decibel” or “dB” scale – it is a standard in electronics.

A ’bel’ (named for Alexander Graham Bell) is a factor of 10 change in power. This is com-monly used to measure quantities such as amplification and attenuation. For example, the am-plification, in bels, is Abel = log10(Pout/Pin). Then, since P ∝ V 2 for resistive loads, wehave Abel = log10((Vout/Vin)2) = 2 log10(Vout/Vin). Then a decibel is a tenth of a bel, sothe numerical value of the amplification in decibels is ten times more than it is in bels, soAdecibel = 20 log10(Vout/Vin).

On a frequency response plot, the “characteristic frequency” is that frequency at which the re-

sponse falls to√

12 (about 0.7) of its nominal or reference value. Remembering that the power

delivered to a resistor goes like V 2, this point corresponds to where the power delivered is reducedto 1

2 that at the reference frequency. Since log10(0.7) ≈ −0.15, the vertical scale in the Bode plotis down by 3 dB and this frequency is referred to as a “-3 dB point”. Note the -3 dB frequency onyour plot. Also (if you have sufficient data range) determine the rate of fall-off of the frequencyresponse in dB/decade (this is called the “roll-off” rate).

2.4. PROCEDURE. 25

Question 2.4 If the response falls at a rate of α dB/decade, what does this imply about thefunctional form of V (f)?

Question 2.5 Is the high frequency behavior what you expect for a device made entirely ofresistors? Can you explain what might be happening?

Data Collection: Throughout this course, we will measure many Bode plots. In order to dothis, there is a certain minimum set of data that we need to collect. First, always measure bothvin and vout using your oscillscope. You will find that voltage given bv the signal generator maybe inaccurate. Second, in order to measure a phase difference between the input and output, weneed to measure how far through a cycle the output is shifted realtive to the input. We do this bymeasuring a time difference between the peak of the input and the peak of the output voltages.The phase difference, ∆φ, is then computed from the frequency, f , and the time difference, ∆t as

∆φ = (2π) f ∆t .

Given this, we would expect to collect data as shown in Table 2.1. We note that the units listedin the table may not be the best choice—milliseconds might be better than seconds. We also needto choose a form for v. Is it RMS, amplitude, or peak-to-peak? What ever we choose, we alsoneed to be consistent throug out our measurements. Finally, in using our scope, it is best to putthe larger signal on channel one. In this case, put vin on channel one and vout on channel two.

4. AC vs. DC coupling into the oscilloscope. When an input channel is set to “AC coupling”,an input blocking capacitor is put in series between the input terminal and the scope’s amplifier.


Measured Quantities Computed QuantitiesFrequency Input Output Time Gain Attenuation Phase

Voltage Voltage Shift Shiftf (Hz) vin (V) vout (V) ∆t (s) | vout/vin | 20 dB log | G | ∆φ (rad)

Table 2.1: The data needed to make a Bode plot of a circuit.

This capacitor will reduce the scope’s response at low frequency (we will consider this effectquantitatively in a later lab); the input gain is zero at zero frequency or DC. This blockingfunction is convenient when you want to examine a small AC signal that rides on top of a largerDC offset.

By putting the same signal into both channels of the scope and coupling one AC and one DC,measure the frequency response of the AC coupled channel of the scope. At high enough frequency,both channels should yield the same trace – you can overlap the traces so you can see when theystart to deviate. Starting at a “high” frequency, measure the frequency response of the twochannels and make a Bode plot using the ratios of the two measured signals. Determine the -3 dBpoint and the roll-off rate.

You will need to remain aware of these results when you do measurements throughout the rest ofthe semester. You’ll have to choose whether to use AC or DC coupling for each measurement.

2.5. ADDITIONAL PROBLEMS 27



1. You are to build the R2R-ladder circuit shown below in lab. You supply an oscillatory input voltageof vin(t) with frequency ωi and measure an oscillatory output voltage, vout(t) with frequency ωo.(a) How is ωo related to ωi? (b) What is vout in terms of vin, R and ωi? (c) Make an accurateBode plot of the gain of this circuit for a frequency range from 1Hz up to 1MHz. (d) Sketch theThevenin equivalent circuit as seen looking into A-B for your circuit. In terms of V0 and R, whatare Vth and Rth? ð

R

ÿ2R ÿ ðvin(ωi, t)

R

ÿ R

ÿ òR ÿ òvout(ωo, t)

2R ÿ

Figure 2.1: The circuit for problem 1.

2. In Figure 2.2 is an image of your oscilloscope from lab. The solid curve is channel 1 and the dashedcurve is channel 2. You may assume that the input to your circuit is displayed on channel 1 and theoutput from your circuit is on channel 2. Answer the following questions based on these measuredscope traces. (a) What is the frequency of the input signal? (b) What is the “peak-to-peak” andthe “RMS” voltage of the output signal? (c) For this particular frequency, what is the gain, | G |,of your circuit? (d) For this particular frequency, what is the phase difference

∆φ = φout − φin ,

(in degrees) between the input and output? (e) On the plot above, accurately sketch what theoutput signal would look like if the phase difference from part (d) were 180.

-5

-4

-3

-2

-1

0

1

2

3

4

5

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

Time (ms)

Vo

lta

ge

(vo

lts)

Figure 2.2: The measured signals for question 2.

Chapter 3

RC and RL circuits: Time DomainResponse

Reference Reading: Chapter 2, Sections 2.6, 2.7 and 2.8.Time: Two lab periods will be devoted to this lab.Goals:

1. Characterize the exponential response to step inputs of reactive circuits.

2. Come to terms with the meaning of a “characteristic time”: τ = RC or τ = L/R.

3. Understand two rules of thumb:

(a) One cannot instantaneously change the voltage across a capacitor.

(b) One cannot instantaneously change the current through an inductor.

3.1 Introduction

We introduce two new circuit elements in this laboratory: capacitors and inductors. Together withresistors, these complete the list of two-terminal, linear devices which are commonly used in electronics.

In this and the following lab, we will study circuits with various combinations of resistors, capacitors,and inductors from two different points of view: the time domain and the frequency domain. In thetime domain we examine transient responses to sudden changes in applied voltages (the closing of aswitch or the application of a step change in voltage). In the frequency domain, we will study theresponse to sinusoidal applied voltages as a function of frequency. The two points of view turn out to beentirely equivalent: complete knowledge of the behavior in one domain implies (with appropriate theory)complete knowledge of behavior in the other. Both points of view are useful throughout electronics aswell as being applicable to a wide variety of other physical systems.

3.1.1 RC circuit analysis

The voltage across a resistor-capacitor pair wired in series (see Fig. 3.1) must equal the voltage across thecapacitor plus the voltage across the resistor. If we write the voltages as a function of time (as opposedto functions of angular frequency ω), then we are using a time domain treatment of the problem. Theequation for the voltages in the RC circuit is

v(t) = vC(t) + vR(t). (3.1)

29

30 CHAPTER 3. RC AND RL CIRCUITS: TIME DOMAIN RESPONSE

Using the relations vC = Q/C and VR = i(t)R, this can be rewritten as:

v(t) = Q(t)/C + i(t)R. (3.2)

Q(t) on the capacitor and i(t) in the circuit loop are related by

Q(t) =

∫ t

0

i(t′)dt′, (3.3)

assuming Q(0) = 0, or

i(t) =dQ

dt. (3.4)

Combining (3.3) or (3.4) with (3.2), a variety of interesting limits can be found. For example, by takingthe derivative of (3.2), we get that

dv

dt=

i

C+R

di

dt.

We can now express the right side in terms of a single time varying quantity, vR(t) as

dv

dt=

vR(t)

RC+dvR(t)

dt.

If the voltage across the resistor changes slowly enough we can neglect the second term on the right.

dvRdt

vRRC

or

1

vR

dvRdt

1

RC.

Referring back to equation 3.2, this amounts to requiring the voltage across R to be small, so most ofv(t) appears across C. Finally, we get that

vR(t) = RCdv

dt. (3.5)

Thus, for slowly varying signals, the voltage across the resistor is proportional to the derivative of inputvoltage . This is called a differentiating circuit as it will differentiate slowly varying input voltages.

/v(t)

ÿC ÿ

R ÿ

òvC(t) òvR(t)

ý òFigure 3.1: An AC source, v(t), driving a simple RC circuit. We can measure the output voltage across thecapacitor, vC(t) or the resistor, vR(t).

As noted in out textbook, the quantity

τRC ≡ RC (3.6)


has the units of time. We define this to be the characteristic time τRC of an RC circuit. This is aquantity that will see many times during this course. This allows us to rewrite equation 3.5 as

vR(t) = τRCdv

dt. (3.7)

One can also take the integral of equation (3.2) to get∫ t

0

v(t′)dt′ =1

C

∫ t

0

Q(t′)dt′ +Q(t)R. (3.8)

Looking back at (3.2), we see that as long as the voltage on C is small, we can neglect the last term onthe right. This means that

Q(t)

RC i(t)

and we note that

i(t) =dQ

dt

so we have that

1

i

di

dt 1

RC

which means that the signal should be rapidly varying. Dividing equation 3.8 by RC, we get that

vC(t) =1

RC

∫ t

0

v(t′)dt′.

This can be written in terms of the characteristic time as

vC(t) =1

τRC

∫ t

0

v(t′)dt′. (3.9)

Thus, we see that for rapidly varying input signals, the voltage across the capacitor, vC(t), is the integralof the input voltage, v(t).

In this lab, we are going to consider a step-function input voltage where at time t = 0, the voltageinstantaneously goes from zero to some value, V0, and the remains at V0 for all future times. Given thisan an input voltage, we would find the following solutions for the voltage across the resistor and thecapacitor for times t > 0.

vR(t) = V0 e−t/τRC (t > 0) (3.10)

vC(t) = V0

(1− e−t/τRC

)(t > 0) (3.11)

We also note that, as expected, vR(t) + vC(t) = V0. For a step-function input, we can also look atequations 3.7 and 3.9 which indicate that the voltage across the resistor should behave like the derivativeof our step function, while that across the capacitor should behave like the integral. At first glance, thisseems a bit crazy to claim that equations 3.10 and 3.11 behave like this. However, we have a coupleof caveats on how rapidly the signal is changing for these to work. In the case of the derivative, if welook at equation 3.10 on time scales much larger than τRC , the exponential decay will look like a spike.Similarly, if we look at equation 3.11 on time scales small compared to τRC , then the output will looklike a linearly rising voltage. Both of these are consistent with what we expect.


3.1.2 Analysis of RL circuits

The voltage across an inductor-resistor pair in series can be written as

v(t) = vL + vR

and can be expanded to yield that

v(t) = Ldi

dt+ iR . (3.12)

An analysis similar to that above for the capacitor yields integrator and differentiator circuits built usingan inductor. For slowly varying inputs, most of the voltage is across the resistor and the remainingvoltage across the inductor satisfies the expresion

vL(t) =L

R

dv

dt.

Dimensional analysis implies that

τLR ≡ L

R(3.13)

is the characteristic time constant for this LR circuit. Thus, we can write our voltage across the inductoras

vL(t) = τLRdv

dt. (3.14)

For rapidly varying inputs, most of the voltage is across the inductor and the voltage across the resistorcan be written as

vR(t) =1

τLR

∫ t

0

v(t′)dt′ . (3.15)

As we did with the capacitor, we can also consider a step-function input to this circuit. In the limitof a pure inductor, we would find a solution similar to what we did for the capacitor. As the currentis changing rapidly at time t = 0, we would initially find all the voltage across the inductor, and noneacross the resistor. It would then decay away from the inductor, and build up on the resistor, In thecase of a physical inductor, there is not only an inductance L, but and internal resistance RL as well.This means that at long times, we have a voltage divider with resistors R and RL. Solving the equationsand defining the characteristic time to be

τRL =L

R+RL. (3.16)

Thus, we would find that

vR(t) =R

R+RLV0

(1− e−t/τRL

)(3.17)

vL(t) =RL

R+RLV0 +

R

R+RLV0 e

−t/τRL . (3.18)

We note the subtle difference between these expressions and the corresponding ones for the capacitor.In particular, we see the impact of the two resistors, R and RL, leading to terms that come from thevoltage divider expression. The long time limit of the voltage across the resistor is

vR(t =∞) =R

R+RLV0 ,


while that for the inductor is

vL(t =∞) =RL

R+RLV0 ,

As with the capacitor, we have vR(t) + vL(t) = V0 at all times.




V

C

ÿý ÿ

R VR V

L

ÿý ÿ

R VR

Figure 3.2: Figure for the prelab work.

1. What are the characteristic time constants for the following circuits? Take R = 4.7 kΩ,C = 0.1 µF, L = 1 mH.

2. Of what order are the differential equations that govern the behavior of the above circuits?

3. After a long time, which element in the left-hand circuit will have a significant voltage? Inthe right-hand circuit? What about at the instant of closure of the switches?




1. The Global Specialities 1302 DC Power supply.









1. 470 Ω resistor.

2. 1 kΩ resistor.

3. One additional resistor you choose to match the inductor.

4. 27 pF capacitor.

5. 0.33µF capacitor.

6. 500mH inductor.

3.4 Procedure

3.4.1 Gotcha!

1. Is the DS335 set to be “High-Z”?

2. Is the voltage offset of the DS335 set to 0V ?

3. Is the “current limit” turned to the maximum value on your DC power supply?

4. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DCoffset, then you need to DC couple. If you want to only see the time-varying part of the signal,then you want to AC couple.

5. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate yoursignals.


3.4.2 Time domain response of RC circuits

Voltage across the resistor. Investigate the output characteristics of the circuit shown in Fig. 3.3.In order to observe the complete transient response, you want to apply a step voltage and then holdthis applied voltage for a time that is long compared to τ (i.e., until the transient has died away). A’transient’ is a temporary signal which exists as a system moves from one stable mode to another. Inthis case, the transient exists as the system moves from an uncharged capacitor and zero applied voltageto an applied voltage and a steady charge on the capacitor.

1. Set up the circuit shown using C = 0.33µF and R = 1kΩ.

2. As the supply voltage, use 5 Volts from the DC supplies at your experimental station. The diagramindicates that you could ground one point of the circuit. In fact it is more convenient to workwith the circuit “floating”, meaning that you don’t ground any point. Then you can connect thescope leads (one of which is grounded) anywhere in the circuit without introducing an unintendedshort.

3. Calculate the numerical value of the time constant for this circuit.

4. Instead of using a switch, you should be able to obtain the transient response by plugging a bananaplug into the terminal on your proto-board or just plugging a jumper wire into the proto-board.

5. You will have to set up the oscilloscope to take a “single shot” measurement of the transient.This will require some trial and error to make the triggering work and to be sure that you get thehorizontal and vertical scales right. Remember that you must discharge the capacitor after eachattempt – you can do this by connecting a wire across it for a short time. You can erase trialsignals and reset the trigger by pushing the single seq button.

If you have trouble capturing the signal with your scope, you may want to warm up on somethingsimpler. Try to measure the voltage across a resistor just as you apply voltage across the resistor.This gives you a very simple step function to practice triggering your scope.

6. Once you have obtained a clean transient signal, you should transfer the data to a diskette so thatyou can perform least-squares fits on a computer. Be sure to SAVE the wave function of interest(not the scope setup and not the wrong channel of the scope) in spreadsheet format. To make sureeverything is working correctly, plot at least one of your measurements on the computer beforegoing on to do the rest of the experiment.

7. Verify that the expected functional form and time constant are observed.

(a) To verify the functional form, make a plot that will make the expected form a straight line.To do this, note that if

v(t) = Ae−t/τ (3.19)

thenln v(t) = lnA− t/τ. (3.20)

V

C

ÿý ÿ

R VR

Figure 3.3: The setup to measure the time response of an RC circuits.

3.4. PROCEDURE 37

(b) The above equation implies a “natural” way to plot your data. Find a way to plot your dataso that your data points form a straight line with slope −1/τ . What happens if you uselog10(...) instead of ln(...) (log10 is a more customary way to plot data because humans haveten fingers instead of 2.7182818...!)?

The input function to your circuit is a step function that turns on when you close the switch. When weare looking at the response of an RC circuit, we talk about times either long or short compared to thetime τ = RC.

Question 3.1 What does the derivative of a step function look like? What part(s) of the observedoutput signal mimics the derivative of the input “signal”? Is this consistent with the above equations?

Voltage across the capacitor.

1. Reverse the positions of R and C in your circuit and measure the transient response across C. Or,if you haven’t grounded the circuit you can just move the scope probe leads to the capacitor.

2. Graph and fit the voltage across C as a function of time. Note that the voltage across the capacitoris not simply an exponential. So simply taking the ln of your data won’t give you a linear graphto fit. Think about what simple manipulation of your data you must do in addition to taking theln.

The input function to your circuit is a step function that turns on when you close the switch. When weare looking at the response of an RC circuit, we talk about times either long or short compared to thetime τ = RC.


Question 3.2 What does the integral of a step function look like? What part(s) of the observedoutput signal mimics the integral of the input “signal”? (Hint: think about τ).

Measuring a fast transient. To see how well the scope works, try measuring the transient in acircuit with R = 470Ω and C = 27pf (or similar values).

Question 3.3 What is the calculated time constant? Recall that the speed of light is 1 foot pernanosecond (excuse the units!)

You aren’t likely to be able to close a mechanical switch fast enough to make these measurements.Instead, you can replace the D.C. power supply and “switch” with the square-wave output of your DS335Function Generator. This will serve to charge and discharge the capacitor repeatedly. You should usea high frequency square wave. Prove to yourself that the circuit will have many RC times to reachequilibrium before the square wave voltage reverses.

3.4. PROCEDURE 39

Even the “square wave” can’t make transitions on a time scale which is fast compared to RC. Lookat the shape of your square wave on the scope and determine how long it takes the voltage to “rampup” to a reasonably stable level. You only expect the simple RC behavior in the circuit once the inputvoltage has stabilized. When you analyze the data, you will want to ignore the first part of the transient,taken when the input voltage was changing. Knowing the “ramp up” time allows you to decide whichpart of the data to discard.

Again, you should measure, plot, and fit the transient across the resistor and across the capacitor.Now the circuit is not floating because the DS335 output is grounded on one side. You’ll have to arrangethe circuit so you can measure the desired voltage while still having the ground connection of the scopeconnected to the same part of the circuit as the ground connection of the function generator.

Data Collection: In this experiment, the primary data consists of a scope trace of showing the timedependence of the signal across a given component. The rather large amount of data from these tracescan loaded into an Excel file and then manipulated. However, in doing this analysis, it is necessary tolook at the data. There will be some part of the data that corresponds to t < 0, where the voltageacross the components in zero. This is not useful for our analysis. There will also be part of the signalfor large times where the voltage has fallen below the line noise. In this region, it will appear that theoutput voltage has become constant, and no longer follows an exponential decay. These data shouldalso be discarded from your analysis.

In the case of the resistor, the voltage should now follow equation 3.10, and it is easy to linearizethis by taking the natural log of both side. For the case of the capacitor, we have equation 3.11. Here,simply taking the natural log of both sides leads to a mess. We first need to isolate the exponentialpiece of this equation.

vC(t) = V0

(1− e−t/τRC

)(3.21)

V0 − vC(t)

V0= e−t/τRC (3.22)

Thus, taking the natural log of the latter equation will yield an equation linear in time, and allow us tofit for the slope which is related to τRL.

3.4.3 Time domain response of RL circuits

V

L ÿý ÿ

R VR

Figure 3.4: Setup for time response of RL circuits.

The circuit shown in Fig. 3.4 and the one with R and L interchanged are to be investigated. Realinductors introduce a slight complication: they have an internal resistance, RL, that is generally non-negligible and we have to write

v(t) =

[Ldi

dt+ iRL

]+ iR. (3.23)


The internal resistance is usually not shown in circuit diagrams, but must always be kept in mind.For example, you cannot directly measure the voltage across just the inductance; the apparent voltageis across the series combination of L and RL. In fact, RL is not just the DC resistance of the coiledwire either: The effective RL includes all dissipative effects which remove energy from the circuit. Thisincludes inductive heating in any magnetic core material around which the coil is wound and, at highfrequencies, radiative effects as well.

1. Measure the apparent resistance and inductance of your inductor with your Ohmmeter and theLRC meter.

2. Setup the circuit shown in Fig. 3.4. Use a series resistance (R in the diagram) that has a valuecomparable to RL.

3. Measure the functional form and time constant of the voltage across R in the same way you didfor the RC circuit. Also, note the final voltage across R.

Question 3.4 What are the final and initial voltages across L?

4. What is RL? There are (at least) two ways to determine this from the data: from the timeconstant and from the final voltage across R.

Question 3.5 Do these agree with each other? Do they agree with our ohm-meter measure-ment of RL?




1. Let us consider the ideal RL circuit as shown in Figure 3.5. The inductor has inductance L and isassumed to be an ideal inductor meaning its internal resistance is zero. The resistor has resistanceR and the circuit is connected through a switch to a DC source whose voltage is V0. (a) At timet = 0, the switch is closed and current begins to flow through the circuit. Sketch the voltagebetween the points A and B as a function of time, vAB(t). (b) In terms of the instantaneouscurrent i(t) in the circuit, what is the voltage drop across the resistor, vR(t) and the inductor,vL(t)? (c) Our expressions in part (b) lead to the first-order differential equation for the current

0 =d

dti(t) +

R

Li(t)− V0

L.

Consider a solution of the form

i(t) = i0(1 − e−αt

)where i0 and α are constants. What must i0 and α be in terms of R, L and V0 for the solution towork?

V0

ÿ R

ÿ òL ÿ òvL(t) ÿ ñA

óB


2. RC circuits can be used as the timing mechanism in an electronic clock where the resistor andcapacitor are chosen to yield an appropriate τRC . In the circuit in Figure 3.6, we saw that thevoltage across the resistor was given as

vR(t) = V0 e−t/τRC ,

where t measures the time from when the switch is closed. (a) In terms of τRC , how long does it

V0

C

ÿ òR ÿ òvR(t)


take for the voltage across the resistor to fall from 23 of its maximum value to 1

3 of its maximumvalue? (b) We would like to design a clock that has a period of T = 0.05 s and we are told thatthe time in part (a) represents 1

2 of the period. If we are using a 1 kΩ resistor, which value shouldwe choose for our capacitor? (c) What would you do if the only capacitors that are available aretwice the value that you need?

Chapter 4

RC, RL, and RLC circuits:Frequency Domain Response

Reference Reading: Chapter 3, Sections 3.1, 3.2, 3.3, 3.4, 3.5, 3.6 and 3.7Time: Two lab periods will be devoted to this lab.Goals:

1. Gain familiarity with the AC frequency response of simple RC, RL, and RLC circuits. In par-ticular, with the amplitude and phase response both in terms of measuring and calculating theseresponses.

2. Understand the meaning of a “characteristic frequency” for these three types of circuits.

3. Understand the meaning of the terms “low-pass filter” and “high-pass filter” and be able to identifythem in a circuit.

4. Understand the requirements for coupling circuit units together in a modular fashion.

4.1 Introduction

We now re-examine the circuits of Lab 3 in a different way. Here, we apply sinusoidal waves rather thanstep inputs and measure the amplitude and phase (relative to the source) of the output signal. Thislab is an excellent place to compare theory to your measurements and such comparisons are expectedin your lab book. Your measurements should be compared to quantitative calculations of the expectedbehavior of the circuits and the results plotted on top of your data.

4.1.1 The Generic Filter

The RC and RL circuits in this lab can be modelled as AC voltage dividers. In order to understandthis, we consider the very general voltage divider network as shown in Figure 4.1. The components Z1

and Z2 can be any combination of elements, and we can model the behavior of this circuit as discussedin chapter 3 of our textbook. For a generic input voltage, vin, we have that the output voltage is givenby our voltage-divider equation as

vout =Z2

Z1 + Z2vin .

43

44 CHAPTER 4. RC, RL, AND RLC CIRCUITS: FREQUENCY DOMAIN RESPONSE

/vin

Z1

ÿZ2

ÿ ò

A

òB

vout

Figure 4.1: A generalized voltage divider constructed of two components with impedances Z1 and Z2. Theoutput is looked at between the terminals A and B.

Since the impedances Z1 and Z2 may depend on the input frequency of our signal, it might be helpfulto write that explicitly. Thus, the gain of our circuit is given as

G(ω) =Z2(ω)

Z1(ω) + Z2(ω). (4.1)

We also recall that the output impedance, or Thevenin impedance is given as

Zout(ω) =Z1(ω)Z2(ω)

Z1(ω) + Z2(ω), (4.2)

and the input impedance of our unloaded circuit is just

Zin(ω) = Z1(ω) + Z2(ω) . (4.3)

As noted in chapter 3 of our textbook, these three quantities characterize the behavior of our filter andallow us to view the circuit in terms of the equivalent circuit shown in Figure 4.2.ð

Zin

ÿ ðvin

ý ÿ òvout

/Gvin

Zout

ò

Figure 4.2: The equivalent circuit for our filter in Figure 4.1 shown explicitly in terms of the three charac-teristic properties of a filter, the gain G, the input impedance Zin and the output impedance Zout.

We now write the input, vin(t), and output, vout(t), explicitly as sinusoidal signals

vin(t) = Vin ej(ωt+φin)

vout(t) = Vout ej(ωt+φout) .

The quantities Vin and Vout are the amplitudes of the signals, while the angular frequency ω is given as2π f . The two phases, φin and φout essentially set the value of the signals at time t = 0. The measuredgain of our circuit is then

| G | =VoutVin

,


and our measured phase difference is

∆φ = φout − φin

This allows us to write the measured gain as

G = | G | ej∆φ .

4.1.2 RC Filters

We can now apply what we saw in Section 4.1.1 to the specific case of RC filters. For us, we will considerthe two simple filters shown in Figure 4.3. To analyze these, we simply identify Z1 with the resistor orthe capacitor and Z2 with the opposite component. We also recall that as we did in our textbook, thecharacteristic frequency of these circuits is given as

ωRC =1

RC. (4.4)

In our textbook, we saw that the left-hand circuit is known as a low-pass filter, while the right-handcircuit is known as the high-pass filter. We n Applying equation 4.1 to these, we find that the gain for

/vin

R

ÿC ÿ ò

A

òB

vout /vin

C ÿR

ÿ ò

A

òB

vout

Figure 4.3: The two RC configurations we will consider in this lab. The left-hand circuit is the low-passfilter while the right-hand circuit is the high-pass filter. We will see that the low-pass filter is also known asan integrating circuit, while the high-pass is known as a differentiating circuit.

the low-pass and the high-pass filters are given as

Glp =1

1 + j ωωRC

(4.5)

Ghp =1

1− j ωRC

ω

, (4.6)

where we showed that for frequencies small compared to ωRC , the gain of the low-pass filter is

Glp(ω ωRC) = 1 (4.7)

and for frequencies large compared to ωRC that the gain of the high-pass filter is

Ghp(ω ωRC) = 1 . (4.8)

As discussed in our text, we note that in the region where the frequency is much larger than thecharacteristic frequency, the gain of the low-pass filter become

Glp(ω ωRC) = −j ωRCω

, (4.9)


which we showed yields a circuit that integrates the input voltage. Similarly, for the case of frequenciessmall compared to the characteristic frequency, we have gain of the high-pass filter as

Ghp(ω ωRC) = jω

ωRC. (4.10)

This yields a circuit that differentiates the input voltage.

4.1.3 RL Filters

SImilar to the RC filters from the previous section, we can also build high-pass and low-pass filtersusing resistors and inductors. These circuits are shown in Figure 4.4 where the left-hand circuit is alow-pass filter and the right-hand-circuit is a high-pass filter. Before continuing, we need to point outthat for most “physical” inductors, there is an internal resistance, RL, that may well be of similar sizeas the explicit R in out circuit. Thus, in analyzing there circuits, we need to be sure to consider that

ZL = RL + jωL .

Accounting for the RL of the inductor, we define a characteristic frequency for our RL circuit as

ωRL =R+RL

L. (4.11)

Using this, we can express the gain of these filters in terms of R, RL and ωLR. For the low-passconfiguration in Figure 4.4, it is easy to show that the gain is

Glp =

(R

R+RL

)1

1 + j ωωRL

. (4.12)

Unfortunately, there is no compact form for the high-pass filter.

/vin

L ÿR

ÿ ò

A

òB

vout /vin

R

ÿL ÿ ò

A

òB

vout

Figure 4.4: The two RL configurations we will consider in this lab. The left-hand circuit is the low-passfilter while the right-hand circuit is the high-pass filter.

4.1.4 RLC Filters

The voltage divider result can also be applied to RLC circuits, with Z1 being replaced by ZR and ZLcombined in the appropriate way. Such a circuit is shown in Figure 4.5. The resulting behavior is morecomplex than RC and RL circuits, as the RLC circuit exhibits resonant behavior at a characteristicfrequency,

ωLC =1√LC

. (4.13)


These circuits are discussed in detail in the textbook (Section 3.6). Here we only reproduce that thegain as measured across the capacitor is given as

GC(ω) =1(

1− ωωLC

)2

+ j ωωRC

(4.14)

where ωRC = 1/RC as defined above.

/vin

R

L ÿC ÿ

ò

A

òB

vout

Figure 4.5: The RLC circuit configured to measure the voltage across the capacitor.

4.1.5 Band-pass Filters

As discussed in Sections 3.7 and 3.8 of the textbook, there are many occasions when we need to coupleone functional block of circuitry to another. In fact, it’s hard to think of a situation where this isnot necessary! In the case of a high-pass filter connected to a low-pass filter, we create a band-passfilter. Such a circuit will attenuate signal both above and below some characteristic frequency. The newfeature is that we need to worry about the input impedance of the second filter relative to the outputimpedance of the first filter. We show the equivalent circuit for this in Figure 4.6. In order for theoverall gain of the combined circuit to be the product of the two individual gains, we must have that

| (Zin)2 | | (Zout)1 | . (4.15)

See your textbook for a more detailed discussion of this circuit.ð (Zin)1 ÿ ðvin ý ÿ òvout/G1 vin

(Zout)1

(Zin)2 ÿ /G2G1 vin

(Zout)2

ò

Figure 4.6: The equivalent circuit for the output of one filter used as input to a second filter.




1. You are given the following power series expansions:

cos(x) = 1− x2

2!+x4

4!− · · ·

sin(x) = x− x3

3!+x5

5!− · · ·

ex = 1 + x+x2

2!+x3

3!+ · · ·

Show that ejx = cos(x) + j sin(x) where j =√−1.

2. Consider a voltage source, V (t) = Vo cos(ωt), where the frequency, f varies from 10 Hz upto 100 Hz. Plot the impedance, | Z | as a function of frequency for each of the followingcomponents: a 100 Ω Resistor, a 1.0 µF capacitor, and a 1 mH inductor.


3. A voltage source of V (t) = (5.0V ) cos(ωt) is separately applied to each of the three componentsabove. The frequency f is 100 Hz. Sketch the voltage as a function of time over one cycle ofthe wave. Sketch the current as a function of time in each component over one cycle of thewave.












1. 2.2 kΩ resistor.

2. 22 kΩ resistor.

3. 0.008µF capacitor.

4. 500mH inductor.

5. Additional resistors and capacitors you choose to match your circuit design.

4.4 Procedure

Reminder: At the beginning of each section below, enter into your lab notebook a summary of what youare setting out to do and what the relevant equations are expected to be. Derivations and great lengths ofverbiage are not necessary, but some orienting explanation is. This should be standard practice in anylab notebook!

4.4.1 Gotcha!





5. Are all of your grounds connected to the same point? Are you grounding out your circuit in thewrong place?

4.4.2 Frequency response of the RC voltage divider.

1. Set up the RC circuit using C = 0.008µF and R = 22kΩ and a sine wave of reasonable amplitude(say, 5 Volts). Calculate the expected characteristic frequency in radians per second and in cyclesper second (Hz).

/vin

R

ÿC ÿ ò

A

òB

vout /vin

C ÿR

ÿ ò

A

òB

vout

Figure 4.7: The low-pass (left) and high-pass (right) configuration of the RC circuit to be studied in thislab.

4.4. PROCEDURE 51

2. For both the high-pass (differentiator) and low-pass (integrator) configuration, make careful mea-surements of vout and vin over a frequency range that extends at least two decades below andabove the calculated characteristic frequency. Recall that your lab equipment read frequency, fin Hertz, while theoretically we work in angular frequency, ω, where

ω = 2π f .

Be careful about factors of 2π. As you take the data, plot the “gain”, |G(f)| = |vout|/|vin|, on aBode plot and the phase shift between vout and vin on semi-log scales. (Recall that a Bode plotsis 20 dB × log(G) versus log(f).) Set up the scope to display both signals. The scope can be setto measure the amplitudes of each. You can use the cursors to measure phase shift: You calibratethe distance corresponding to 360, then set one cursor on the zero crossing point of the inputsignal, the other on the corresponding zero crossing of the output; the ratio gives you the phaseshift as a fraction of 360.

3. In one configuration, vout is the voltage across R; in the other, vout is the voltage across C. Youmust determine the necessary wiring for each case.

4. Choose your frequency steps so that your measurements will be roughly equally-spaced on alogarithmic frequency axis.

5. Should you be using the scope’s AC- or DC-coupling input mode for this measurement?

6. Determine the slope of the Bode plot (dB per decade) in the high- or low-frequency limit (whereverG(f) is varying). Make a plot of your data together with a theoretical function going through (ornear?) the data.

7. Determine the frequency at which |vC(f)| = |vR(f)|. Compare your measured value to thecalculated value.

8. Over what range of frequencies do you expect the circuit to integrate or differentiate the inputsignal? To figure this out, you can use the analysis in the Lab 3 write-up or use the frequencydomain logic in Section 3.4 of the textbook. Use the different waveforms available from the signalgenerator to see that the proper mathematical operation is performed. Choose an appropriateperiod for the waves so the integrator or differentiator should work well.


Data Collection: We recall from lab 2 what we need to measure to be able to make a Bode andPhase plot for our filters. This is shown in Table 4.1. We note that the units listed in the table maynot be the best choice—milliseconds might be better than seconds. We also recall from lab 2 that thephase difference is obtained by using the scope cursors to measure the time difference between the peakof the vin signal and that of the vout signal, ∆t. Using ∆t and the frequency of the signal, we obtainthe phase difference as

∆φ = (2π) f ∆t .

Finally, remember that it is important to measure both vin and vout using or oscilloscope and we needto choose a consistent form for v. It can be RMS, amplitude, or peak-to-peak. However, whatever wechoose needs to be consistent throughout our measurements. Finally, in using our scope, it is best toput the larger signal on channel one. In this case, put vin on channel one and vout on channel two.

Measured Quantities Computed QuantitiesFrequency Input Output Time Gain Attenuation Phase

Voltage Voltage Shift Shiftf (Hz) vin (V) vout (V) ∆t (s) | vout/vin | 20 dB log | G | ∆φ (rad)

Table 4.1: The data needed to make a Bode plot of a circuit.

4.4.3 Frequency response of the RL voltage divider.

1. Repeat the above procedure with the “low-pass” configuration of an RL circuit as shown inFigure 4.8. Use a 2.2 kΩ resistor for R and measure the inductance,L, and resistance, RL, of yourinductor.

/vin

L ÿR

ÿ ò

A

òB

vout /vin

R

ÿL ÿ ò

A

òB

vout

Figure 4.8: The low-pass configuration (left) and the high-pass configuration (right) of the RL circuit tobe studied in this lab. We only need to measure the low-pass configuration but you may optionally measureboth.

4.4. PROCEDURE 53

Question 4.3 In the low-frequency limit, what do we expect the gain of the RL low-pass filter tobe?

Question 4.4 In the high-frequency limit, what do we expect the gain of the RL high-pass filterto be?

Question 4.5 Which circuit, RL or RC, works better as a low-pass filter? Why?

4.4.4 RLC Resonant Circuit.

1. Study the discussion of RLC circuits given in section 3.5 of the textbook and calculate a predictedresonant frequency, ωLC . You don’t need to include any explicit resistance in this circuit, but inyour analysis, do include the source resistance, rs, and that internal to the inductor, RL.

2. Construct a series RLC circuit as shown in Figure 4.9. Use your 0.008µF capacitor and theinductor from the previous part of the lab.

3. Measure the frequency response over the appropriate frequency range. Again, choose frequencysteps that will be equally spaced on a logarithmic frequency axis. Choose more points near ωLCto accurately map the behavior.


/vin

R L ÿC ÿ ò

A

òB

vout

Figure 4.9: The RLC circuit configured to measure the voltage across the capacitor.

4. Make a Bode plot and a phase-shift plot as in the above procedures.

5. Compare your results to the expected behavior of your circuit. Use your measurements of theamplitude and phase as functions of frequency to determine the value of the internal resistanceof the inductor, RL. Comment on the result and compare with what you expect, drawing on theappropriate mathematical relations in your textbook.

4.4.5 Coupling Circuits Together: The Bandpass RC Filter.

As discussed in Sections 3.7 and 3.8 of the textbook, there are many occasions when we need to coupleone functional block of circuitry to another– in fact, it’s hard to think of a situation where this is notnecessary! Here, you will design a “band-pass” filter circuit by taking the output of a high pass RCfilter and putting it into a low pass RC filter with the same characteristic frequency.

1. Repeat the design logic in Section 3.8 of the textbook but use a factor of 20 in place of the 100used in the text. This leads to more comfortable element values. You should find that you canbuild the low pass stage of the circuit using the same components you used to build the RC circuitearlier.

2. Build a bandpass filter based on your design.

3. Using 5 Volts from the signal generator, measure the frequency response, both the amplitude andthe phase, and compare to the expected response.

What this exercise does not show you, at least if you do the design correctly, is how things go wrongwhen you do not have the correct progression of input and output impedances. If you have time, youmight want to try using R1 = R2 and C1 = C2 and see what happens to the response.




1. You measure the data shown in Figure 4.10 and plot it on a Bode plot as shown. (a) At approxi-mately what frequency is the 3 dB point? (b) What is the slope of the fall-off in dB/decades? (c)In the fall-off region, how does the gain,| G | depend on the frequency f?

-60

-50

-40

-30

-20

-10

0

10-1

1 10 102

103

104

f

20

db

lo

g(|

G(ω

|)

Figure 4.10: The Bode plot for problem 1.

2. You build the filter circuit shown in Figure 4.11 in lab where you have chosen the resistor to havea value of 4.70 kΩ and the capacitor to be 339 pF . (a) For such a circuit, we talk about high-frequency and low frequency behavior. For this circuit, is f = 20 kHz considered high-frequencyor low-frequency? (b) What is the output impedance of our filter at its characteristic frequency?Give both the complex Zout and | Zout |. (c) Is this a high-pass or a low-pass filter? Justify youranswer with some physics and mathematical arguments.

/vin

C ÿR ÿ ò

A

òB

vout


3. You are given a black-box circuit with two inputs and two outputs. In the lab, you make thefollowing measurements using your signal generator and your oscilloscope. (a) For an input voltagegiven as

vin(t) = (3.00V ) cos(628 s−1 t

)


you measure the output voltage to be

vout(t) = (2.00V ) cos(628 s−1 t

).

At what frequency, f , did you perform this measurement? What is the (complex) gain at thisfrequency (express as magnitude and phase)? (b) For an input voltage given as

vin(t) = (3.00V ) cos(62800 s−1 t

)you measure the output voltage to be

vout(t) = (−0.020V ) sin(62800 s−1 t

).

What is the (complex) gain at this frequency (express as magnitude and phase)? (c) Estimate theslope of the Bode plot from your measurements. (d) You now connect a 4.7 kΩ resistor across theoutput of your black box. For the same input voltage as in part (a),

vin(t) = (3.00V ) cos(628 s−1 t

),

you measure the voltage across the resistor to be

vout(t) = (1.00V ) cos(628 s−1 t

).

What is the magnitude of the output impedance of the black box at this frequency?

Chapter 5

AC to DC Conversion and PowerSupplies

Reference Reading: Chapter 4, Sections 4.5 and 4.6.Time: Two lab periods will be devoted to this lab.Goals:

1. Understand the use of diodes to convert AC signals with no DC component into oscillatory signalswith appreciable DC components.

2. Understand the use of filter circuits to obtain relatively “clean” DC voltages.

3. Become familiar with the “regulation” of various constant voltage supply circuits and the advan-tages of each.

5.1 Introduction

Almost any signal processing circuitry requires the establishing constant bias voltages. Starting withthe 60Hz voltage supply from the power company, how do instruments obtain these various DC supplyvoltages? We will investigate a sequence of circuits for doing this. They all rely on non-linear elementsthat respond differently to different parts of the AC voltage signal.

5.1.1 Average and RMS voltages

First, we need to establish some notation (briefly addressed in Lab 2). AC sinusoidal signals arefrequently referred to in terms of their RMS voltages. RMS stands for “root-mean-square” or, moreexplicitly, the square-root of the average (or mean) of the squared voltage. Note that if

v(t) = V0 cosωt ,

then if we take the average over an integer number of periods, we will get zero. For the case of a singleperiod, we have that the average voltage is

< v > =1

T

∫ T

0

dt v(t), (5.1)

57

58 CHAPTER 5. AC TO DC CONVERSION AND POWER SUPPLIES

which is

< v > =1

T

∫ T

0

V0 cos

(2πt

T

)dt ,

where we recall that ω = 2π/T . This yields that

< v > =1

T

T

2πV0 sin

(2πt

T

)∣∣∣∣T0

which is zero. The RMS voltage is

Vrms =

[1

T

∫ T

0

dt V 20 cos2 ωt

]1/2

. (5.2)

We recall that we can write that

cos2 x =1

2(1 + cos 2x) ,

which means that we have

Vrms =

[V 2

0

2T

∫ T

0

(1 + cos 2ωt) dt

]1/2

,

or

Vrms =

[V 2

0

2T

(t+

1

2ωsin 2ωt

)∣∣∣∣T0

]1/2

.

The sin term goes to zero, and we are left with

Vrms =1√2V0 . (5.3)

This can also be expressed in terms of the peak-to-peak voltage as

Vrms =1

2√

2Vpp . (5.4)

Thus, the “110 Volt” power outlet (where the 110 Volts refers to the RMS value) corresponds to

voutlet(t) =√

2(110V ) cosωt ,

or

voutlet(t) = (155V ) cosωt .

or the wall voltage has 310 Volts peak-to-peak. One justification for using RMS voltages is that theaverage power delivered to a resistive load is related to the RMS. We can see this by noting that theaverage power over one cycle is

< P > =1

T

∫ T

0

dtv2(t)

R, (5.5)


which can be written as

< P > =1

R

[1

T

∫ T

0

dt v2(t)

].

The integral is just the square of the RMS voltage, so we have that the average power per cycle is givenas

< P > =V 2rms

R. (5.6)

As far as power dissipation is concerned, Vrms acts the same as the corresponding DC voltage.While the oscilloscope displays the details of instantaneous waveforms, typical digital volt meters

(DVM) such as the Metex meters read RMS voltages when set on “AC Volts” scales. The latter metersare only reliable for sinusoidal signals with frequencies in the vicinity of 60 Hz.

5.1.2 Transformer operation

In this lab, you will use a transformer to generate a roughly 14 Volt (RMS) AC signal from which youwill obtain various approximations to a constant DC voltage. While the transformer steps downthe 110 Volt line voltage, the output can supply large currents! Be sure to wire andcheck your circuit before plugging the transformer in and be sure that all three outputwires from the transformer are plugged into terminal posts on your proto-boards. Thesecondary side of the transformer is “center tapped”; we will use one side and the center tap — theother wire should just be plugged into a terminal post which is not wired to anything:

ÿ

ð ð

vi = 110V

ò

ò ò14V

14V

centertap

Use this as output

Figure 5.1: A transformer showing two inputs and a center tap on the output. In this lab, we use the centertap and one of the outer taps.

One advantage of using a transformer (beyond the obvious reduction in voltage and, thus, danger)is that while the primary voltage oscillates relative to ground potential, the secondary can “float” toany necessary level (within the limits of insulation used inside the transformer). This is a useful featurefor the measurements you will make on the “diode bridge” circuits used below. Note that when youmeasure a voltage signal using the oscilloscope, you are grounding a point in the circuit. You need tothink before doing this: you may alter the functioning of the circuit significantly and you could alsocause large currents to flow through circuit elements thus generating a characteristic odor andsmoke! You can measure across floating elements more or less with impunity. The Metex meters, onthe other hand, are not grounded so they can be connected anywhere in a circuit regardless whether itis floating or not.

5.1.3 Diode operation

We will also use 1N4004 diodes in this lab to rectify our AC voltage. We recall from lab 1 that the I-Vcurve of a diode can be approximated as shown in Figure 5.2. There is a characteristic voltage, Vd, know


as the diode drop. If the voltage across the diode is smaller than Vd, then know current will flow throughthe diode. If we forward the bias the diode, such that there is Vd across it, then what ever current isnecessary will flow to keep the voltage at Vd. In this way, the diode acts as a one-way current valve.Current will flow when the diode is forward biased with a voltage of Vd, and will not flow otherwise.

V

I

Vd

Figure 5.2: The I–V curve for a diode is shown as the exponentially-rising curve in the plot. We approximateit as a vertical line at the the “diode drop”, Vd. For voltages below Vd, no current flows. Once the voltageacross the diode tries to go above Vd, whatever current is necessary to keep the drop at Vd will flow throughthe diode.

We can be more specific if we consider the simple circuit shown in Figure 5.3. Here we have a variableDC voltage supply connected to a resistor and a diode in series. If VA < VB , then the diode is said tobe reverse biased and from our I-V curve in Figure 5.2, we see that no current will flow through thecircuit. This means that VR = 0 and VD = V .

V

ÿ ÿR ÿÿ ÿ ò òVR òVD

ðA

ðB

Figure 5.3: A simple diode circuit with a variable input voltage.

If VA > VB , but V < Vd, then our I-V curve also indicates that no current will flow through thediode. Again, this gives us that VR = 0 and VD = V . Finally, in the case where VA > VB and V > Vd,then our I-V curve indicates that current will flow through the circuit. In this case, we will have thatthe voltage across the diode will just be the diode drop,

VD = Vd

and the voltage across the resistor will be

VR = V − Vd .

This means that the current through the circuit will be given by the voltage drop across the resistor as

I =VRR


or we have that

I =V − VdR

.

This latter case is known as forward biasing the diode.In this way, the diode functions as a current valve that only allows current to flow in one direction.

When the diode id forward biased, current will flow, and in all other cases, it will not. When currentflows, the voltage across the diode will just be a diode drop, Vd, while in all other cases, the diode willhave all of the voltage in the circuit across it.




1. An ideal diode has a “diode drop” of Vd = 0 V. If the voltage is above zero, current flowsthrough the diode. If it is below zero, no current flows. Consider the situation where youuse an ideal diode in the circuit shown in Figure 5.3 and then drive the circuit with an ACsinusoidal voltage. What is the shape of the output voltage across the resistor, vR, and thediode, vD as a function of time? Sketch these voltages as a function of time over one full cycleof the sine wave.

2. There is typically a non-zero voltage drop across a practical diode where the diode drop istypically Vd ≈ 0.65V . What will this do to the answer that you got in part 1? Sketch theresulting voltages for Vd = 0.65V assuming that the amplitude of the input voltage is largerthan Vd.

3. In section 5.4.5, you will use an electrolytic capacitor. These capacitors have a “positive” and“negative” side. Which side of the capacitor corresponds to the large flat line in the figure?












1. Four 1N4004 diodes.

2. One transformer.

3. One LM7805 Voltage regulator chip.

4. One 1 kΩ resistor.


6. One 0.22µF capacitor.

7. One 25µF electrolytic capacitor.

8. Additional resistors and capacitors you choose to match your circuit designs.

5.4 Procedure

5.4.1 Gotcha!





5.4.2 Transformer

1. Using your oscilloscope, observe the output waveform of the transformer. Note the frequency andamplitude.

2. Measure this same signal using your Metex meter. Is the Metex reading consistent with theobserved waveform? Document what you observe in your lab notebook.

5.4.3 The Half-wave Rectifier

ð ðvi ÿ

RL ÿ ò ò

vo

Figure 5.4: A half-wave rectifier using a 1N4004 diode. The input voltage, vi, is the AC from the wall outlet.

A simple series connected diode which blocks half the AC waveform leaves you with a finite DC oraverage voltage level.

1. Build the circuit in Figure 5.4 with your 1n4004 diode and RL = 1 kΩ.

2. Use your oscilloscope to observe the output waveform of the circuit shown in Figure 5.4 by mea-suring the voltage across the resistor.

Question 5.1 Can you compute the average, or DC, voltage? Is what you see consistent with part(1) and with the diode curves you measured in Lab 1?

5.4. PROCEDURE 65

Question 5.2 Use a load resistor of RL = 1kΩ to make your measurement. Draw a sketch ofwhat you observe in your lab notebook (or capture a sweep and make a plot of the data).

5.4.4 The Full-wave Rectifier

ð ðvi ÿ

ÿÿ

ÿ

ÿRL

ÿ ò

òvo

Figure 5.5: A full-wave rectifier using four 1N4004 diodes. The input voltage, vi is the AC from the walloutlet.

The diode “bridge” circuit shown in Figure 5.5 directs current always in the same direction throughthe load, RL.

Question 5.3 Verify this statement by tracing the current path available when the top transformerterminal is positive (and negative) with respect to the bottom terminal.

1. Construct the circuit in Figure 5.5 using four 1n4004 diodes and a 1 kΩ resistor for RL.

2. You can observe the waveform by measuring the voltage across the load resistor, RL.


Question 5.4 What, roughly, is the DC, or average, voltage?

3. Confirm your expectation by switching the oscilloscope input to the AC coupled setting. Howdoes this signal change when you use a 1kΩ vs a 10kΩ load resistor?

4. Draw a sketch of what you observe in your lab notebook (or capture).

5.4.5 The Full-wave Rectifier With Filtering

To smooth the output and better approximate a constant voltage, we can place a filtering or bufferingcapacitor across the output as shown in Figure 5.6.

1. Try using a filtering capacitor of Cf = 0.22µF .

2. Next try a25µF electrolytic capacitor as your buffering capacitor. Be sure to observe the polarityhere!

3. In each case, measure the ripple voltage (peak-to-peak fluctuation).

ð ðvi ÿ

ÿÿ

ÿ

ÿ ÿRL

ÿ ÿCf ò

òvo

Figure 5.6: A full-wave rectifier using four 1N4004 diodes, and an electrolytic filtering capacitor. The inputvoltage, vi is the AC from the wall outlet.

Question 5.5 What is the relevant quantity which determines how “constant” the voltage is?

5.4. PROCEDURE 67

Question 5.6 Which resistance sets the characteristic time of this low-pass filter?

Question 5.7 Do you want a small or a large capacitor? Why?

GndOutput

Input

Top View

Side View

Input

Figure 5.7: The LM7805 voltage regulator pin out. In the (lower) side view, the pin closest to you is the“Input”.

5.4.6 The Integrated-circuit Regulator

The simplest way to make a good DC supply for real circuits is to build a rudimentary DC supply suchas the one in Section 5.4.5 and then use an integrated circuit (IC) “voltage regulator” to stabilize it.Such a regulator is the LM7805 whose pin-out is shown in Figure 5.8.

1. Construct the circuit shown in Figure 5.8 using an LM7805 which is a 5 Volt supply regulatorwhich is sketched in Figure 5.7. The diagram above looks at the 7805 from the labelled side, andthe three pins are as labeled. We use this IC as a “black box” and just empirically note the qualityof performance (the LM7805 costs $1.18).

2. How does the DC voltage vary with load? You probably own several power supplies of this sortin various pieces of electronics.


ð ðvi

ÿ

ÿÿ ÿ

ÿ ÿRL

ÿ LM7805 ÿCf ÿ

ò ò

vo

outin

gnd

Figure 5.8: A full-wave rectifier with four 1N4004 diodes, an electrolytic filtering capacitor, and an LM7805regulator chip. The input voltage, vi is the AC from the wall outlet.

Question 5.8 How does the DC voltage vary with load – i.e., characterize the “voltage regulation”?




1. (a) Consider the AC voltage given as

v(t) = v0(1 + 2.0 sinωt) ,

where v0 and ω are positive constants of appropriate units. What is the average voltage as takenover three periods of input voltage? (b) The input voltage given above is fed into the diode-resistorcircuit as shown in Figure 5.9. Assuming that the diode drop is Vd = 0V , make an accurate sketchof the input voltage and the voltage as measured across the resistor for three periods.

/v(t)

ÿR ÿ ò ò


2. Consider the half-wave rectifier circuit shown in the left-hand circuit in Figure 5.10. An AC inputvoltage is supplied to the input of the circuit such that

vin(t) = v0 cosωt .

(a) Assuming that the diode-drop voltage, Vd, is small in comparison to v0, sketch the input voltageand the voltage across the capacitor as a function of time over one period of the input voltage.(b) The capacitor will eventually charge up. When this finally happens, what will VA − VB be?(c) We now modify the circuit by adding a second diode-capacitor stage as shown in the right-hand circuit. In this case, both capacitors will eventually charge up. After this happens, what isVA − VB?

/vin(t)

ÿ C ÿ

óA óB

/vin(t)

C ÿÿ ÿC ÿ

òA

òB


Chapter 6

Voltage Multipliers

Reference Reading: Chapter 4, Sections 4.6Time: One and a half lab periods will be devoted to this lab.Goals:

1. Understand how buffering capacitors can be combined with diodes to clamp a voltage to a DClevel.

2. Understand how a half-wave rectifier combined with a buffering capacitor can be used to obtain aDC voltage from an AC input.

3. Understand how these elements can be combined to build a multi-stage voltage multiplier.

4. Study the limitations of voltage multipliers.

5. Understand when to use DC-coupling and when to use AC-coupling on the oscilloscope.

6.1 Introduction

In this lab we will work with simple diode-based circuits to understand how to take an AC input voltageand produce a DC output whose voltage is larger than the amplitude of the input voltage. We willultimately use this to build a Cockcroft-Walton voltage multipler, and then we will examine the outputcharacteristics of this multiplier.

6.1.1 The Voltage Clamper

The voltage clamper is a circuit that will add a constant DC offset to an AC signal. A simple exampleof this circuit is shown in the left-hand side of Figure 6.1 where the DC offset is created by charging upa buffering capacitor, C. Once charged, this capacitor will act as a DC voltage source.

To understand how this circuit works, we start by assuming that the voltage drop, Vd across thediode is zero

Vd = 0

We now take an input AC voltage vin(t) given as

vin(t) = v0 cos (ωt) , (6.1)

71

72 CHAPTER 6. VOLTAGE MULTIPLIERS

/vin(t)

C ÿ

ÿ ò òvout(t)

/vin(t)

v0 ÿÿ

ò òvout(t)

Figure 6.1: The left-hand circuit shows a voltage-clamper. After the capacitor charges up to the amplitudeof the input voltage, v0, current is no longer able to flow in either direction across the diode. The right-handcircuit shows what effectively happens after the capacitor is charge. The diode behaves as if it is not thereand the capacitor looks like a DC voltage supply.

which we can write in terms of the period T as

vin(t) = v0 cos

(2πt

T

).

With Vd = 0, the capacitor will see a maximum potential across it of v0, the amplitude of our input. Aslong as the period of the signal is short in comparison to the time it takes to discharge the capacitor, thiswill cause the capacitor to charge up so there is a voltage v0 across it. The orientation of the diode willinsure that the lower side of the capacitor is at a higher potential than the upper. Hence, the orientationof the electrolytic capacitor and the effective DC supply in Figure 6.1. This leads to an output voltageof the form

vout(t) = v0 + v0 cos

(2πt

T

), (6.2)

where we have an AC signal of amplitude v0 superimposed on a DC level Vo of

Vo = v0 .

We can see this by assuming that the lower side of the voltage source is at a higher potential thanthe upper side. Then the diode will be forward biased and current will flow up through the diode andcapacitor. The lower side of the capacitor will be at a higher potential than the upper side. If the upperside of the voltage source now has the higher potential, then the diode will be reverse biased and nocurrent will flow. Thus, to the extent that the time it takes to charge and discharge the capacitor islong compared to the period T , the capacitor will charge up, and in doing so the output voltage willbe clamped to voltage of the capacitor. Such a rising voltage is shown in Figure 6.2 where we see thecapacitor start to charge up at time t = 0, and then charge up over several periods of the input voltage.

The rate at which the capacitor charges up is controlled by an RC time constant, τRC . In the circuitin Figure 6.1, there is no obvious resistor in the circuit. However, we note that the AC supply drivingthe clamp has some output impedance, Zout. The magnitude of this Zout will serve as the resistance Rin our circuit. If the circuit is driven by an input voltage of amplitude v0 and the DC voltage sags to vsover one period of the input signal, then we can write that

vsv0

= e−T/τRC ,


-1.5

-1

-0.5

0

0.5

1

1.5

2

2.5

-2 0 2 4 6 8

-Vd

Time ( T )

Volt

age

(

v0 )

Figure 6.2: The output of a voltage clamper. At time t = 0 the capacitor begins to charge up, eventuallypulling the DC level on the output up to v0 − Vd.

where we recall that the characteristic time is given as

τRC = RC .

Thus, we can write that

τRC = −T / ln

(vsv0

). (6.3)

For the voltage to drop to no less than 95% of the input voltage, we must have that τrc ≈ 20T and forno less than 99% of the input voltage, τrc ≈ 100T .

We now need to consider a real diode in which Vd is not zero. If v0 is large in comparison to theactual diode drop, Vd, then this may be a reasonable approximation. However, this is not genrallytrue. We can start with our idealistic model and treat Vd as a constant (typically 0.65V ). Under thisassumption, we would just expect that the DC level would go to

Vo = v0 − Vd (6.4)

and everything else that we did above is still correct. While this is a good first approximation, it is notcompletely correct.

To be more precise, we saw that we could describe the I–V curve of a pn-junction (or a diode) bythe Shockley equation,

I(Vd) = IS

(eVd/(mVT ) − 1

). (6.5)

In this expression, the thermal voltage VT is just

VT =kBT

e,


Voltage

Current

Vd

Operating

point

Figure 6.3: The I-V curve of a diode following equation 6.5.

and is approximately 25mV at room temperature. The saturation current, IS is just a constant valueand m is a constant typically between 1 and 2. We can solve equation 6.5 to give that

Vd ≈ mVT ln

(IdIS

)(6.6)

In Figure 6.3 we show the expected I-V curve of a diode. There we see that the nominal voltage drop,Vd is chosen to be an average for typical operating currents in the diode.

As the capacitor charges up, the amount of current that can flow decreases. This in turn causes alogarithmic drop in the value of the diode voltage, Vd, as we move down the curve in Figure 6.3. Theactual Vd will then be something smaller than our nominal value, and the capacitor will actually be ableto charge up beyond our nominal expectations. This is indicated as the “Operating point” in Figure 6.3.

6.1.2 The Voltage Doubler

The voltage doubler circuit adds a half-wave rectifier to the output of our voltage clamp from Sec-tion 6.1.1. This rectifier then uses a second capacitor to buffer the output such that it will charge up totwice the input voltage, 2v0. In the left-hand circuit in Figure 6.4 is shown the simple voltage doubler.Assuming that we have chosen reasonable values for our capacitors, the voltage clamper charges up toV0, meaning that the point between the C1 and the two diodes will have a voltage given as

v(t) = V0 + v0 cosωt , (6.7)

where the DC voltage level V0 is given by equation 6.4.

/vin(t)

C1 ÿD1 ÿ

D2

ÿC2 ÿ ò òvout(t)ý /vin(t)

v0 − vd ÿ D2

ÿC2 ÿ ÿ ò òvout(t)ý

Figure 6.4: On the left is shown a voltage-doubler circuit. The first capacitor/diode pair (C1 and D1 form avoltage clamper, which then drive the half-wave rectifier formed by D2 and C2. Once C1 charges up, it willbehave like a DC voltage source of value. This also leads to a situation where D1 no longer allows current toflow in either direction. This means that the circuit will behave like that shown in the right-hand schematic.


When this happens, diode D1 effectively stops conducting in either direction, so we can pretend thatit is no longer present ( as we did in the right-hand side of Figure 6.1). Because C1 is charged up to avoltage V0, we can treat it as a DC voltage source. Thus we can draw the equivalent for our doubleras in the right-hand circuit in Figure 6.4. The diode D2 will now conduct when the upper side of thevoltage source is more positive than the lower side, and as we saw with the clamp. This means thatthe capacitor C2 will charge up. It will eventually reach a point when it has a voltage of 2V0 across it,with the upper face being more positive than the lower face. When this happens, the diode D2 will nolonger conduct in either direction. As such, we will be left with a constant DC voltage of 2v0 across thecapacitor C2. Thus, the output will be a DC voltage whose values is twice the amplitude of the inputsAC signal.

vout = 2V0 .

Taking into account the diode drop voltage explicitly, we have that

vout = 2 (v0 − Vd) .

We now recall that as we saw with the voltage clamper, we do not see the full Vd drop across the diodes,but only some fraction of it.

While we have built a circuit that appears to have a DC level that is twice the input, in fact thereare some issues which limit this circuit. In particular, the output impedance of the circuit tends to befairly large and the voltage doubler cannot supply very much current to a load. We will investigate thisfurther when we discuss the voltage multiplier in Section 6.1.3.

6.1.3 The Voltage Multiplier

We can continue with the doubler circuit that we examined in Section 6.1.2 by adding additional stagesto the circuit. Such a circuit is shown in Figure 6.5 where the output labeled a corresponds to thedoubler we saw earlier. There we saw that

Va = 2 (v0 − Vd)

where v0 is the amplitude of the input voltage, vin(t), and Vd is some fraction of the nominal voltagedrop across one of our diodes. The second stage has an output at b and has a nominal output voltage of

Vb = 4 (v0 − Vd) .

The third stage has its output at c with nominal output voltage of

Vc = 6 (v0 − Vd) ,

and if we were to continue this circuit to n stages, we would expect that output voltage Vo would be

Vo = 2n ( v0 − Vd ) . (6.8)

This type of voltage multiplier is known as a Cockcroft-Walton voltage multiplier and is named for itsinventors, Sir John Douglas Cockcroft1 and Ernest Thomas Sinton Walton2.

While the Cockcroft-Walton multiplier can be used to generate large DC voltages, it is rather limitedin the current that it can deliver to its load. It also has an AC ripple on the nominal DC voltage level.

1Sir John Douglas Cockcroft was a British physicist who worked with Ernest Rutherford in Manchester. He shared theNobel prize in physics in 1951 with Ernest Thomas Sinton Walton for splitting the atomic nucleus.

2Ernest Thomas Sinton Walton was an Irish physicist who together with SIr John Douglas Cockcroft developed theCockcroft-Walton accelerator that won them the Nobel prize in 1951 for the splitting of the atomic nucleus.


/vin(t)

C ÿÿ ÿý

ÿÿ

C

C

ÿÿ

ÿÿ

C

C

ÿÿ

ÿÿ

C

òa

òb

òc

xyy z

xyy zFigure 6.5: The Cockcroft-Walton voltage multiplier.

Assuming that the multiplier is built using identical capacitors and diodes, the output voltage Vo, willbe smaller than that given in equation 6.8. It is typically written as the voltage delivered to a load, VLis given as

VL = Vo − Vdrop (6.9)

where Vo is given in equation 6.8 and the voltage drop, Vdrop, is given by equation 6.8.

Vdrop = ZC IL(4n3 + 3n2 − n

)(6.10)

In this expression, n is the number of stages in the multiplier and ZC is the magnitude of the impedanceof one of the capacitors at the AC frequency f .

ZC =1

ωC

The load current, IL, is the current drawn by the load on the output of the multiplier. In literature,one often sees equation 6.10 approximated with ZC = 1/(6fC).

In addition to the voltage drop, the output also has an AC ripple whose amplitude, vr, is given as

vr = ZC IL n (n+ 1) , (6.11)

where as before, the number of stages in the multiplier is given as n. This ripple voltage is the result ofthe capacitors charging and discharging and is shown schematically in Figure 6.6.

We can use equation 6.10 to characterize the output impedance of the multiplier. We have that theoutput voltage under load of the multiplier is

VL = Vo − Vdrop ,

which we can rewrite as

VL = Vo − ZC IL(4n3 + 3n2 − n

).

From this, we expect that the output impedance, Rout, of the multiplier is given as

Rout = ZC(4n3 + 3n2 − n

), (6.12)

which increases rapidly (n3) with the number of stages in the chain. We also saw that the ripple voltageincreases as n2 with the number of stages, thus without doing something additional, there is a very finitelimit in the number of stages that make sense in such a voltage multiplier. Some discussion of tuning


Time

Vout

Vdrop

Vo

vr

T 2T 3T0

Figure 6.6: The output voltage of a Cockcroft-Walton voltage multiplier. The nominal voltage Vo is givenas in equation 6.8, the voltage drop under loading, Vdrop is from equation 6.10 and the voltage ripple, vr isgiven in equation 6.11. The ripple voltage arises from the charging and discharing of the capacitors underload.

the capacitors to improve this performance can be found in the literature 3. There, a more optimalsolution is found when the the capacitors in Figure 6.7 are chosen based on the stage number, i.

C2i = (n− i+ 1) C

C2i−1 = (n− i+ 1)2C

In such a configuration, the larger capacitors are in the earlier stages.

/vin(t)

C1

ÿÿ ÿý

ÿÿ

C2

C3

ÿÿ

ÿÿ

C4

C5

ÿÿ

ÿÿ

C6

xyy z

xyy zFigure 6.7: A more optimized Cockcroft-Walton voltage multiplier.

6.1.4 Switched Capacitor Circuits

In the previous sections we have looked at ways of multiplying a AC voltage to produce a DC output. Itwould also be useful to be able to double a DC voltage directly. One way to do this is through circuitswhich use capacitors and switches. A simple example would be to charge two capacitors in parallel,

3See for example the article by I. C. Kobougias and E. C. Tatakis in the IEEE Transactions on Power Electronics, Vol.25, No. 9, page 2460 (2010).


and then switch them so that the output views the capacitors in series, thus doubling the voltage. Acommon method to achieve this doubling is through charge pumping where a capacitor is charged up,and then switched into a mode where it can transfer charge to a second capacitor. In that light, we willlook at the switched capacitor charge-pump voltage doubler as shown in Figure 6.8.

Vin

ÿ #Cp " ÿCo ÿ

ÿ

|||

ò òVo

Figure 6.8: A switched capacitor charge-pump voltage doubler.

The two switches can either both be to the left or both to the right, and while we show these as amechanical style switch in the diagram, in reality they are a pair of transistor switches whose switchingis controlled by an external clock. We can examine in detail the two possible states of the circuit, andshow these explicitly in Figure 6.9 The left-hand picture shows the circuit when both switches are to theleft, while the right-hand one shows both switches to the right. When both switches are to the left, the

Vin

Cp ÿ

ÿCo

ÿ ò òVo Vin

Cp ÿCo ÿ

ò òVo

Figure 6.9: A switched capacitor charge-pump voltage doubler showing the two circuit configurations de-pending on how the switches are set. The left-hand circuit shows the capacitor Cp being charged up, whilethe right-hand circuit shows the output capacitor, Co being charged. Note that Cp is shown as an electrolyticcapacitor to indicate which side is at a higher potential.

capacitor CP will charge up until it has the input voltage across it. We have shown it as an electrolyticso we can see which side (the upper) of CP is at higher potential. In this mode, we also see that theoutput is just taken across the capacitor Co. When the switches move to the right, we are in a statewhere Co is being charged by both the input voltage Vin and the charged up CP in series. This is similarto what we saw with the voltage doubler in Section 6.1.2 where the charged capacitor will behave like aDC voltage supply. This means that Co will charge up to a voltage of 2Vin. In this mode, we also takethe output across Co. After a sufficiently long time, we will have that Vo = 2Vin.

As noted above, the switches in these circuits are solid state based and controlled by a clock. This istypically accomplished by building an integrated circuit based device which has both the clock and theswitches in it. External capacitors are then connected to this circuit. There are a rather large numberof these available commercially. Here, we show how one of these is hooked up to form a voltage doublerin Figure 6.10. The pin out here is based on the LM2681 chip, but the same sort of external connectionsapply to all of these. In looking at the specification sheets for these devices, they typically can also beused to cut a voltage in half, or to invert a DC voltage. It is also possible to chain several of these


together to obtain even larger multiplication of voltages. The interested reader is invited to consult thespecification sheets for these devices4.

ý C1 ÿ ÿýC2

ÿ

ÿ ð

Vin

òVo

c+

c− g

g

VoV+

Figure 6.10: An integrated circuit voltage doubler with external capacitors and diode. The pin out shown isfor the LM2681 switched capacitor voltage convertor. The input V+ connects to the input voltage. The c+and c− inputs are for an electrolytic capacitor, C1, while the g inputs both must be grounded. The outputis taken from the V0 terminal.

4A very incomplete list of these include the LM2681, LM 2662 and LM2663 from Texas Instruments and the MAX1044,the MAX1682 and the MAX1683 from Maxim.




1. Consider the voltage clamper in Figure 6.1 and assume that nominal diode drop, Vd, is zero.Sketch the input voltage, vin(t) and the voltage across the diode, vout(t) over one period beforethe capacitor has started to charge. Sketch the voltage across the capacitor over the sametime period. Be sure to account for the orientation of the capacitor in your sketch. Hint:Look at Figure 6.2

2. Given the clamped voltage as in equation 6.7, sketch the voltage across the output capacitor,C2, in Figure 6.4 before the capacitor starts to charge up. Make your sketch for one period ofoscillation, T .


3. Given equation 6.10, estimate the number of stages n before the voltage drop is equal to thenominal voltage. Assume that n is large enough that you only need the leading term andexpress your answer in terms of vo, ZC and IL. You may also assume that the diode drop, Vdis zero.





3. A USB memory stick may be useful.






1. Eight 1N4004 diodes.

2. Eight 50V , 1µF electrolytic capacitors.





6. One 1MΩ resistor.

7. One 5.6MΩ resistor.


6.4 Procedure

6.4.1 Gotcha!






6.4.2 The Diode I-V Curve

In Figure 6.3 we schematically sketch the I–V curve of a diode. Here we would like to accuratelymeasure this curve over several orders of magnitude in current. When measuring current over such largeranges, one needs to be careful in trusting the current measuring ability of our multimeters. You mayhave noted in earlier labs that the current readings between different range settings on the meter yieldinconsistent results. To avoid this problem, we will build a simple circuit where we place a resistor ofknown value in series with our 1N4004 diode such that the diode is forward biased.

1. Set up a simple series circuit with a 10V DC input voltage and your diode in series with a resistor.Using your multimeter, measure the voltage across the resistor, VR, and across the diode, VD.

2. Select a reasonable sample of resistors going from 100Ω up to a few MΩ, and repeat yourmeasurement. Be sure to measure the actual resistance. Uses these data to produce an I–Vcurve for the diode.

3. You should be able to describe your I-V curve using the Shockley equation, 6.5. Estimate rea-sonable values for IS , m and VT and show that these do a reasonable job in describing yourdata.

6.4. PROCEDURE 83

Question 6.1 For what current, ID, will the diode voltage, Vd, be 0.65V?

Question 6.2 What do you expect for Vd if ID is only 1% of the value that gave os Vd = 0.65V?

6.4.3 The Voltage Clamper

In this section, we will be building and measuring the behavior of the voltage clamp sketched in Fig-ure 6.11. We will use our DS335 to output voltages with amplitudes on the order of a few volts and amid-range frequency such as f = 1 kHz.

vin(t) = v0 cos (ωt)

where v0 ≈ 1 − 5V . Initially, we will choose C = 1µF and take R = 47 kΩ to build the circuit inFigure 6.11.

/vin(t)

C

ÿÿ ÿ

R

ÿ

ò

òvout(t)ýFigure 6.11: A voltage-clamper circuit.


Question 6.3 With our choice of R and C, do we expect to be able to buffer the capacitor DCvoltage? How quickly will the capacitor discharge compared to the period of the input voltage?

1. Using an input voltage of 5V peak-to-peak, measure the output voltage across the resistor. Besure to note the average DC level of this voltage, Vo, and the amplitude of the AC component ofthe voltage, vr.

2. Repeat your measurements with several different resistance values and use this to estimate theoutput resistance of the clamper. Be sure to include a measurement with no resistor.

3. Using your data, estimate what Vd is for your data.

Question 6.4 Assuming that you are using a 47 kΩ resistor, what do you expect to happen in part1 if you use a much smaller capacitor, say 0.01µF?

6.4.4 The Voltage Doubler

The voltage-doubler circuit can be built by adding a second diode/capacitor stage to the voltage clampin Section 6.1.1 as shown in Figure 6.12. In this circuit, we will take both capacitors to be 1µF andthe diodes will be 1N4004s. We will choose various resistors and then examine the average DC level andthe AC ripple amplitude at the output.

1. Build the circuit shown in Figure 6.12. Using an input AC signal with a frequency of 1000Hz anda peak-to-peak amplitude of 5V , measure both the average voltage (DC level) and the amplitudeof the voltage ripple for an open circuit (no resistor). Note that the Mean measurement functionmeasures the average voltage, while the peak-to-peak measurement function can characterize theripple voltage.

6.4. PROCEDURE 85

/vin(t)

C

ÿÿ ÿC ÿ

ÿR ÿ ò òvout(t)ý

Figure 6.12: The voltage-doubler circuit.

2. Measure the average voltage and ripple voltage with several different values of R ranging from47 kΩ up to 5.6MΩ.

Question 6.5 For the 1 kHz signal that you used, what is the output impedance, | Zout | of yourvoltage doubler? How does this compare to the impedance of one of our capacitors?

3. Using your 220 kΩ resistor, measure the DC voltage, Vout, and ripple voltage for several inputfrequencies between 1 kHz and 100 kHz. Be sure to take sufficient points so that you can estimatethe frequency dependence of your results.

Question 6.6 Do you see the expected frequency response of the output voltage?

6.4.5 The Voltage Multiplier

We will now continue to add multiplication stages to our circuit in Figure 6.12 until we reach the three-stage multipler shown in Figure 6.13. As we did earlier, we will continue to use 1N4004 diodes and 1µF


capacitors. We are interested in characterizing the behavior of this circuit for an input signal

vin(t) = v0 cos (2πft) ,

where v0 is 5.0V and f is 1 kHz.

/vin(t)

C ÿÿ ÿ

ÿý

ÿÿ

C

C

ÿÿ

ÿÿ

C

C

ÿÿ

ÿÿ

C

ÿR ÿ

xyy z

xyy z ò òvout

Figure 6.13: The voltage multiplier.

1 Build the voltage-multiplier circuit as shown in Figure 6.13. As with the doubler circuit, use theassortment of resistors from 47, kΩ to 5.6MΩ to characterize the average voltage and the ripplevoltage for a 1 kHz input frequency.

2 Determine the output impedance of the multiplier.

3 Repeat your measurements using a 5 kHz and 10 kHz input frequency. Characterize the outputimpedance for both of these frequencies.

Question 6.7 If would like to be able to drive a 260 kΩ load with our multiplier and have theripple voltage smaller than 1mV , estimate the minium frequency we need to operate at?


Question 6.8 What would happen if we used a smaller capacitor such as 0.1µF?



1. Based on the voltage drop in your voltage doubler and the Cockcroft-Walton multiplier, there isa limit to the number of stages that one can reasonably use in a multiplier. Estimate what this isfrom your data?

2. Make the same estimate from the voltage drop formula in the lab introduction. What assumptionsdo you need to make for this?

Chapter 7

Bipolar Junction Transistors,Emitter Followers

Reference Reading: Chapter 5, Sections 5.1, 5.2 and 5.3.1.Time: Three lab periods will be devoted to this lab.Goals:

1. Understand basic transistor operation

2. Understand the need for a biasing network and the design criteria for AC circuits

3. Demonstrate power gain, high input resistance, low output resistance

4. Understand the implication of power gain without voltage gain

7.1 Introduction

Active circuits are ones which can yield “gain” in the sense of being able to yield greater power outputthan input. In most cases, more power can be delivered to a load by passing the signal through anamplifier than directly from a signal source. Obviously, the gained power has to come from somewhereand this is generally from a DC voltage supply (often called a D.C. power supply for this reason).

We begin with a simple “voltage follower” circuit that provides an output voltage that “follows” theinput voltage (i.e., is essentially equal to the input voltage). How can such a seemingly useless circuithave any function? Because it can be a power amplifier: because the follower’s output impedance(essentially a resistance) can be quite low compared to that of the signal source, the follower can supplymore power to a load than a high impedance source could.

In Lab 8, you will examine the common emitter amplifier circuit; this can have both voltage andpower gain.

For both labs 7 and 8, we use a simple model for npn transistor operation. To understand theunderlying principles requires an understanding of how electrons behave in crystals – the subject of acourse in solid state physics; in class, we will give a quick introduction.

1. The collector must be more positive than the emitter. This is clearly necessary in order for currentto flow from collector to emitter.

2. The base-emitter and base-collector junctions behave like diodes:

89

90 CHAPTER 7. BIPOLAR JUNCTION TRANSISTORS, EMITTER FOLLOWERS

IC

IE

IB

VC

VB

VE

VCE=VC-VE

VBE=VB-VE

C B E C B E

Bottom View

Side View

Figure 7.1: Shown is information about the npn 2N2222 transistor. The left-hand picture shows the circuitschematic for the transistor. Current flows into both the base and the collector and out the emitter. Thethree pins are biased to voltage VC , VB and VE respectively. The right-hand images show drawings of twodifferent packages for the transistor. The upper images are looking at the side of the transistor, while thelower images are looking at the bottom of the transistor.

(a) When the base-emitter junction is reverse biased, the transistor is turned off and no currentflows from collector to emitter. The base-emitter junction is like the handle of a valve – itcontrols the current flow through the collector-emitter circuit.

(b) When the base-emitter is forward biased and the base-collector is reverse biased, the transistoris in the “active” or “linear” operating range. A forward biased diode has a “diode drop” of0.6 to 0.7 Volts (0.65 V).

(c) When both junctions are forward biased, the transistor is “saturated” and, typically, VCE ≈0.1− 0.2 Volts.

3. Maximum values of IC and VCE cannot be exceeded without burning out the transistor.

4. If 1 - 3 are obeyed, then IC ≈ hFEIB = βIB . β (or hFE) is roughly constant in the active orlinear operating range. Typical values are in the range 50 - 250 and can vary substantially fromtransistor-to-transistor even for a given transistor type. A good circuit design is one that does notdepend critically on the exact value of β but only on the fact that β is a large number.

Figure 7.1 provides some information on the 2N2222 switching transistor that we will be using inthe lab. More information on transistor pin outs can be found in Appendix B.

Figure 7.1 illustrates the definitions of transistor voltages and currents. Note that it is always truethat

IE = IC + IB . (7.1)

In the active range,

IE = (β + 1)IB ≈ IC , (7.2)


the approximation holding for large β, and

VB ≈ VE + 0.65Volts. (7.3)

You will apply these equations many times – remember them!Also shown is a picture of the 2N2222 transistor as seen from the side with the leads. You should

remember that the metal transistor can is usually connected to the collector – be careful to not let wirestouch the can!

You can verify that a transistor is functional by checking the two diode junctions with an ohmmeter.With the positive (red) lead on the base of an npn transistor, you should see conduction to both emitterand collector; with the negative (black) lead on the base, you should not see conduction to either otherlead.

For the emitter follower, we will (in class) determined the input resistance of the follower circuit. IfRE is the equivalent resistance from the emitter to ground, then we have that

Rin = (β + 1)RE ,

or in the limit of large β, we have that

Rin ≈ β RE . (7.4)

Similarly, we found that for the output resistance

Rout =Rsβ + 1

,

Rout ≈1

βRS (7.5)

where Rs is the equivalent output resistance of the source that is driving the follower. Hence, a largeβ helps make the input resistance high. Thus, the circuit draws only a small amount of current andtherefore receives the maximum voltage signal from the source. Similarly, the output resistance is lowwhich implies that the output voltage is independent of the load. We can draw large currents by theload without affecting the output voltage. When you see such statements as these, you should thinkof (and even draw) Thevenin equivalent circuits; here, draw (i) the equivalent circuit of a source andthe input of the transistor circuit and (ii) the equivalent for the transistor circuit output and a load –justify the statements.




ÿ4.7 kΩ

ÿ ð12V

4.7 kΩ

ÿý

ÿ470 Ω ÿ

RL ÿ

Vo

Figure 7.2: A voltage divider being used to supply the base voltage for an emitter-follower circuit.

1. Draw the voltage divider part of the circuit shown in Figure 7.2. Under the divider circuit,sketch the Thevenin equivalent of the divider from the figure above. What are the numericalvalues for the Thevenin voltage and resistance, Vth and Rth?


2. Draw the emitter follower part of the circuit shown in Figure 7.2. Under the follower sketch,draw the equivalent circuit that you see when you look into the base of the transistor. As-suming that for your transistor, β ≈ 100, what do you expect the relevant resistance in yourequivalent circuit to be?

3. Now consider the entire circuit as shown in Figure 7.2 where the voltage divider is “driving”the follower circuit. What is the effect of the emitter follower on the output voltage of thedivider (give a numerical value for the voltage)?

4. Draw the Thevenin equivalent for the entire circuit as seen from the output of the transistor.You do not need to compute Vth and Rth, but EXPLAIN how you would measure them.







4. The Interplex Electronics 1200CA-1 power brick and bus connector.




8. The Global Specialities PB10 proto-board (see Appendix A for a description).


1. 10 Ω resistor.

2. 100 Ω resistor.

3. 4.7 kΩ resistor.

4. One 2N2222 npn switching transistor.


7.4 Procedure

First, you will demonstrate the impedance transformer property of the emitter follower using just DCvoltages. To take advantage of this same property, but applied to AC signals, requires some additionalcomplications that you will learn about in 7.4.3.

7.4.1 Gotcha!






6. Have you reversed the emitter and collector pins on your transistor?

7. Did you measure β of your transistor to make sure that it is ok?

8. If you are using the power busses on your proto-board, have you bridged the gap in the middle?

7.4. PROCEDURE 95

ÿ4.7 kΩ

ÿ ð12V

4.7 kΩ

ÿý

ÿ470 Ω ò

V0

ð RL ðò

Figure 7.3: DC Emitter Follower Circuit. This circuit is an impedance transformer in that the I-V char-acteristic of the output terminals () has a slope that corresponds to a smaller source resistance than doesthe I-V characteristic of the “Voltage Divider Source” by itself. Because the circuit delivers more power to asmall load, RL, than the “Voltage Divider Source” would by itself, the emitter follower can have significantpower gain.

7.4.2 DC Emitter Follower

Use an emitter follower circuit to make a good voltage source out of a lousy one. You should recallfrom previous work what constitutes a “good” voltage source. The circuit in Figure 7.3 shows a voltagedivider driving an emitter follower circuit. The large resistances (4.7 kΩ) in the divider mean that anyload driven by the divider would need to have a resistance much larger than 4.7 kΩ, making this “lousyvoltage source”.

We are going to combine this with the transistor “emitter follower” to make a voltage source whoseoutput terminals are indicated by the two open dots near V0 in Figure 7.3. You should think of everythingup to those dots as being the new and improved “voltage source” whose characteristics you want tomeasure.

1. First, in your notebook, draw the circuit with the input (the voltage divider) replaced by itsThevenin equivalent. Draw the transistor circuit attached to this equivalent. Next, draw the sameequivalent circuit of the voltage divider with the transistor circuit replaced by its equivalent asseen from the base; what is the value of the load resistance seen by the voltage divider?

2. On the same graph you will use for the emitter follower output, draw the expected I-V curve forthe divider circuit; i.e., for the Thevenin equivalent just drawn. Use axes that show the globalbehavior, going from zero to the maximum values of I and V.

3. Build the circuit shown in Fig. 7.3. You can use the on-board 12V power supply as the DC source.With multi-part circuits, it is always a good idea to build and test the circuit in sections. Followthis sequence:

(a) Build the voltage divider first. Test the output voltage and verify that it is as expected. Youmight want to put a load resistor across the output to make sure your work above is correct.

(b) Add the transistor and emitter resistor but keep RL =∞. Note that because the DC supplyis such a good voltage source (constant voltage regardless of current being supplied), you canthink of it as independently supplying 12 V to both parts of the circuit.

(c) What is the voltage divider output now? Is this as expected?

(d) Is V0 the expected value?


(e) If your measurements for any of the above are puzzling, check the DC supply voltage – isthis being shorted out? Is the power turned on? Is it exactly 12 V?

4. Measure and plot, on the same axes as above, the I-V curve for the emitter follower output (dothis by varying the load on your circuit in a way similar to that used in Lab 1). From this plot,determine the equivalent output resistance, Ro, of the circuit and compare to equation 7.5.

5. Determine the answers to the following questions:

Question 7.1 What is the power delivered to a load in the two cases (with and without theemitter follower) when RL = 500Ω?

Question 7.2 How sensitive is this circuit to the precise value of β?

Question 7.3 What would happen to the functioning of this circuit if we chose voltagedivider resistors of 100kΩ (perhaps to reduce power consumption)?

7.4. PROCEDURE 97

Question 7.4 What are the minimum and maximum input voltages this circuit can“follow”(given a fixed 12V supply at the collector)?

7.4.3 AC Emitter Follower

Before going further, you should understand how the circuit in Fig. 7.4 operates. What are the functionsof C1 and C2? What do R1 and R2 achieve? Once you understand the design principles of this circuit,follow the steps below to select appropriate components for an audio amplifier.

ÿ C1

ðvi

R1

ÿ ðVCC

R2

ÿ ý

ÿRE ÿ C2

ÿRL ÿ ò

vo

òFigure 7.4: The AC emitter follower circuit.

1. Follow the design procedure in the example at the end of section 5.3.1 of the textbook to determineappropriate values of components for the audio amplifier circuit. Here, we are using the sameVCC = 12 Volts but use IC = 10mA instead of 1mA. Be sure to record your calculations in yourlab notebook.

2. Test the functioning of your circuit at, say, 1 kHz to see how large an input voltage you can usewith a large load resistor (say, RL = 10 kΩ).

3. Measure the frequency response from just below your designed cut-off frequency up to the highestpossible frequencies. Do this using an input amplitude which is somewhat smaller than the max-imum possible (say 5V amplitude). Compare the results with RL = 1 kΩ and RL = 100Ω (justcheck a few relevant frequencies for these last tests, so you can map out the response in the regionin which it is changing).


4. From your frequency response, predict how this circuit would respond to triangle or square waveinputs. Try it for some appropriate period of the input wave (using a value of RL for which thecircuit works well), and see if you are right. Try 5 or 10 kHz waves, if the expected distortionisn’t clearly visible, try higher or lower frequencies. Include a sketch of the resulting waveforms(or capture and plot it) and appropriate discussions in your lab notebook.

5. Test a design using different quiescent current, IC . Try 1mA and make minimal changes in thecircuit.

Question 7.5 Do R1 and R2 need to be changed? Explain your answer.

Question 7.6 Test the circuit operation: can large AC signals still be passed? Does thelow-frequency cut-off change? Is the high-frequency behavior still the same?




1. You have set up the emitter-follower as shown in the circuit in Figure 7.5. You have carefullychosen your transistor such that β = 100 and have selected R1 = R2 = 10 kΩ and RE = 100 Ω.You then use a DC power supply to bias the circuit, VCC = 10V . (a) Based on your choice of R1

and R2, what voltage are you expecting to have at the emitter (VE)? (b) Based on your answer topart (a), what do you expect for the current IC and the power dissipated in the transistor itself?(c) You build the circuit as shown above, and then go and measure the voltage at the emitter, VE .Approximately what value will you measure?

ð

VCC

ÿRE ý

ÿR1

ÿR2 ý

òVE


2. In lab, we built an emitter follower as shown in the circuit in Figure 7.6. One good choice ofcomponents would be R1 = R2 = 2.2 kΩ and RE = 470 Ω, and we can bias the circuit withVCC = 12V . We are interested in using the follower for input signals in the f = 0.5 kHz tof = 50 kHz range. Answer the following questions assuming that the β of your transistor is 100.(a) What is a reasonable value to choose for the capacitor C? Justify your answer. (b) You wouldlike to use your follower circuit to drive a low-pass filter whose input impedance is | Zin |= 100Ω.Will your circuit be able to do this? Justify your answer. (c) You are told that the input voltage isvin(t) = 4.75V cos(6280s−1t). Sketch the expected output voltage, VE + vout(t) over one period.

ð

VCC

ÿRE ý

ÿR1

ÿR2 ý

C

ðvin ò

VE + vout


Chapter 8

Bipolar Junction Transistor:Inverting Amplifiers

Reference Reading: Chapter 5, Sections 5.3.2 and 5.3.3.Time: Three lab periods will be devoted to this lab.Goals:

1. Learn to set up a common emitter voltage amplifier

2. Learn the limits: relatively low input resistance, relatively high output resistance, frequency re-sponse.

3. Learn AC biasing tricks to get higher gain.

8.1 Introduction

The common emitter amplifier appears to be a subtle variation on the emitter follower studied in lab 6.The collector is attached to the supply through a resistor instead of directly and the output is taken fromthe collector terminal of the transistor instead of the emitter. The emitter may be connected directly tothe ground. (Hence the name, common emitter, since the input and output signals share the commonground at the emitter.) As discussed in the text, this gives a large gain but has poor linearity, an inputimpedance that is a function of input voltage, and is difficult to bias properly. We will use the slightlymodified inverting amplifier that includes a resistor RE between the emitter and ground as shown inFig. 8.1. We will find that the gain of the amplifier can be controlled with proper selection of RE .

In spite of the similarities, the behavior of this circuit is significantly different from the emitterfollower:

1. We can arrange for significant voltage gain.

2. The output signal (that is, the AC signal) is inverted relative to the input.

3. The output resistance is quite a lot larger than that of the emitter follower.

The gain, G is computed as follows:

1. The emitter voltage “follows” as before: VE = VB − 0.65V. Thus, vE = vB .

2. vE generates an AC current iE = vE/RE = vB/RE .

101

102 CHAPTER 8. BIPOLAR JUNCTION TRANSISTOR: INVERTING AMPLIFIERS

ÿ C1

ðvi

R1

ÿ ðVCC

R2

ÿý ð

RC ÿRE ÿ

òvo

òFigure 8.1: The inverting amplifier circuit.

3. Using iE ≈ iC , this AC current generates an output voltage vC = −iERC = −vB RC

RE. Thus,

G = −RCRE

. (8.1)

The minus sign indicates that when VB increases, VC decreases. This makes sense since VC =VCC − ICRC and IC increases when VB increases.

If we try to decrease RE toward zero to get higher gain, we find that the intrinsic emitter resistance,rE becomes important and limits the gain. rE accounts for the fact that our standard “diode drop” of0.65 Volts is only an approximation. The drop, VBE , is actually a function of the current through thediode junction as you saw in Lab 1. Based on the I-V characteristic of a diode, the text argues that

rE ≈ 25mV

IC

near room temperature. For IC = 10mA, rE =≈ 2.5Ω (this means that for a 1mA change in current,VBE changes by 2.5mV out of the roughly 0.65 Volt total drop). We should write

G = − RCRE + rE

. (8.2)

In deciding on component values, we need to change the base bias resistor values (relative to theemitter follower) in order to set the collector operating point (the collector voltage at zero AC input)near VCC/2; again, we do this so as to maximize the possible output voltage swing (which certainlycannot extend below zero volts or above VCC). Recall that for the follower, we biased so that the emittervoltage (which was then the output) satisfied this requirement. Now we require that

VC = VCC − ICRC ≈1

2VCC (8.3)

or

IC =1

2

VCCRC

≈ IE =VERE

=|G|RC

VE . (8.4)

This means that we want

VE =1

2

VCC|G|

. (8.5)

And now we know that

VB = VE + 0.65Volts =1

2

VCC|G|

+ 0.65Volts. (8.6)


This is a lower base voltage than we used for the follower which means that the base or input voltagewon’t be able to swing as far as in the follower case (without turning off the transistor). This is okay:we are building a voltage amplifier because we only have a small signal to begin with!

The output resistance of this circuit (i.e., the Thevenin equivalent resistance at the output) is justRC . You should always remember that the collector behaves like a current source and has large resistance(the IC-VCE characteristic curves are nearly horizontal; the current of the current source is controlledby the base-emitter voltage – see section 5.3.3 ). To get high gain, we want large RC , but we pay byhaving a large output impedance.

In selecting R1 and R2, keep in mind that we want the base bias voltage to be fairly independentof the β of the transistor. To do this, we want the base bias circuit to yield the same voltage whenattached to the transistor as it does all by itself. In other words (#1), we want to lose only a smallfraction of the divider’s current into the base. In other words (#2), the Thevenin equivalent resistanceof the bias circuit should be small compared to the input resistance of the base (this is the same logicwe used for the follower). The base input resistance is as for the follower:

Rin = (β + 1) · (RE + rE) .



The work in this section must be completed and signed off by an instructor before you start working onthe lab. Do this work in your lab book. After reading the Section 8.1 of your lab write-up, we want todetermine some relevant component parameters. Assume that VCC = 12 V and that the gain, G = −10.

1. What voltage should we set VB at?

2. Based on this voltage, what ratio of R1:R2 is needed to achieve this?

3. Choose the output resistance, RC to be 4.7 kΩ. What value of RE should we choose. Showthat the intrinsic transistor resistance, re, does not significantly affect the gain of your circuit.

4. Based on RE , select reasonable values of components for R1 and R2.








5. The Interplex Electronics 1200CA-1 power brick and bus connector.





1. 100 Ω resistor.

2. 1 kΩ resistor.

3. 10 kΩ resistor.

4. One 2N2222 npn switching transistor. The pin out for this transistor is reproduced in Figure 8.2.


IC

IE

IB

VC

VB

VE

VCE=VC-VE

VBE=VB-VE

C B E C B E

Bottom View

Side View

Figure 8.2: The npn transistor schematic symbol, notation, and lead configuration for the 2N2222 transistor.


8.4 Procedure

8.4.1 Gotcha!









8.4.2 Inverting Amplifier

Build a common emitter amplifier with a gain of G = −10 and an output resistance of RC = 4.7kΩ.Use a base bias circuit with an equivalent resistance about 50 times smaller than the input resistanceseen at the base. Use VCC = 12V. As indicated below, build the circuit in a modular sequence andcheck each part before attaching additional pieces. As a reminder, Figure 8.2 shows the pin out for the2N2222 transistor.

1. Measure the output voltage of your biasing voltage divider without the transistor attached. Afterattaching to the transistor circuit, measure the DC voltage at the transistor’s base and confirmthat it is within expectations.

2. Check VC . Is it what you planned (or within the expected range)?

3. Choose an input coupling capacitor large enough to generate a roll-off frequency (fRC) of ≤ 20Hz.

8.4. PROCEDURE 107

Question 8.1 What is the relevant resistance that determines this roll-off? Draw the rele-vant equivalent circuit and indicate element values.

4. For a 0.1V peak-to-peak input voltage, vin(t), at a moderate frequency (f ≈ 1 kHz), sketch (orcapture on your scope) the voltages at the base, emitter and collector of the transistor: VB +vb(t),VE + ve(t), and VC + vc(t).

5. For a 0.1V peak-to-peak input, measure the frequency dependence of the gain and plot yourmeasurements on a Bode plot. Determine the −3dB points (provided you have the frequencyrange available). In measuring the output voltage, either use AC coupling on your scope or choosean appropriate output blocking capacitor.

Question 8.2 Do you think the high frequency roll-off is due to the scope input impedanceor is it intrinsic to the transistor circuit (this could include the possibility of stray capacitancein the circuit)? Draw the equivalent circuit for this measurement.

6. Pick a mid-range frequency and determine the input voltage dependence of the gain i.e., is Gdependent on |vin|?. It may help here to view the output alternately using DC and AC couplingon the scope. Use AC to accurately see the signal amplitude and use DC to see the actual collectorvoltage relative to ground and the supply voltage.


Question 8.3 What is the maximum input voltage that yields an undistorted output signal?What is it that limits the output?

7. Measure the output resistance of this circuit. Use a mid-range frequency and a mid-range am-plitude. To do this, you need to measure two points on an I − V curve for the output of thetransistor. However, we are going to do this using an AC voltage. One point is the “open circuit”voltage, while to get a second point on the I − V curve, we want to attach a 4.7 kΩ resistor fromthe output of the circuit to ground. We then measure the voltage across this known resistor.

Question 8.4 Sketch the Thevenin equivalent as seen at the output of the transistor circuit.If we just attached this resistor, what will happen to the DC voltage, VC?

To avoid changing the gain and DC operating point of the circuit, we need to use a blockingcapacitor between the output of the circuit and the resistor to ground. This is like what you didfor the AC emitter follower. Chooses a sufficiently large capacitor such that it’s impedance is smallcompared to 4.7 kΩ resistor at the frequency you are using.

8.4. PROCEDURE 109

Question 8.5 Do you see the expected result? In other words, is the output impedance whatyou expect it to be?

8.4.3 Inverting Amplifier With By-Pass Capacitor

Now try boosting the gain by placing a “by-pass” capacitor across RE as shown in Fig. 8.3 (see discussionof Fig. 5.29 in the textbook). As in the previous measurement, this capacitor will not affect the DCoperation of the circuit. However, at signal frequencies, the capacitor should effectively short out theemitter resistor RE and the gain becomes G = −RC

re. Measure the frequency response for this circuit

and compare to the lower gain circuit studied above. Make sure that you try to measure both thelow-frequency and the high-frequency 3 dB points.

ÿ C1

ðvi

R1

ÿ ðVCC

R2

ÿý ð

RC ÿÿRE ÿ

òvo

ò CE ÿ

Figure 8.3: The inverting amplifier with a bypass capacitor.

There are several points you need to be aware of before trying this circuit. Readthrough all four of these points and understand them before starting to the measurementsin this section.

1. You have to be careful in determining what CE you need to achieve the desired time constant. Theemitter by-pass capacitor sees RE in parallel with [re in series with the input and biasing circuits].At signal frequencies, this amounts to [re + Rs/β] ≈ re, Rs being the signal source resistancewhich is 50Ω in our case. Recall that re ≈ 25/IC(mA). You will find that you need quite a largecapacitor for the circuit to operate down to 20Hz.

2. The gain may be quite high. If G ≈ −200, then a 0.1V input (the minimum the DS335 willgenerate) would generate a 20V output. With a 12 Volt supply, this won’t work. You will need to


attenuate the input signal by building an input voltage divider. Put the output of the DS335 intoour divider and use the output of this new divider to drive your circuit. To build the divider, useRa = 100Ω resistor in series with Rb = 10Ω resistor in order to maintain a low source resistance.This is shown in Figure 8.4.

ÿ C1

ÿRa

ðvi

Rb ÿ

R1

ÿ ðVCC

R2 ÿý ð

RC ÿÿRE ÿ ò

vo

ò CE ÿ

Figure 8.4: The divided input signal driving your bypassed amplifier.

3. When you have such a small input signal, you may find that the input signal is extremely noisy.If you study this carefully, you are likely to find that it is a 60Hz signal that is coming in throughyour 12V DC power supply. If this is a case, use the large DC supply that was used in lab 1 toprovide the DC voltage. You will find that this is probably significantly less noisy.

4. Be sure to observe the proper polarity for the required electrolytic capacitor.

Note: you can have better control of the AC gain by using the circuit shown in Figure 8.5. Thebypass resistor, Rb is some fraction of RE . In this configuration, only some of the emitter resistance isby-passed.

ÿ C1

ðvi

R1

ÿ ðVCC

R2

ÿý ð

RC ÿÿRE ÿ

òvo

ò

Rb CE ÿFigure 8.5: The inverting amplifier with a bypass capacitor and a bypass resistor.



1. You will be using a simple voltage divider to bias the base of an npn transistor as shown in thecircuit in Figure 8.6. Power is to be supplied using a supply with VCC = 10V and you are toldthat R1 = 8kΩ and R2 = 2kΩ. The emitter resistor is chosen to be be RE = 675 Ω and the


collector resistor is taken to be RC = 3.375 kΩ. Answer the following questions based on thiscircuit. (a) Ignoring any loading down of the base that might occur due to RE , what is the baseat the emitter of the resistor? (b) Under the same assumptions as in (1), what is the voltage atthe collector, VC? (c) What gain, G, would you expect for this circuit?

ÿRC

ðVCC

RE ý

ÿR1

ÿR2 ý

òVC


2. You have built the following inverter amplifier circuit as shown in Figure 8.7. Power is to besupplied using a supply with VCC = 10V and you are told that the β of the transistor is 100.You also have R1 = 8kΩ and R2 = 2kΩ. The emitter resistor is chosen to be be RE = 675 Ωand the collector resistor is taken to be RC = 3.375 kΩ. Answer the following questions based onthis circuit. (a) Assuming that we want the input to pass 50Hz signals, what would be a goodchoice for the value of the input capacitor C1? (b) What is the maximum amplitude input signal,vin(t) that can be amplified without distortion by this circuit? (c) You now use this circuit todrive a second circuit whose input impedance is RL as shown in the right-hand circuit. Sketchthe Thevenin equivalent circuit for the transistor driving the load. What are the values of Rthand the DC Vth in your diagram? (d) Using your DC equivalents from part (c) and the fact thatRL = 3525 Ω, what is the current delivered to the load?

ÿRC

ðVCC

RE ý

ÿR1

ÿR2 ý

C1

ðvin

òvout ÿ

RC

ðVCC

RE ý

ÿR1

ÿR2 ý

C

ðvin

ÿ òvoutRL ý


Chapter 9

Introduction to OperationalAmplifiers

Reference Reading: Chapter 6, Sections 6.1, 6.2, 6.3 and 6.4.Time: Two and one half lab periods will be devoted to this lab.Goals:

1. Understand the use of negative feedback to control amplification

2. Understand the concept of slew rate

(a) Be able to define slew rate

(b) Be able to measure slew rate

(c) Understand how finite slew rate puts limitations on the use of operational amplifiers

3. Be able to design and construct the following op-amp circuits:

(a) Voltage follower

(b) Inverting amplifier

4. Observe the effect of an op-amp’s finite gain

9.1 Introduction

In Chapter 6 of our text, we characterized the behavior of op-amps using two “golden rules”. Theserules were based on a number of assumptions which we characterize as ideal op-amp behavior. Notsurprisingly, these are only approximations to the actual behavior. In this lab, we will explore the limitsof real op-amp behavior.

9.1.1 The Open-loop Gain of an Op-amp

In Section 6.3 of the textbook, we noted that the open-loop gain, A0, of an op-amp relates the outputvoltage to the difference of the non-inverted and inverted inputs as

vo = A0 (v+ − v−) . (9.1)

113

114 CHAPTER 9. INTRODUCTION TO OPERATIONAL AMPLIFIERS

We also noted that A0 tends to be very large, so equation 9.1 needs to be modified to include theso-called “rails” given as VCC and VEE which are used to supply external power to the op-amp. Thisadds the following qualifications to our output voltage.

vo = VEE if A0 (v+ − v−) < VEE

vo = VCC if A0 (v+ − v−) > VCC

However, we also saw in Section 6.4 of the textbook that the open-loop gain is actually frequencydependent and falls off at high frequency. Thus, we have A(f) in our equation which yields that

vo = A(f) (v+ − v−) . (9.2)

This means that if the frequency is high enough, we can directly measure A(f) for sufficiently smallsignals. These small-signal measurements can the be used to determine the high-frequency open-loopgain, A(f), of an op-amp (i.e., the differential gain). However, there is some analysis necessary to seehow we can accomplish this. As we walk through this here, it is important that you understand all thesteps involved.

þ ðvin ÿ ò

vo

Figure 9.1: A simple op-amp voltage follower circuit.

The output voltage of our op-amp is given by equation 9.2. The relation between the op-amp’s openloop gain A(f) and the actual gain of the circuit G(f) depends on the negative feedback loop in thecircuit. We will look at this in the case of a simple voltage-follower circuit as shown in Figure 9.1. Inthis circuit, the input signal vin is connected to the non-inverting input (v+) of the op-amp. The outputsignal, vo, is fed back directly into inverting input of the op-amp, v−. Thus equation 9.2 can be writtenas

vo = A(f) (vin − vo) . (9.3)

From this, we can write that the gain of our circuit is given as

G(f) =vovin

.

Combining this with our earlier expression we have that the frequency-dependent gain is given as

G(f) =A(f)

A(f) + 1. (9.4)

Since we experimentally measure the gain, G(f), it is convenient to invert this equation to expressthe open-loop gain, A(f) in terms of the circuit gain. This gives us that

A(f) =G(f)

1−G(f). (9.5)

Now, we need to keep in mind that both G(f) and A(f) are complex. To determine | A(f) |, we willwrite G in terms of its magnitude | G(f) |, and phase φ(f)

G(f) = | G(f) | ejφ(f) . (9.6)


From this, we can write that

A(f)A∗(f) =

(| G | ejφ

) (| G | e−jφ

)(1− | G | cosφ− j | G | sinφ) (1− | G | cosφ+ j | G | sinφ)

.

This can be simplified to yield that

| A(f) |2 =| G |2

1+ | G |2 cos2 φ+ | G |2 sin2 φ− 2 | G | cosφ

and from this, we find that the open-loop gain is given by

| A(f) | =G√

1 +G2 − 2G cosφ. (9.7)

9.1.2 The Gain of an Op-amp Amplifier

In the previous section, we used an emitter-follower circuit to investigate the open-loop gain of an op-amp. A slight variation on this is shown in Figure 9.2 where we ground the non-inverting input, andthen connect the input signal to the inverting input via an input resistor, Ri. The output signal is thenfed back into the inverting input via a feed-back resistor, Rf . Using the simple op-amp rules, we findthat the gain of this circuit is given by

G = −RfRi

. (9.8)

ÿÿ Rin

ðvin ÿ ò

vo

Rf

ýFigure 9.2: The inverting voltage amplifier circuit.

Because of the limits in op-amp behavior, the simple analysis that yielded the above gain will needto be modified in a real-world measurement of the gain of the inverter circuit. To understand what youwould see in measurements of the gain, we need to go beyond the zeroth order analysis for op-amps. Inthe calculations leading to equation 9.8, we assumed that the gain of our op-amp (A) was infinite, orvery large. This led to the above gain for our circuit which we will refer to as G∞, so we have that

G∞ =RfRin

. (9.9)

We now admit that the op-amp’s gain is not infinite, but we retain the approximation that the inputresistance is still very high. Thus, we can approximate the op-amp behavior by saying that no currentcan flow into either input of the op-amp.

From Figure 9.2, we have that v+ = 0 as it is connected to ground. Now in this approximation, wewill not apply our op-amp rule that v− = v+, but rather note that there is some small, non-zero voltage,


v−, at the inverting input. The output voltage, vo, is then given as the open-loop gain, A, times thedifference in the input voltages

vo = A(ω) (v+ − v−) . (9.10)

Because v+ is zero, we have that

vo = −A(ω) v− . (9.11)

This can be solved for the voltage at the inverting input to give us that

v− = − voA(ω)

(9.12)

where, A(ω) is the complex open-loop differential gain of the op-amp.We can also analyze the currents in the circuit. From the input, we have that

iin =vin − v−Rin

, (9.13)

and since no current flows into the op-amp, all this current must go through the feed-back resistor tothe output

if = iin . (9.14)

The feed back current can be related to the potential difference across the feed-back resistor, and canbe written as

if =v− − voRf

. (9.15)

This is where we continue to assume that the input impedance is very large (≈ ∞). We can nowsubstitute for our unknown v−, and the collect all the terms that include vo. Doing so, we find

vin = −vo(RinRf

+1

A(ω)+

1

A(ω)

RinRf

). (9.16)

We now note that the actual gain is defined as

G(ω) =vovin

(9.17)

and recalling our definition of G∞ from equation 9.9, we find that

G(ω) = −G∞(

A(ω)

A(ω) +G∞ + 1

). (9.18)

As long as |A| >> |G∞|, then we have that G = −G∞, as we found from our simple calculation.However, as |A| becomes less than |G∞|, the gain, G becomes limited by the open-loop gain. We get

G(ω) =A(ω)

1 + 1/G∞(9.19)

which in our limit is

G(ω) ≈ A(ω) . (9.20)

This is almost independent of the intended G∞ when this number is large. This is the result you shouldobserve at high frequency. What you have measured is |G(ω)| which should become equal to |A(ω)| athigh frequency. You should see that each circuit becomes limited by A(ω) at a different frequency. Theproduct of the infinite gain and the −3 dB frequency is known as the gain-bandwidth product.


ÿÿ Rin

ðvin ÿ ò

vo

Rf

ýFigure 9.3: The inverting amplifier circuit.



1. Write down the two Golden Rules of op-Amp operation.

2. Look at Figure 9.3. What must the voltage at the negative input of the op-amp be? What isthe voltage drop across Rin ? What is the voltage drop across Rf?











8. The PRO-LAB power brick and bus connector (part of the PRO-PS-LAB kit).


1. 1 kΩ resistor.

2. 10 kΩ resistor.

3. One 411 OpAmp

4. One 741 OpAmp


9.4 Procedure

9.4.1 Gotcha!







7. Have you supplied power to your op-amp (VCC and VEE)?


9.4. PROCEDURE 119

9.4.2 The 741 and 411 Op-amps

For reference, the pin configuration for the 741 and the 411 op-amps is shown below. You will use theproto-board power supply to power the op-amp, we will have VCC = +12V and VEE = −12V . Youshould compare your results to the specifications for the op-amps available in your textbook.

1

2

3

4 5

6

7

8

Offset

Offset

VEE

VCC

vout

v_

v+

No Connection

8

7

6

5

43

21

Figure 9.4: The pin connections for the 741 and the 411 op-amp.

9.4.3 Voltage Follower

Use a 741 op amp to build a voltage follower as in Fig. 9.5. Note that, as is conventional, the power pinconnections, +VCC and −VEE , are not indicated on the diagram (but you need to include them) andwe use no connection to the offset null pins.

þ ðvin ÿ òvo

Figure 9.5: The voltage follower circuit.

Slew Rate: Start by investigating one of the serious limitations of many op-amps: the slew rate. Theslew rate is the maximum rate at which the output voltage can change. (Typical units would be voltsper microsecond.) The effect of an op-amp’s slew rate limitation is illustrated for two output waveformsin Fig. 9.6.

1. Measure the slew rate of the 741 by using a square wave input and observing the output of thefollower. At an input amplitude of, say, Vpp = 5 V, the output square wave will not changeabruptly, but will change to the new value by a straight line with finite slope. The slope of theline gives the slew rate. You will have to adjust the DS335 square wave period (and scope timescale) to find where you can observe this phenomenon.


(a)slope = slew rate

output ifnot slew-ratelimited

(b)

Slope limited by op-ampmaximum slew rate

slope = slew rate

Figure 9.6: Slew rate limitations illustrated for square wave and sinusoidal wave inputs to an op amp.

Question 9.1 Are the slew rates on the rising and falling edge of the square wave the same?

2. To understand the connection between slew rate and frequency response, calculate the maximumrate of change of a sinusoidal voltage, v(t) = V cosωt. Use this result to find the relation betweenamplitude and frequency for which this maximum rate of change equals the 741’s slew rate.

9.4. PROCEDURE 121

Question 9.2 What is the maximum frequency (in Hz) you can use without encounteringslew rate distortion if the signal is 5V peak-to-peak? If it is 1V ? If it is 0.1V ?

3. Make the same measurements for the 411 op-amp and compare to the 741.

Gain: It is difficult to measure the open loop gain of even the 741 op-amp because it is so large.However, at high frequencies, the open-loop gain rolls off and becomes measurable.

1. Compare the input and output voltages a follower built using the 741 op-amp over the entirefrequency range of the DS335. Use an input of Vpp = 0.1V . Make a Bode plot of the gain, |G(f)|,and a plot of the phase shift, φ(f), between input and output signals.

Question 9.3 Why might we want to use a small input voltage for this measurement?

2. Observe the effect of larger input voltages. You should see distortion in the output at highfrequencies when the input signal exceeds the slew rate.

3. Repeat the previous measurements using the 411 op-amp.

From the above small-signal measurements, you can determine the high-frequency open-loop gain,A(f) of the 741 (i.e., the differential gain), but some analysis is required. Refer to Section 9.1.1 fordetails of this analysis. For both the 741 and the 411 op-amps, make a Bode plot of A(f) in the regionwhere you can measure it from (9.5) or (9.7), when G ≈ 1 and φ ≈ 0, A is large and difficult to measurequantitatively) and determine the slope of the straight line that best fits the high frequency region ofthe results. Find the frequency, fT at which the magnitude of the open loop gain A(f) is unity.


Follower Input and Output Impedances: It is also difficult to measure either the input or outputimpedances of this circuit. Use the 411 op-amp for the following. You do not need to carry out thesemeasurements using the 741.

1. To show that the output impedance is small, observe the gain at f = 1 kHz with an output loadof 10 Ω. Note that the maximum output current of the 411 is about 20mA, so limit the outputvoltage to less than 200mV .

Question 9.4 Can you calculate the output impedance from this measurement? Is it largeor small?

2. To demonstrate the large input impedance, insert an 8.2MΩ resistance in series with the inputand compare the gain at f = 1 kHz to that measured with a direct input from the DS335.

Question 9.5 What does this say about the input impedance of the follower?

9.4.4 The Inverting Amplifier

Here, you will construct and test two inverting amplifier circuits, one with gain, G = −10 and onewith G = −100. The tests include determination of the DC gain (for the G = −10 case only) and acomparison of the frequency responses of the two circuits (these will also be compared to that of thevoltage follower measured previously). You will use a fixed input resistance of 1 kΩ and the only the741 op-amp.

The zeroth-order analysis of the circuit shown in Fig. 9.7 goes as follows:

9.4. PROCEDURE 123

ÿÿ Rin

ðvin ÿ ò

vo

Rf

ýFigure 9.7: The inverting voltage amplifier circuit.

1. The op-amp gain is infinite, its input resistance is infinite. Then, the feedback resistance mustkeep the inverting input at ground. Thus, iin = vin/Rin = if = −vo/Rf . The minus sign indicatesthat vo must be below ground for positive vin in order for the current to flow from ground (v−)to vo.

2. The above equations can be solved for the gain to yield that

G =vovin

(9.21)

G = − RfRin

. (9.22)

3. Of course, you want to use an input resistor which is larger than your source resistance.

4. Within the limitations of the op-amp to supply current and voltage, the output resistance is verylow as before.

Design and build the G = −10 amplifier:

1. Measure the DC output voltage as you vary a DC input voltage. Vary the input so as to makethe output cover the full range of ±12V. The slope of this plot yields the DC gain.

Question 9.6 Does your plot pass through the origin? Does the output reach the supplyvoltages?


2. Measure and make a Bode plot of the frequency response of your amplifier (you only need tomeasure the amplitude response, not the phase shift). Keep in mind, and avoid, the slew ratelimitation of the 741 op amp. Plot 20 logG(ω) on scales which will allow you to add the G = −100measurements you will do next.

Build the G = −100 amplifier:

1. Measure the frequency (amplitude) response of your amplifier. Add these data to the plot youbegan above.

Your measurements are likely to show that the gain does not follow this ideal behavior, but ratherwhat is discussed in Section 9.1.2. Quantitatively compare your measurements with the expectations.

Question 9.7 What is the gain-bandwidth product for each of your circuits from above?

2. Make a single Bode plot that contains the results for both your ×10 and ×100 circuits and theopen-loop gain that you measured.

Question 9.8 Discuss what you observe on this Bode plot. Does what you observe make sensein terms of the previous discussion?




1. You have set up a simple follower circuit to measure the behavior of an op-amp in the lab. (a)Sketch a follower circuit that you can build to study the behavior of your op-amp. (b) You use asquare wave as an input to your follower circuit and measure the output voltage. Figure 9.8 showsthe input signal coming in at 5V , and then dropping very rapidly to 0V at a time of 0.6µs. Themeasured output voltage is then shown as the dashed line. What is the slew rate of your op-amp?(c) You now use a sinusoidal input voltage vin which yields the sinusoidal output voltage vout asshown in the figure. Based on this data collected at a frequency of f = 500 kHz, what is theopen-loop gain, A(f) for your op-amp?

Time [µs]

Voltage [V]

vin

vout

0

5

0 1 2 3Time [µs]

Voltage [V]

vin vout

0

1 2 3

1

Figure 9.8: Data to measure slew rates (left) and the open-loop gain (right) in problem 1.

2. You are given an op-amp with fT = 1M Hz and told that the open-loop gain follows the standard20 dB/decade fall off. You use this op-amp to build a “times one hundred” inverting amplifier.(a) Sketch the circuit to carry out this amplification show the values of any external componentsthat you will use. (b) What is the input, Zin, and output, Zout, impedance of your circuit? (c)At what frequency will the gain of your amplifier circuit hit the open-loop gain of the op-amp?

Chapter 10

Operational Amplifiers withReactive Elements

Reference Reading: Chapter 6, Sections 6.5 and 6.6.Time: Two and one half lab periods will be devoted to this lab.Goals:

1. Be able to design and construct the following op-amp circuits:

(a) Integrator

(b) Differentiator

(c) Logarithmic amplifier

10.1 Introduction

All the circuits here are based on the inverting amplifier configuration of the last lab. However, we findhere that we can make circuits that perform mathematical functions (integrators and differentiators)that are far superior to the passive circuits built in lab 4. To obtain the best functionality, we use the411 op-amp.

In Figure 10.1 we show a generalized inverting amplifier circuit, where impedances Zin and Zf replacethe resistances Rin and Rf that we studied before. Through the same arguments as earlier, we havethat the gain of this circuit is just

G = − ZfZin

. (10.1)

In the following, we specify the two impedances as a resistor and a capacitor and study the resultingcircuit behavior.

10.1.1 The Integrator

We will first consider the simple integrating circuit shown in Figure 10.2. For this circuit, the invertinginput, v−, is a virtual ground because the op-amp golden rules tell us v− = v+. The second goldenrule (no current into the inputs) tells us that the current through Rin also goes through Cf . Thusi = dQC/dt = vin/Rin. Since Q = −Cf vo, we get

127

128 CHAPTER 10. OPERATIONAL AMPLIFIERS WITH REACTIVE ELEMENTS

ÿòvoÿ

Zf

ÿZin

ðvin

ýFigure 10.1: Idealized circuit for the generalized inverting amplifier.

−Cfdvodt

=vinRin

(10.2)

or

vo(t) = − 1

RinCf

∫ t

0

vindt (10.3)

This time domain treatment shows that the output is 1/(RinCf ) times the integral of the inputvoltage. It is also instructive to consider the behavior in the frequency domain. First note that atime-dependent signal can be written as the sum of sinusoidal signals

v(t) = Re

(∑N

VNejωN t

). (10.4)

The integral of the signal has the form∫v(t)dt = Re

(∑N

(jωN )−1VNejωN t

). (10.5)

Thus, to form the integral of a general waveform, we need a magnitude response that scales as 1/ω andthat has a 90 phase shift over the relevant frequency range. Since the gain of the generalized invertingamplifier (shown in Fig. 10.1) is

G = −Zf/Zin, (10.6)

ÿòvoÿ

Cf

ÿRin

ðvin

ýFigure 10.2: The idealized circuits for the integrator circuit.


the gain of the circuit shown in Fig. 10.2 is just −(jωRinCf)−1, so we see that each term is weighted by

the (jωN )−1 factor required in (10.5) to give the Fourier components of the integral. This again showsthat the output is proportional to the integral of the input with the same −1/(RinCf ) proportionalityfactor as above.

10.1.2 The Differentiator

The gain of the circuit shown in Figure 10.3 is computed as before from the generalized invertingamplifier.

G(ω) = −Zf/Zin = −jωRfCin (10.7)

Using (10.4),

dv

dt= Re

(∑N

(jωN ) VNejωN t

), (10.8)

so to take the derivative, we need to multiply each Fourier coefficient by its frequency, ω, and introducea 90 phase shift. The factor of jω in (10.7) shows that the circuit does exactly that.

Thus the circuit in Fig. 10.3 is a differentiator. You may wish to prove to yourself (or see your classnotes) that a time-domain treatment of the circuit gives the same results.

ÿòvoÿ

Rf

ÿ

Cin

ðvin

ýFigure 10.3: The Idealized circuit for the differentiator circuit.

Complications. In practice, both these idealized circuits suffer from a similar problem. For theintegrator, we must realize that the input signal is likely to have a small DC offset. Even a very smallDC current will charge up the capacitor and cause the op-amp to reach its maximum output voltagewithin a short time period. For a frequency domain treatment of this problem, remember the gain of theintegrator is (jωRC)−1. Thus any non-zero DC input (which corresponds to ω = 0) will have infinitegain for an idealized op-amp. In reality, this means the op-amp output will reach its maximum voltagevery quickly. A practical op-amp integrator circuit must be modified to keep the gain finite at lowfrequencies.

Similarly, the idealized differentiator has a gain of jωRC that becomes large at high frequencies.This is both very difficult to achieve and makes the circuit subject to high frequency noise. A practicalcircuit will cut off the divergence of the gain at large ω so that the output is not dominated by highfrequency noise. The op-amp open-loop gain, A(ω), will eventually reduce the gain at high frequencies.This implies that there is a peak in the gain somewhat like that in a resonant circuit. The circuitsyou build in the following sections will demonstrate, at least to some extent, how to cope with theseproblems.


10.1.3 The Logarithmic Amplifier

The circuit shown in Fig. 10.4 can be used to make a crude logarithmic amplifier. Such a circuit isa non-linear circuit which means that a sinusoidal input signal will not generate a sinusoidal outputsignal. Because of this, we cannot carry out a frequency-domain analysis, and instead are restricted tostudying the circuit in the time domain only.

To understand why the output behaves as the log of the input, remember that the diode’s I-V curvecan be approximated as

I = IS(eV/VT − 1)

where the thermal voltage, VT , is given as

VT =kBT

e

and is approximately 25mV at room temperature. The saturation current, IS , is the small reversecurrent that flows when a diode is reverse biased. In fact, the above expression is not quite right. Thecorrect expression was first obtained by Shockley and includes an “emission coefficient” m which variesin value between 1 and 2. The Shockley expression is then given as

I = IS(eV/mVT − 1) . (10.9)

For a forward-biased diode, we generally have that V > VT , so the exponential term is large in compar-ison to 1 and we can write (to high accuracy) that

I = IS eV/mVT . (10.10)

We can solve equation 10.10 for the voltage drop across the diode as a function of the current throughthe diode, and then applying our op-amp rules, we can obtain an expression that relates the input andoutput voltages.

vout = −mVT ln

(vin

Rin IS

)(10.11)

Assuming that we know VT , we can extract both m and IS from a measurement of this circuit.

ÿ òvo ÿ

Ri

ðvi ÿ ý

Figure 10.4: A logarithmic amplifier circuit utilizing a diode for feedback.




1. Derive equation 10.11 from equation 10.10 and you basic rules of op-amp performance.












1. 1 kΩ resistor.

2. One 411 OpAmp

3. One 741 OpAmp

4. One 1N4004 diode.



10.4 Procedures

10.4.1 Gotcha!









10.4.2 The 741 and 411 Op-amp Pinouts

For reference, the pin configuration for the 741 and the 411 op-amps is shown in Figure 10.5.

1

2

3

4 5

6

7

8

Offset

Offset

VEE

VCC

vout

v_

v+

No Connection

8

7

6

5

43

21


10.4.3 Integrator

As discussed above, in the frequency domain, integration amounts to division by jω. We do not wantto integrate any constant or DC part of the input signal (or any output offset in the op-amp), so we seta maximum gain or “cut-off” to the (jω)−1 dependence. This is done by introducing the resistor Rf inparallel with the feedback capacitor Cf as shown in Fig. 10.6. For ωRfCf 1 the feedback impedanceis (jωCf )−1 so the circuit behaves as an integrator. For ωRfCf 1 the feedback impedance goes toRf , so the gain approaches Rf/Ri instead of diverging.

10.4. PROCEDURES 133

ÿ òvo ÿ

ÿ Rf

ÿ

Rin

ðvi

Cf

ÿ ý

Figure 10.6: A practical integrator circuit including feedback resistor Rf to introduce a low frequency cutoff.

1. Choose Rf . Use an input resistance Rin = 1kΩ. (Smaller values would reduce the input impedanceand larger values would make the following steps more difficult.)

Once Rin is fixed, the DC gain is determined by the value of Rf . If the gain is to decrease withincreasing frequency, it is best to have large factor multiplying the (jω)−1 – i.e., the low frequencygain should be large. Pick Rf so that the DC gain is 100.

2. Choose Cf . Suppose you want to integrate an input signal whose fundamental frequency is 50 Hzor greater. Choose an appropriate value of Cf so that the circuit will act like an integrator downto about 50 Hz. Compute and sketch the expected form of the frequency response (magnitude)curve, |G(ω)| (at this point, you shouldn’t have to do a complete calculation to sketch this curve!).

3. Build the circuit using the 411 op-amp.

4. Verify that the frequency response of the circuit goes as 1/f in the appropriate frequency range.Does your measured phase difference also agree with your expectations? Note that you can alsothink of this as a low pass filter – but one with gain, in contrast to the passive RC circuit studiedearlier.

5. Use a square wave input with a fundamental frequency above the −3 dB point and show thatthe output resembles the integral. Try other available waveforms. What happens when the inputsignal frequency becomes too low?

Question 10.1 In what ways is the performance of this circuit improved over the purely passivecircuit that we studied in lab 3.?


ÿ òvo ÿ

Rf

Cin

Rin

ðvin ÿ ý

Figure 10.7: A practical differentiator circuit including input resistor Rin to introduce high frequency cutoff.

10.4.4 Differentiator

Differentiation corresponds, in the frequency domain, to multiplication by jω. Now we have increasinggain as the frequency increases. As you have seen before, the increasing gain will be cut off by theop-amp gain at some point. It is best to have the cut-off determined by external elements instead. Highgain at high frequency may also cause slew rate problems for this circuit. By introducing the inputresistor Rin (Fig. 10.7), the gain at high frequencies is reduced to Rf/Rin.

1. Choose Rin,Cin, and Rf . In this case, referring to the circuit in Fig. 10.7, we want to set the highfrequency gain to be high. Set this gain to be 100 and the minimum input impedance to be 1 kΩ.Set the upper frequency for differentiation to be 5 kHz (this is also the -3 dB point of the highpass filter). Again, compute and sketch the expected shape of the frequency response.

2. Build the circuit shown in Fig. 10.7 using the 411 op-amp.

3. Measure the frequency response (magnitude and phase), over the relevant frequency range. Doesthe circuit work as designed? Discuss reasons for any deviations from your expectations.

4. Differentiate both a square wave and a triangle wave. For the triangle wave, quantitatively comparewith the expected amplitudes of the derivative. Vary the fundamental frequency of the input wavesand observe the circuit limitations at low and high frequencies. You may observe a ringing responseto the square wave; compare the period of the ringing to the characteristic time determined byyour frequency response curve.

Question 10.2 In what ways is the performance of this circuit improved over degraded overthe purely passive circuit that we studied in lab 3.?

5. Replace the 411 op-amp with the 741 op-amp and repeat your Bode-plot measurements fromabove.

10.4. PROCEDURES 135

Question 10.3 Is the performance of this circuit with the 741 consistent with what youwould have expected? Explain why or why not.

10.4.5 Logarithmic Amplifier

We will now assemble the circuit shown in Figure 10.8 to make a crude logarithmic amplifier. The100 kΩ resistor from the non-inverting input to the ground helps make the circuit more stable, eventhough it appears to be doing nothing. If you circuit is working correctly, a plot of the output voltageversus the natural log of the input voltage should yield a straight line.

ÿ òvo ÿ

1N4004

1 kΩ

ðvi ÿ 100 kΩ ý

Figure 10.8: The logarithmic amplifier circuit.

1. Build the circuit shown in Fig. 10.8 using the 411 op-amp.

2. Use your Metex meter and the small variable DC voltage source to measure the response of thecircuit.

3. Make a plot of vout versus ln (vin) and use this to extract values for the parameters m and IS inthe Shockley equation.


Question 10.4 Are the values that you extracted for m and IS reasonable?



1. Consider the circuit shown in Figure 10.9 which is built from four resistors and an op-amp. (a) Interms of vin, vout, R1 and R2, what is the voltage at the non-inverting input to the op-amp (v+)?(b) In terms of vin, vout, R1 and R2, what is input current to the the circuit (that current comingin the line labeled connected to vin)? (c) In terms of vin, R1 and R2, what is the output voltage(vout) of the circuit? (Continue on the back if needed.)

ÿ ÿR1 ý

R1

ÿ òvout

R2

ÿ R1

ðvin


2. You are asked to build the op-amp circuit shown in Figure 10.10 below. The circuit uses a pairof matched resistors, R, and a pair of matched capacitors, C, and for convenience, we define thecharacteristic frequency to be

ωRC =1

RC.

(a) In terms of ωRC , what is the feed-back impedance, Zf of your circuit? Express your answer

in the form Zf = R (a+ jb)−1

. (b) In terms of ωRC , what is the input impedance, Zi of yourcircuit? Express your answer in the form Zi = R (a+ jb). (c) At ω = ωRC , what is the gain


of your circuit? Express your answer in terms of a magnitude | G | and phase φG in the formG =| G | ejφG . (d) In the limit where ωRC ω ∞, what is the gain of your circuit? Expressyour answer in terms of a magnitude | G | and phase φG in the form G =| G | ejφG . (e) In thelimit where ωRC ω 0, what is the gain of your circuit? Express your answer in terms of amagnitude | G | and phase φG in the form G =| G | ejφG . (f) Under what conditions would weneed to worry about this circuit running into the open-loop gain of our op-amp?

ÿ òvo ÿÿ

R

ÿ C

R

ðvin C ÿ ý

Figure 10.10: The op-amp circuit for problem 2.

Chapter 11

The Transition from Analog toDigital Circuits

Reference Reading: Chapters 6 and 7, Sections 6.8, 7.1, 7.2, 7.3 and 7.10.Time: Two lab periods will be devoted to this lab.Goals

1. Be able to design and construct the following circuits:

(a) A Summing Amplifier

(b) A Digital to analog converter

(c) A Transistorized logic switch

(d) An Op-Amp Comparator and a Schmitt Trigger

11.1 Introduction

In this lab, we will connect the analog world in which we have been working to the world of digitalcircuitry. For analog circuits, we are often concerned with the value of the voltage at an output. Thisvoltage can be a function of both the frequency and the magnitude of the input voltage. For digitalcircuits, the inputs and outputs take on two discrete values. We associate these values with either a0 for the lower voltage and an 1 for the higher voltage (also known as “false” and “true”). These twolevels are then used to represent information.

11.1.1 Digital Level Schemes

As discussed in our textbook (see Section 7.4), there are several different level schemes for associatingvoltages with information. For the circuits that we build in this course, we will usually have componentsthat ar 5V CMOS. For this family, any output voltage that is less than 0.5 volts is interpreted as meaning0, while any output voltage between 4.85 and 5.00V is interpreted as 1. Voltage levels between theseare not defined and will be avoided. The standard also defines the meaning of input voltages. Theseare a bit looser than the output with any voltage between 0 and 1.5V being interpreted as a 1, and anyvoltage from 3.5 to 5.0V is interpreted as a 1.

In digital circuitry, each input or output of the circuit represents a bit of information. The bit canonly represent information which can be categorized as 0 or 1,”false” or “true” or the answer to toquestions such as Has a button been pushed? or Is a switch in the ON position? With the use of several

139

140 CHAPTER 11. THE TRANSITION FROM ANALOG TO DIGITAL CIRCUITS

binary bits, we can represent numbers. For example, three bits can be used to represent any numberfrom 0 to 7, while four can represent numbers from 0 to 15. In the following we list the equivalents of3-bit binary and decimal.

3 bit binary 000 001 010 011 100 101 110 111decimal 0 1 2 3 4 5 6 7

Analog circuits can never be exact. For example, if you build an amplifier designed to produce anoutput voltage which is ten times its input voltage, the output will never be exactly ten times the inputvoltage. Furthermore, if you attempt to build two identical circuits, they will not produce exactly thesame results because of small differences in the components.

Digital circuitry does not have this problem. It is quite easy to build a circuit which takes a binaryword as input and produces a binary output number which is exactly ten times the input number. Ifwe build two identical (properly designed) circuits, they will produce identical results (we might findoutput bit 1 at 4.4V in one circuit and output bit 1 at 4.8V in the other circuit, but both of theserepresent TRUE or 1, so we consider this the same output).

11.1.2 The Op-amp Adder Circuit

An important starting point for us is an op-amp circuit that can add two inputs. An example of such acircuit is shown in Figure 11.1. Two inputs, V1 and V2 are connected through resistors to the invertinginput of the op-amp. The output can be shown (see Section 6.3.5 of your textbook) to be

Vout = −RfR1

V1 −RfR2

V2 , (11.1)

which for the case of R1 = R2 = Rf yields that

Vout = − (V1 + V2) . (11.2)

Thus, we have a circuit that can add two input voltages together. We also note that this circuit can beextended to any number of input voltages, with the op-amp summing all of them.

ÿ òVout

Rf

R2

ó V2

R1

ó V1

ýFigure 11.1: The simple summing amplifier.

11.1.3 The Digital to Analog Convertor

We will now use our summing amplifier as the basis of a circuit that can convert a digital signal toan analog output. This circuit combines the the R–2R ladder that we saw in lab 1 to create a set of


ðV0

R

ÿ R

ÿ 2R ý

2R "ðòý ÿ

2R "ðòý ÿÿý

2R

ÿ ò

Vo

12V0

14V0

Figure 11.2: A simple two-bit digital to analog converter.

voltages that are each a factor of two smaller than the next. This is shown in the upper right part ofthe circuit in Figure 11.2 where the voltage at the two intermediate points are 1

2V0 and 14V0.

We now use these two points as inputs to an adder circuit as shown in Figure 11.2. Using a pairof switches to connect the input voltages to the adder, we can have four possible input voltages to ourcircuit. In the state shown in the figure, both inputs are connected to the adder through resistors 2R,and the same resistor is used for feedback. In this configuration, the output will be Vo = − 3

4V0. If weswitch out the first input, then the output will be − 1

4V0, and having only the first connected gives anoutput of Vo = − 1

2V0. Thus, depending on the switch settings, we can have analog output voltages ofVo = 0, − 1

4V0, − 12V0 and − 3

4V0. This op-amp circuit is known as a digital to analog converter or aDAC. It is also possible to build a circuit (with comparators) that will take an analog input and delivera digital output. This reverse-DAC is known as an analog to digital converter or simply an ADC.

11.1.4 The Transistor Switch

We will now look at the building blocks that allow us to construct digital circuits. The first step inmoving to digital circuits is to build a simple electronic switch which can represent a bit of information.To be useful this switch should yield one of two output voltages that are essentially equal in magnitudeto the same two input voltages. That is, we want to process logical a 1 as one voltage and a logical 0 asanother. We want to build logic circuits that combine inputs to yield answers to questions such as: Areall inputs high? (an AND circuit) or: Is at least one input high? (an OR circuit). A logical 1 shouldbe the same voltage throughout the circuitry.

ðVi

RB

ýRC

÷VCC = 5V

òVo

Figure 11.3: A transistor is used to build a simple binary switch. The circuit shown here will invert the input.A high input signal will produce a low output, while a low input will produce a high output.


As an example, we will build a two-state transistor switch using a bipolar junction transistor. Thecircuit is either in the non-conducting state or off or in the fully-conducting saturated state, or on. Inour circuit shown in Figure 11.3, an +5V input voltage will produce a 0V output, while a 0V inputwill produce a +5V output. Such a circuit is known as an inverter, as the output is the “complement”of the input. Similar switches can, and usually are built using FET/JFET/MOSFET transistors.

We can also build more complicated logic circuits by using more than one transistor. A simple nangate can be built as shown in Figure 11.4 where the two inputs, Va and Vb are combined to yield theoutput, Vo. If both the inputs are +5V , then both transistors are conducting and the output is pulledto 0V . If either transistor has a 0V input, then the corresponding transistor is off and neither transistorwill be able to conduct. This will leave the output voltage at +5V . Thus we have a nand gate. Tomake an and gate out of this, we need to use a third transistor as an inverter to flip the output, feedingthe output of our circuit into our transistor switch in Figure 11.3.

ðVa

RB

ÿRC

ó+5V

òVoý

RB

ðVb

RB

ðVa ýÿ

RC

ó+5V

ÿ

ý RB

ðVb

òVo

Figure 11.4: The left-hand circuit shows a simple two-transistor nand gate while the right-hand circuitshows a nor gate built using two transistors.

In addition to the nand gate that we described above, it is also possible to build a nor gate withtwo transistors. We show an example of this in the right-hand circuit in Figure 11.4. In this circuit,either transistor having a “high” input will cause the output to go low. The output will only be highwhen both inputs are low, and both transistors are off. As with the nand we can turn the nor into anor by feeding the output into an inverter.

11.1.5 Comparators

Simple Comparators Next, we want to be able to take an analog signal such as the output of somedetector or sensor, and ask a binary question of it. In particular, has the signal reached some pre-setthreshold level? This operation is performed with a comparator which we discussed in Section 6.8 of ourtextbook. As noted in our text, the simple comparator circuit is shown in Figure 11.5. The referencevoltage, Vr, against which vin is compared, is set using the potentiometer. If vin is smaller than Vr, thethe output of the op-amp will be VCC , while is vin is larger than Vr, the output will be VEE . In theleft-hand circuit in Figure 11.5 is shown a simple op-amp based comparator circuit.

In our textbook, we noted that the output of this simple comparator can be very sensitive to noiseon the input signal. In particular, when the input signal crosses the threshold voltage, noise on theinput may cause the output to rapidly jump back and forth between the two possible output stages.This “noisy” behavior may be undesirable, and in some situations detrimental to the equipment beingcontrolled. Thus, we look for a more sophisticated solution that resolves this.


ÿ ðvin

ÿóVr !Rv

óVCC

ý òvout

ÿ ðvin

ÿóVr !Rv

óVCC

ý ÿ Rf

ÿ òvout

Figure 11.5: The left-hand circuit is a simple op-amp based comparator circuit. The right-hand circuit showsthe more sophisticated Schmitt trigger.

The Schmitt Trigger One way to alleviate this noise issue is to use positive feedback to stabilize thissituation. The positive feedback will accomplish two things. First, it will give us rapid output swingsfor slowly varying inputs and second, it will create a hysteresis in the circuit. This hysteresis will allowsus to avoid multiple transitions due to noisy input signals.

We accomplish this using the Schmitt trigger circuit shown in the right-hand side of Figure 11.5. Asdiscussed in our textbook, the positive feed back creates two different reference voltages depending onwhether the output is VCC or VEE . When the input is falling, it must cross the lower reference voltageto switch states. When it is rising, it must cross the upper reference to switch. As long as the noiseis smaller than the difference between the two reference voltages, the circuit will be immune from thenoisy oscillations between states as it crosses the threshold.

If we imagine that the potentiometer in our circuit is a voltage divider with R1 and R2, then thenominal reference voltage for the simple comparator is

Vr =R2

R1 +R2VCC .

Using the positive feedback in our Schmitt trigger, and assuming that VEE = −VCC , we can easily solvefor the the two thresholds. If we define

α =R1R2

Rf (R1 +R2),

then we can show that the two thresholds are given as

Va = Vr1

1 + α+

α

1 + αVCC (11.3)

Vb = Vr1

1 + α− α

1 + αVCC . (11.4)

In the limit of α << 1, this simplifies to

Va = Vr + αVCC

Vb = Vr − αVCC ,

where we clearly see on threshold pushed up by αVCC and the other pulled down by the same amount.




1. Consider the voltage summing circuit shown in Figure 11.1. What is the current through R1,though R2 and through Rf?

2. For this circuit, what is the output voltage, Vout? Explain why we would call this circuit anadder, in particular, consider in particular, the case in which R1 = R2 = Rf .

3. Consider the transistor switch shown in Figure 11.3. For an input of 0V , the transistor turnsoff since VB = VE and the base-emitter junction is not forward biased. What is output voltage,Vo = VC?

4. We now strongly forward bias the base-emitter junction by applying a 5V input voltage. A5 Volt input strongly forward biases the base-emitter junction. Assuming the transistor isconducting, what is the voltage at the base of the transistor, VB? What is the current intothe base of the transistor, IB?

5. Assuming the transistor is in its linear operating range and that β ≈ 100, what would be thecollector current? Given this current, what do we expect for the output voltage, Vo = VC?

6. Clearly, the transistor cannot be in its linear range! The transistor reaches saturation wherethe collector-emitter voltage is small and the collector current is limited by RC rather thanbeing calculated with the assumed β and IB . In saturation, what do we expect for the outputvoltage, Vo = VC?


1

2

3

4 5

6

7

8

Offset

Offset

VEE

VCC

vout

v_

v+

No Connection

8

7

6

5

43

21













1. Two 1 kΩ resistor.

2. Four 1% 10 kΩ resistors.

3. Five 1% 20 kΩ resistors.

4. One 411 OpAmp

5. Four single-pole, double-throw switches.

6. One 2N3646 npn transistor.

7. One 1 kΩ potentiometer.


For reference, the pin configuration for the 741 and the 411 op-amps is shown in Figure 11.6.


11.4 Procedure

11.4.1 Gotcha!











11.4.2 The Summing Amplifier

We want to build the two-input summing amplifier shown in Figure 11.7 using our 411 op-amp. We willuse a DC source of 5V for the +5V input, while for For the 0V and −1V input, we will us our DS335function generator to produce an appropriate square wave.

Before starting, we also note that there is an obscure pathology in the interaction of the yellowMetex multimeters with the 411 op-amp. Under certain conditions, attempts to use one of the yellowmultimeters to measure the DC output voltage of the 411 causes a wild instability in the 411’s output.This is visible if a scope is connected, and causes a net DC offset to be measured by the meter. Thebrown multimeters seem to work fine.

ÿ òvo ÿ

Rf

ÿ ÿR2

ó 0V,−1V

R1

ó +5V

ýFigure 11.7: The voltage summing circuit built using our 411 op-amp. Recall that for the op-amp to work,both VCC and VEE must be connected.

11.4. PROCEDURE 147

1. Design your circuit so that you obtain an output square wave which alternates between 0V and−5V as the input varies from 0V to −1V . The zero-order analysis you carried out in the prelim-inary lab section is sufficient for you to determine the ratio of resistors Rf/R1 and Rf/R2.

2. Choose reasonable values for your three resistors, R1, R2 and Rf . A good rule of thumb is thatfor inputs on the order of V olts, we want currents in milliamps.

3. Build the adder circuit shown in Figure 11.7 using a 411 op-amp and the component values thatyou selected above.

4. Set up your DS335 signal generator to produce a square-wave with a peak-to-peak amplitude of1V and a DC offset of −0.5V . Prove to yourself that this is the desired input for your addercircuit.

5. Verify that the output of your circuit is a square wave that alternates between 0V and −5V . Also,show that when either input is unplugged from your circuit, you observe the expected output—theoutput is a weighted sum of the inputs.

Question 11.1 Does the 0V output of your adder correspond to the 0V input?

11.4.3 A 4-bit Digital-to-analog Converter

We will now use our summing amplifier in conjunction with an R–2R ladder to build the digital-to-analog converter as shown in Figure 11.8. In this circuit, we will use mechanical switches to control theoutput voltage level, hence the term “digital input”. The switches are either on or off. These could alsobe computer-controlled switches, in which case this circuit could take the digital output of a computer,and then produce an analog voltage.

ÿ ý+5 V

R

R

R

R

2R ý

2R ÿ"ðòý

2R ÿ"ðòý

2R ÿ"ðòý

2R ÿ"ðòý

òVo

2R

Figure 11.8: The digital to analog converter (DAC) circuit.


1. Build the DAC circuit shown in Figure 11.8 using a 411 op-amp. Use precision 10 kΩ and 20 kΩresistors to set up the R–2R ladder. The switches are single pole, double throw, where single polemeans there is one input wire and double throw means they can be switched between two possibleoutputs. Our SPDT switches have been adapted so they plug directly into your proto-board.

Question 11.2 Explain why it is crucial that when the switch is not connecting the voltageinto the adder that it is connected to ground.

Question 11.3 Be sure that you understand which pins are connected for each position ofyour SPDT switch. Sketch the orientation of the mechanical switch for the case of the left-hand output pin connected to the center pole, and for the right-hand output pin connectedto the center pole. You may need to electrically measure this.

2. Measure the voltages along the top row of resistors where the 2R resistor drops to the SPDTswitch. Are these voltages what you expect for the R–2R ladder?

3. Imagine that the right-most switch is the least-significant and the left-most switch is the most-significant bit of a four-bit binary number. Create a table of the 24 binary numbers (switchpositions) and record the output voltage for each. Verify the DAC operation through these 24

settings.

11.4.4 Transistor Switch

Now we will use a 2N3646 npn transistor to build the simple digital switch shown in the circuit inFigure 11.9. Note that the β of this transistor is quite a bit smaller than that for the 2N2222 thatwe used in earlier labs. Measuring it on your Metex meter will give values in the range of 25 to 40.The operation of this inverting switch follows the follows the logic worked out in the preliminary labquestions. If the input voltage is 0V , the output voltage will be +5V , while if the input voltage is+5V , the output voltage will be zero.

11.4. PROCEDURE 149

Question 11.4 Consider the case of Vi = 5V and assume that β = 25. If the transistor were inits normal operating state, what would you expect the ouput voltage, Vo, to be? What does youranswer imply about the operating state of the transistor?

ðVi

330 Ω

ý1 kΩ

÷Vcc = 5 V

òVo

Figure 11.9: A 2N3646 transistor used as a binary switch.

1. Build the circuit of Fig. 11.9 using a 2N3646 transistor. Use your adjustable DC supply for Viand the proto-board supply for VCC .

2. Measure Vo for 0 and for 5 Volt inputs and compare to your answers to what you expect.

3. Somewhere between 0V and +5V input, the transistor is in its linear range. Here, the circuit issimilar to the common emitter amplifier with RE = 0. This means the gain is quite high and asmall variation in Vi drives the output between the limits discussed above. By varying your DCinput between 0 and +5V , you can determine this range.

Question 11.5 Over what range of input voltages does the output switch states?

4. Use your DS335 to produce a square-wave input that goes between 0V and 5V . Use the DC offsetlike you did in section 11.4.2. Use this to determine how fast the transistor can go from 0 to 5Vand from 5V to 0V .


Question 11.6 How fast can this switch operate? Estimate the highest frequency for whichthe input will produce a square-wave output.

Question 11.7 At very high frequency, you should see that there is a delay in the transistortransistor changing states. Is it associated with the output going high or the output going low?At what frequency does this delay become significant? Such delays are an intrinsic limitationsof saturated logic bipolar junction transistor circuitry.

11.4.5 Op-Amp Comparator

1. Build the simple comparator shown in Fig. 11.10 using a 411 op-amp. In this circuit, an adjustablereference voltage Vr is created using a potentiometer and the 411 op-amp is used to compare theinput signal, Vin, with the reference voltage, Vr.

2. Check the behavior of this circuit by observing its output when a triangular waveform is used asthe input (visualize both signals on the oscilloscope). Try varying Vr.

3. Since there is no feedback network, the op-amp goes to negative saturation as soon as Vin > Vrand to positive saturation when Vin < Vr. Can you observe effects of noise on these transitions?

11.4.6 Schmitt Trigger

The output of the simple comparator from the last section is uncertain when Vin ≈ Vr. The circuit canbe very sensitive to the exact values of these two voltages. In actual use, we need to worry about what

11.4. PROCEDURE 151

ÿ ðvinÿóVr !

1 kΩ

ó+12V

ý

òvout

Figure 11.10: A simple comparator built with a 411 op-amp. The point labeled Vr in the circuit is where wecan measure the reference voltage of the comparator.

happens as our input signal crosses Vr. In many applications, the input signal may be varying slowlycompared to the transition time of the circuit, and may be “noisy”. In this case, the comparator couldoutput a series of short pulses as the transition voltage is crossed. This is undesirable behavior.

Using positive feedback, we can build a circuit that minimizes this problem. Positive feedback gen-erates a hysteresis in the circuit response. Once the output switches states, a small noise signal on theinput will not be able to cause the output to switch back. This handy detector circuit is call the Schmitttrigger and shown in Figure 11.11.

ÿ ðvin

ÿóVr !1 kΩ

ó+12V

ý ÿ Rf = 1 kΩ

ÿ òvout

Figure 11.11: A Schmitt trigger comparator where the reference voltage can be adjusted using the 1 kΩpotentiometer. The point labeled Vr in the circuit is where we can measure the reference voltage of thecomparator.

1. Build the Schmitt trigger circuit shown in Fig. 11.11.

2. Explore the behavior of this circuit using a triangular waveform for an input signal. Note how thereference voltage used to define the transition point for an increasing input signal is higher thanthe reference voltage for a decreasing signal. This is the characteristic of positive feedback usedin the Schmitt Trigger.

3. Vary the reference voltage by adjusting your potentiometer and observe what happens with yourtriangular input voltage.


Question 11.8 Explain how this behavior can be used to avoid oscillations as a noisy inputsignal crosses the reference voltage level.


1. If you were to reverse R1 and R2 in your summing amplifier circuit, what would the output voltagelook like as a function of time?

2. If you were extending your DAC circuit, how many stages would you need to have 128 possibleoutput levels?

3. For your Schmitt-trigger circuit, how large would the noise need to be on your input to negate theeffect provided by the trigger circuit?

Chapter 12

Digital Circuits and Logic Gates

Reference Reading: Chapter 7, Sections 7.4, 7.5, 7.6, 7.7 and 7.8.Time: Two lab periods will be devoted to this lab.Goals

1. Become familiar with the operation of simple logic gates.

2. Be able to correctly identify pins on an integrated circuit.

3. Be able to set up and use a flip-flop.

4. Understand what a switch de-bouncer does.

5. Be able to set up and use a 555 clock chip.

6. Be able to design and construct a digital counter.

7. Be able to construct a shift register circuit.

141312

1110

98

123

76

54

Figure 12.1: The pin numbering scheme on rectangular IC packaging. The tab as indicated by the dark ovalin the diagram tags the end of the chip with the lowest and highest pin numbers.

12.1 Introduction

In this lab, we will become familiar with logic gates and the use of more complicated logic circuits. Wewill also set up a clock circuit and use it to drive a counting circuit and a simple shift register. Thelogic gates that we will be using come in rectangular packages called “dual in-line packages” or DIPs as

153

154 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES

shown in Figure 12.1. The pin numbering scheme is standard over all such chips and is indicated in thefigure. Not only will the IC have inputs and outputs related to the logic gates inside, it will also havean external power (VCC) and ground connections. As with op-amps, these power connections are nottypically shown in circuit diagrams, but are crucial to the operation of the chip.

12.1.1 Digital Logic

As discussed in lab 11, we saw that digital signals can be expressed using a two-state logic system. Thiscan be represented using two voltage levels, and then developing circuits that can process these signals.The basic elements of such circuits are logic gates that take several inputs and produce an output basedon the underlying logic. In Figure 11.4, we showed how two of these, and nand and a nor, could bebuilt using pairs of transistors. In this section, we will discuss the operation of various gates. The twobasic gates are a logical and whose output is high if all of its inputs are high, and the logical or whose

AND NAND OR NOR XOR XNOR

Figure 12.2: The standard symbols for logic gates.

output is high if any of its inputs are high. If we consider logic with two inputs, A and B, and anoutput O, then we write these two operations as

O = A ·B

for the and and as

O = A+B

for the or. We represent these as truth tables such as that given in Table 12.1. It is also useful tohave the “complement” of these. The complement is essentially the not operation, where a 1 becomesa 0 and a 0 becomes a 1. These complement gates are known as the nand and the nor gates. In ournotation, we express the complement by placing a “bar” over the symbol. Thus, for the nand we have

O = A ·B

and for the nor we have

O = A+B .

We also show the results of this gate in Table 12.1. Finally, in addition to the standard or inclusive or,we also also define an exclusive or, the xor. The xor will yield a high output if exactly one of theinputs is high. It aso has a complement known as the xnor. For the xor, we can write that

O = A⊕B ,

with the results for this operation listed in Table 12.1. These logic gates also have standard electronicsymbols for use in circuit diagrams. These are shown in Figure 12.2.


A B A ·B A ·B A+B A+B A⊕B A⊕B0 0 0 1 0 1 0 00 1 0 1 1 0 1 01 0 0 1 1 0 1 01 1 1 0 1 0 0 1

Table 12.1: The truth table for an and, nand, or, nor, xor and the xnor gates. The first two columnsare the inputs A and B. The next block show the output of the and/textscnand, followed by the or/norand finally the xor/xnor.

12.1.2 The Set-reset Flip-flop

Using logic gates, it is possible to build more complicated circuits that accomplish more sophisticatedfunctions. A first step for us is the Set-Reset flip-flop, which we can associate with digital memory. TheSR flip-flop can be built using two complementary logic gates as shown in Figure 12.3. These circuitsinvolve feeding the output of the gates back into the input of the other gate, and can be thought of as“logical feedback”.

Q

Q

S

R

Q

QS

R

Figure 12.3: The left-hand circuit shows a set-reset flip-flop built using nand gates. The right-hand pictureshows the flip-flop built using nor gates. Note that the S and R inputs are reversed relative to the twoflip-flops.

In Figure 12.3, the left-hand circuit shows an SR flip-flop built using a pair of nand gates. In orderto determine the truth table for this circuit, we need to consider it as a circuit with four inputs and twooutputs with a constraint between the inputs and the outputs. In this light, there are 16 possible inputcombinations of S, R, Q and Q. However, of these, only five give logically-consistent results. The fivevalid combinations are given as follows, where we note that the latter four combinations have Q and Qas the complement of each other.

S : R : Q : Q = 0 : 0 : 1 : 1

= 0 : 1 : 1 : 0

= 1 : 0 : 0 : 1

= 1 : 1 : 1 : 0

= 1 : 1 : 0 : 1

We focus on these four latter states as the interesting states of the flip-flop and note that the latter twohave the same input but different output. We can refer to this particular input combination as the “holdstate”. If both inputs are high, the output stays the same. The other two states provide a mechanisms


for setting either of these states. Thus, we have the basis of digital memory. We can set the memory toeither 0 or 1, and we have a mechanism to hold the value.

We can also look at the SR flip-flop built using the nor gates in Figure 12.3. This also has five validstates with four yielding outputs that are the complement of each other.

S : R : Q : Q = 1 : 1 : 0 : 0

= 1 : 0 : 1 : 0

= 0 : 1 : 0 : 1

= 0 : 0 : 1 : 0

= 0 : 0 : 0 : 1

For this flip-flop, the state with two low inputs holds the output, and either the S or R line going highsets the output. Both of these are useful in more complicated circuits. In Table 12.2 is given a compactform of the truth tables for both of the SR flip-flops, where we have introduced the idea that somevalue of Q at the n − 1’th step is transformed to Qn at the next step. We will utilize this notation inSection 12.1.4 where we discuss additional flip-flop circuits. These two flip-flops are also referred to asthe SR latch with the former known as the “SR nand latch” and the latter as the “SR nor latch.”

nand based nor basedSet Reset Qn Qn Set Reset Qn Qn1 1 Qn−1 Qn−1 Hold 0 0 Qn−1 Qn−1 Hold0 1 1 0 Set 1 0 1 0 Set1 0 0 1 Reset 0 1 0 1 Reset

Table 12.2: The truth table for the nand and nor-based SR flip-flops.

In circuits, the SR flip-flop is often represented using a rectangular circuit symbol as shown inFigure 12.4. As seen in the figure, the nand-based and nor-based SR flip-flops have their own symbols.The symbol for the nand-based SR is the same as the nor-based, except the inputs are “negated”. Thismakes sense from the two truth tables in Table 12.2 where is we complement the inputs to the nand-based flip-flop, it is identical to the nor-based one. This can also be easily shown from De Morgan’stheorem. In addition to the set and reset inputs, an SR can have an additional input that “enables”the device. If this new input is not high, the flip-flop does not work. This may or may not be shown incircuit diagrams.

R` a0SBbR R` a0

SAbRFigure 12.4: The rectangular circuit symbols for a set-reset flip-flop. The left-hand symbol represents thenand-based flip-flop while the right-hand symbol represents the nor based flip-flop.

12.1.3 Clock Circuits

Digital electronics does not normally sit in some fixed state, but rather performs logic operations oninput to produce output. The rate at which these operations are performed is defined by an externalclock. A typical processor chip for a computer has a rating that is in GigaHertz that indicates the clock


speed. While we will not be doing such high-speed electronics, we will set up a clock in this lab andthen use its output to drive our circuits.

We will build our clock using the so-called 555 timer chip. This is a very common chip whose pin-out has been standardized over all vendors (shown in Figure 12.5). The basis of the 555 is a pair of

1

2

3

4 5

6

7

8Ground

Trigger

Output

Reset

V

Discharge

ControlVoltage

CC

Threshold

Figure 12.5: The pin-out of the 555 clock chip.

comparators as shown in the circuit for the 555 in Figure 12.6. These comparators compare the voltagesof two different inputs with reference voltages inside the 555. A detailed discussion of how the 555 workscan be found in section 7.6 in your textbook. The basic idea is to use an external RC circuit to define acharacteristic time, τRC , at which the clock ticks. However, we have somewhat more control in that wecan also control what fraction of the clock period which is high and that which is low, fhigh and flow.

ÿ xyy z ðThreshold

ÿ ò

Control

ÿ5kΩ

ðVCC

5kΩ ÿ þ xyy z ð

Trigger

5kΩ ý

23VCC

13VCC

R` a0SAbR

ò

Output

||| ÿ ò

Discharge

òReset

Figure 12.6: The circuit inside the 555, showing the two comparators and RS flip-flop.

This functionality can be achieved using two resistors and a capacitor which are hooked up externallyto the 555 as shown in the circuit in Figure 12.7. In terms of R1, R2 and C, it can be shown that theperiod of the clock is

T555 = ln(2) (R1 + 2R2) C . (12.1)

The ln(2) comes from the exponential decay of an RC circuit and the fraction of the relevant charac-teristic time it takes to fall below some threshold. In addition to the period, we have the high and lowfractions. These are given below, where the results are reminiscent of a voltage divider.

flow =R2

R1 + 2R2(12.2)


fhigh =R1 +R2

R1 + 2R2(12.3)

6IS` OK

5 a02

IT!a O 31 a04

R

555

Bb OD7Q

ÿ ÿR2

ÿR1

ÿ ðVCC

C ý

òClock xyyy z

|||||||

P

G

Figure 12.7: A 555 clock IC in a circuit to produce a clock output signal with period T = 0.693·(R1 + 2R2)C.The output is on the Clock line.

12.1.4 Other Flip-flops

Two other flip-flop circuits are also in common use. Both of these are based in the SR flip-flop ofSection 12.1.2, but include an additional feature of “clocking”. These devices go into a hold state whenthe clock pulse is low, and read their input and process it when the clock pulse is high. It is also possibleto build these to act on either a rising or a falling clock pulse. See Section 7.6.2 of our textbook formore details on this.

S`1J!a ¬1C1#a01K!a ¬2RBbP

1D` a0C1CbR

Figure 12.8: The rectangular circuit symbol for a JK flip-flop (left) and the D flip-flop (right).

The JK Flip-flop The first of these is known as a JK flip-flop which has three inputs known as J ,K and the clock, C. When the clock pulse is high, the J and K inputs are read and the output Q isproduced. When the clock pulse is low, the flip-flop is in its hold state. We show the rectangular circuitsymbol for the JK flip-flop in Figure 12.8. More information on how the JK flip-flop works can be foundin Section 7.6.3 of our textbook. Here we only provide the truth table for the JK as in Table 12.3. Aswith the SR flip-flop, there are set, reset and hold operations, but the JK flip-flop has an additional


input state that complements the Q and Q outputs. This is known as the “toggle” state. We will takeadvantage of this in Section 12.4.5 to build a counting circuit.

CLK J K Qn Qn Comment

0 x x Qn−1 Qn−1 Hold

1 0 0 Qn−1 Qn−1 Hold

1 1 0 1 0 Set

1 0 1 0 1 ReSet

1 1 1 Qn−1 Qn−1 Toggle

Table 12.3: The truth table for the JK flip-flop. In this case, the flip-flop responds to the falling edge of theclock pulse.

The D Flip-flop A second type of flip-flop that is useful is the “data flip-flop”, or the D flip-flop.This flip-flop is also built on the SR flip-flop as discussed in the text, but has two inputs. The datainput, D, and the clock input, C. The output is a copy of the data input when the clock is high and isin a hold state when the clock input is low. The symbol for the D flip-flop is shown in Figure 12.8 andwe give the truth table as in Table 12.4.

CLK D Qn Comment0 x Qn−1 hold1 0 01 1 1

Table 12.4: The truth table for the JK flip-flop. In this case, the flip-flop responds to the falling edge of theclock pulse.

The D flip-flop is the basic element of a logic circuit known as a shift register as discussed in Section7.9 of the textbook. A series of these can be strung together with data loaded in the left most one. Thedata then moves one flip-flop to the right on each clock pulse. This provides a mechanism for delayingthe reception of information in a circuit by any desired number of clock pulses.

12.1.5 Using LEDs To Show Logic States

The basic circuit to drive a light-emitting diode (LED) is shown in Figure 12.9 where the LED isconnected in series with a resistor to a DC voltage supply. The LED is forward biased, with the anodemore positive than the cathode. As with normal diodes, the LED can be approximated as having avoltage drop Vd across it that is independent of the current, Id, in the circuit. Thus, the role of theresistor is to limit the current in the LED to make sure that it is not destroyed. Thus, the current isgiven by the voltage drop across the resistor, giving us that

Id =V − VdR

.


Typical red diodes have Vd ≈ 2V while for blue or violet LEDs it can be 2− 4V .

V

úId ÿ ò ÿ òVdR

Figure 12.9: A forward-biased LED. The resistor is used to limit the current through the LED.

In our digital circuitry, we will be using our +5V as our voltage source, and we would like to limitthe current in our circuit to be about 10mA. For a red LED, we would find that R needs to be about300Ω, so good choices woud the either 220 Ω or 330 Ω resistors. If we choose a blue LED, then choosingR ≈ 150 Ω is a better choice. We can now setup simple LED-based circuits that will light when theoutput is either high or low. We show simple examples of these in Figure 12.10 where we have assumethat we have used red or yellow LEDs in the circuits. The left-hand circuit will light the LED whenthe output is high, while the center circuit will light it when it is low. We can build a somewhat moresophisticated circuit as show in the right hand circuit where the red LED will light when the output islow and the green LED will light when it is high. ÿ ò

220Ω ý ÿ ò

220Ω ñ5V

ÿ ÿ ò220Ω ñ5V

220Ω ý

red green

Figure 12.10: Current-limiting resistors should be used in series with LEDs. In the left-had circuit, the LEDlights when the output is high, while in the center circuit, the LED lights when output is low. The right-handcircuit will light the red LED when the output is low and light the green LED when the output is high.




1. Verify that the five output states of the nand-based SR flip flop are correct.

2. Show that the time it takes to charge an RC circuit from 13 its maximum voltage to 2

3 itsmaximum voltage is given as ln (2) τRC .













1. Eight 220 Ω resistors.

2. Two 1 kΩ resistors.

3. Five 1% 20 kΩ resistors.

4. One 7400 nand chip.

5. One 7402 nor chip.

6. One 7473 or one 74LS107 jk flip-flop chip.

7. One SNLS164 8-bit shift register chip.

8. One 555 clock chip.

9. Eight LEDs.

10. Two single-pole, double-throw switches.


12.4 Procedure

12.4.1 Gotcha!







7. Have you supplied power to your integrated circuit chips (VCC ground)?


12.4.2 Logic Gates

In this section we will verify the functioning of simple logic gates. The operation of logic gates arespecified by truth tables as shown in Section 12.1.1. In order to verify the operation of a gate it isnecessary to measure the output for all possible combinations of inputs. In this section we will verifythe truth table for the 7400 nand gate and the 7402 nor gate. The pin-outs for both of the chips areshown in Figure 12.11. Note that the two chips are not “pin compatible”, the pin configuration for thetwo integrated circuits is different. We also note that both of these ICs that we use are so-called “quadpacks”, meaning that they each contain four independent gates. We will only need to measure one ofthe four gates in each IC.

12.4. PROCEDURE 163

14

13

12

11

10

9

87

6

5

4

3

2

1

4B

4A

4Y

3B

3A

3YGND

2Y

2B

2A

1Y

1B

1A VCC 14

13

12

11

10

9

87

6

5

4

3

2

1

GND

VCC1Y

1B

1A

2Y

2A

2B

4A

4B

4Y

3A

3B

3Y

Figure 12.11: The pin out of the 7400 (left)and 7402 (right) chips. These each have four gates, with inputsA and B and output Y. Note that they are not pin compatible.

While we could simply test these with a 5V power supply and our Metex digital voltmeter (DVM),we will build a somewhat more sophisticated circuit including switches and LEDs for this. We will usea pair of “single pole double throw” (SPDT) switches to connect either +5V or ground to the inputsof the gate as shown in Figure 12.12. We also emphasize that for logic circuits, it is important that theinputs must satisfy the voltage levels associated with either a 0 or a 1. We cannot simply let an inputfloat if we want 0V , it must be connected to ground.

Vo

+5V

+5V

Figure 12.12: Two single-pole double-throw switches which are used to control the input to a NAND logicgate. The output is then measured to the right of the gate.

1. Modify the circuit in Figure 12.12 to include LEDs to indicate the input and output states.

2. Build your circuit and verify the truth tables for both the 7400 nand gate and the 7402 nor gate.

Question 12.1 Record your measured truth tables for the two gates here. Do your resultsagree with what is expected?


3. In order to see how fast these ICs can operate as well as how clean the signals are at high frequency,replace one of the switches with your DS335 signal generator. Set the DS335 to produce a 5Vpeak-to-peak, 2.5V offset square wave and drive the circuit at high frequency. Tie the secondinput either to ground or to +5V so that the DS335 switches the output. Look at the output onyour scope to see when the gate has problems keeping up with the input.

Question 12.2 Can you deduce a rough estimate for the maximum clock rate at which suchcircuits can be used?

12.4.3 SR Flip-flops

Q

Q

S

R

Figure 12.13: The nand-based SR flip-flop.

1. The circuit in Figure 12.13 shows an SR flip-flop built using two nand gates. Modify the circuitto include switches that can connet the two inputs (individually) between 0V and +5V . IncludeLEDs in your design that will display the outputs Q and Q.

2. Build your circuit using the 7400 nand gate that we used in the last section. Recall that thereare four gates on each chip.

3. Use your circuit to verify the expected truth table for the SR flip-flop.

4. You can use the switch set-up you used above to toggle the inputs to low and back to high. Verifythe memory feature of this circuit and the ability to set outputs to a desired state. Write outthe values of the four inputs to the two gates, for each of the four possible SET/RESET inputcombinations.

12.4. PROCEDURE 165

Question 12.3 Apply De Morgan’s theorem to the circuit in Figure 12.13 and sketch theresulting circuit. Is this the same as the nor-based SR flip flop?

Question 12.4 What happens when both the SET and RESET signals are present at thesame time?

A Switch De-bouncer When we use a switch in a circuit, we nominally assume that its output willbe a perfect step function. Either going from low to high or from high to low, and then remaining.Unfortunately, the mechanical nature of many switches leads to a situation where the process of me-chanically opening or closing a switch actually causes the switch to bounce, and the output oscillatesmany times before settling in to the desired state. In many situations, this is not desirable. An RS flipflop can be used to de-bounce a switch. Once a RS flip-flop has changed states, it will not change backunless the other input is toggled. Because a switch does not actually bounce back and forth betweenthe two inputs, we can use an RS flip-flop to ignore the bounce. Such a circuit is shown in Figure 12.14.

5. Build the de-bounce circuit shown in Figure 12.14 and demonstrate that it does function as aswitch. To see the de-bouncing effect, you can look at the input to the Set on one scope trace andthe Q output on the other. Note what you observe in your lab book.

12.4.4 The 555 Clock Circuit

Before proceeding, we note that you will be using the clock circuit in this part of the lab to drive thecircuits in the next two sections. DO NOT DISASSEMBLE YOUR CLOCK CIRCUIT. It isalso advisable that you try to build your clock circuit as close to one end of your proto-board as possible.Otherwise, you will run out of board real estate later in the lab. We will be setting up the 555-basedclock circuit shown in Figure 12.15 where we want to design our clock to have a period of about 1 s.

The 555 clock chip that we will be using has the pin-out as shown in Figure 12.16. It is also possibleto get dual packs of these chips similar to the multiple gates we saw with out logic gates. In setting upthe 555, we take VCC = 5V .

1. The 1 s period of our circuit combined with equation 12.1 allows us to determine what (R1+2R2)Cmust be. Taking several possible capacitor values such as a few µF , tens of µ, F , hundreds of µF


ýÿ1 kΩ

÷+5 V

ÿ

1 kΩ õ+5 V

ÿÿ R` a0SBbR

Q

Q

Figure 12.14: An RS flip-flop used to de-bounce the output from a switch. Once the flip-flop changes state,it will remain in the new state, independent of whether the switch bounces.

6IS` OK

5 a02

IT!a O 31 a04

R

555

Bb OD7Q

ÿ ÿR2

ÿR1

ÿ ðVCC

C ý

òClock xyyy z

|||||||

P

G

Figure 12.15: A 555-based clock circuit to produce an output signal with period T = 0.693 · (R1 + 2R2)C.The output is on the Clock line.

1

2

3

4 5

6

7

8Ground

Trigger

Output

Reset

V

Discharge

ControlVoltage

CC

Threshold

Figure 12.16: The pin-out of the 555 clock chip.

and thousands of µF , determine what the sum of R1 + 2R2 must be. If we want to keep thus sumin the 10 kΩ range, what is the best choice for C?

2. We will now specify that the high fraction should be about twice the low fraction. This information

12.4. PROCEDURE 167

together with equations 12.2 and 12.3 will allow us to find the relative size of the two resistors inour circuit.

3. Based on the available capacitors in the lab, what we found above, select reasonable values for theresistors R1 and R2.

4. With your choice of (measured) components, build the circuit in Figure 12.15 and measure itsoutput. Does it have the expected period and high versus low fraction?.

5. Add an LED to the output of your clock chip (Figure 12.10) and let the lights flash!

12.4.5 The Binary Counter

In addition to the SR flip-flop, we also talked about the JK flip-flop. In this section, we will utilize the“toggle” state of the JK flip-flop to build a four-bit binary counter. However, rather than building ourown JK flip-flop from gates, we will use a custom chip for this purpose. The 7473 chip is a dual-packwhich contains a pair of edge-triggered JK flip-flops, where the falling clock edge triggers the flip-flop toread its input. In addition to the J , K and “clock” inputs, the 7473 chip also has a enable line labeledCLR. This line must be pulled “high” with +5V to enable the flip-flop. Including the CLR line, thetruth table for this chip is given in Table 12.5. In Figure 12.17 is shown the pin-out for our 7473 JK

CLR CLK J K Q Q Comment0 x x x L H Default1 falling 0 0 Qn−1 Qn−1 Hold1 falling 1 0 1 0 Set1 failing 0 1 0 1 ReSet1 falling 1 1 Qn−1 Qn−1 Toggle

Table 12.5: The truth table for the 7473 JK flip-flop. This flip-flop responds to the falling edge of the clockpulse.

flip-flop.

14

13

12

11

10

9

87

6

5

4

3

2

1

1K

VCC

1CLR

1CLK

2CLK

2CLR

2J

1Q

1Q

1J

GND

2K

2Q

2Q

4

3

2

11J

1Q

VCC

1K

1Q

1CLR

1CLK

2K

2CLR

2CLK

2JGND

2Q

2Q

14

13

12

11

10

9

87

6

5

14

13

12

11

10

9

87

6

5

4

3

2

1

Q1

A

B

Q0

Q2

Q3

GND CP

MR

Q4

Q5

Q6

Q7

VCC

Figure 12.17: (Left) The pin-out of the SN7473 JK-flip-flop. (Center) The pin-out of the 74LS107 JK-flip-flop. The inputs and outputs of the first flip-flop all start with 1, while the for the second, they all start with2. (Right) The pin-out of the SNLS164 8-bit shift register chip. For this chip, both the A and B inputs needto be high to set Q0. CP is the clock input and MR is the master reset. The outputs are Q0 through Q7.


1. Build the circuit shown in Figure 12.18 for a two-bit counter. Use your 555 clock circuit fromearlier in the lab to provide the clock input to your circuit. Verify that your circuit counts to threeas expected.

J

K

Q J

K

Q

input clock

+ Q0 + Q

1

clk clk

Figure 12.18: A two-bit binary counter built using JK flip-flops. This can easily be extended to more bits.

2. Modify your circuit to include at least two additional bits and demonstrate that the circuit doesindeed count as expected.

Question 12.5 If you build a 12-bit counter, how long would it take for it to count to itsmaximum value?

3. You use a switch, rather than your 555 to clock your counter. However, you would find thatswitches produce erratic output due to contact bounce as discussed above. The counter may seemany logic pulses, rather than a single pulse, as the mechanical switch makes and breaks contact.This will lead to very erratic behavior. Such a circuit is one example where the de-bouncerdiscussed above can be used as input to the circuit. Such a de-bouncer circuit is commonly usedon ’momentary’ push-button switches which change state when they are pressed and released.

12.4.6 The Shift Register

A shift register is a circuit that shifts bits by one bit on each input clock pulse. Section 7.8 of your textbook shows how a simple shift register can be built using D flip-flops. In this section, we will use anSN74LS164 chip which is an 8-bit shift-register. The pin-out for this chip is shown in Figure 12.17 andit’s truth table is given in Table 12.6.

The shift-register has four inputs and eight outputs. The clock input is labeled CP and there is areset input labeled MR. If the reset is pulled low, then all of the outputs (Q0 to Q7) are set to zero.As long as the reset is held high, the shift register will clock the bits from lowest (Q0) to highest (Q7),with one shift on each clock pulse. Finally, there two inputs A and B allow one to set the lowest bithigh. As long as one of these (A or B) is held low, Q0 will not be set. If both are high, then Q0 will gohigh on the next clock pulse.


Operating Inputs OutputsMode MR A B Q0 Q1-Q7Reset 0 X X 0 0-0Shift 1 0 0 0 Q0-Q6

1 0 1 0 Q0-Q61 1 0 0 Q0-Q61 1 1 1 Q0-Q6

Table 12.6: The truth-table for the SN74LS164 8-bit shift register. If the reset line goes low, the chip isreset. If the reset is high, then the contents of Q0 to Q7 are clocked through the shift register. If bothA and B are high, then Q0 is turned on during the clock pulse.

1. Design a circuit using the eight bit shift register chip which has an LED output connected to eachof the Q outputs of the chip. In your circuit, connect the B input to +5V and the use an SPDTswitch to connect the A input to either ground or +5V . It is advisable that you sketch the circuitwhich you want to build in your lab book before starting. You will also need to lay out the realestate on you circuit board carefully so that things fit.

2. Build your circuit using your 555 circuit from above to provide the clock input. Verify that dataloaded in using the switch will “shift through” the chip.


1. If you wanted to light two LEDs in series as an indicator, rather than a single LED, what valueof a resistor should you choose?

2. If you wanted your 555 clock circuit to run at 1 kHz, what are resaonable choices for the externalresistors and capacitors?

3. Modify you JK-flip-flop counter such that the LEDs are on when the output is low and off whenit is high.

Appendix A

The PB10 Proto-board

A.1 Introduction

Figure A.1: The PB10 proto-board used in our electronics course.

All of our circuits in this course are built on a proto-board. In our case, it is the Global SpecialitiesPB10, a picture of which is shown in Figure A.1. The board should be part of a kit that includeboth a power bus and an external power brick. This kit is currently sold as the PRO-S-LAB poweredbreadboard from Global Specialities. It is also possible to purchase the three parts separately as thePB10 proto-board, the “Global Specialities PRO-S PS” power supply and the “Global Specialties PRO-S PC” power connector. A somewhat more sophisticated powered bread board is the Global SpecialitiesPB-204, which has significantly more real estate for circuits and integrated power supplies.

In order to use the PB10 board, it is important to understand the internal connections on the board.

171

172 APPENDIX A. THE PB10 PROTO-BOARD

In this appendix, we will walk through the internal connections and then give some hints on how towire up our circuits. Before starting, we identify three classes of connections on the board. These arethe three banana jacks at the top of the board, the four buses which are the top two and bottom tworows of the board, and the two blocks of connectors which encompass all the remaining connections onthe board. These are discussed below.

A.2 Connections on the PB10 Proto-board

A.2.1 Banana Jacks

The three banana jacks on the board, labeled V1, V2 and GND are not connected to any other partof the proto-board. However, the colored plastic unscrews exposing a metal core in the center of thejack. There is a hole through this core into which we can insert a wire, which is then held in place bytightening the plastic screw on the outside of the jack. Thus, we can make a solid electrical connectionfrom the jack to any point on the proto-board using the wire we have attached.

The jack itself is convenient for connecting external power and ground to the board. For example,we might use a pair of banana plug cables to connect our DC power supply to the V1 and GND bananajacks on our board, then use wires to bring these to the needed points on the board.

A.2.2 The Buses

The buses are four rows of connection points on the board that are tied together along the row. Onthis board, the horizontal connection is not made across the middle of the row. This means that eachrow is in fact a pair of buses. To be more specific, we look at the top row of connectors on the PB10proto-board. The 25 connections on the left-hand side of the board (five blocks of five) are all connectedtogether. Similarly, the 25 connections on the right-hand side of the board are also connected together.The is repeated for the second row from the top, and the bottom two rows on the board as well. Theseconnections are sketched in Figure A.2.

...

...

25 Connectors

...

...

25 Connectors

Figure A.2: The connections of the buses on the PB10 proto-boards. The horizontal line through the busesindicate which holes are connected together.

In using the buses, it is often convenient to have them extend along the entire row. In order to dothis, we place a small wire jumper across the middle of the row to connect the two halves together. Inusing the board, it is often useful to have one of the top two rows connected to a positive DC voltagelevel, while one of the bottom two layers is connected to ground.

A.2.3 The Connectors

We refer to the remaining holes in the proto-board as normal connectors, or just connectors. Eachcolumn of five of these holes are connected together, with no connection made across the gap in themiddle of the board. These connections are shown in Figure A.3. Thus, we have 128 blocks of five pinsconnected together for connecting circuit elements. You do not want to put both ends of a componentin the same block of five holes, as this will short both ends together.

A.3. HINTS ON WIRING CIRCUITS ON THE PB10 PROTO-BOARD 173

...

...

64 Rows

Figure A.3: The connections for the connectors on the PB10 proto-boards. The vertical lines through thepins indicate which holes are connected together.

A.3 Hints on wiring circuits on the PB10 Proto-board

In building circuits on the PB10 proto-board, it is useful to minimize the number of external jumperwires that you use, and maximize the number of internal connections you use. This serves two purposes.First, it makes your circuit neater, which in turn makes it easier to debug if there is a problem. Second,the wire connections can be flaky, so minimizing their use can minimize potential problems in yourcircuit.

We also noted above that it is often convenient to make one up the upper two buses a non-zero DCvoltage, and one of the lower two buses ground. This provides a large number of connection points tothese voltage levels, and can in turn minimize the use of jumper wires.

174 APPENDIX A. THE PB10 PROTO-BOARD

Appendix B

Component Labels

Components are labeled in a number of ways. Color codes are typical for resistors, while variouscombinations of numbers, letters and colors may be used for capacitors. In this section, we show someof the common methods of labeling components. This list is by no means comprehensive, and when indoubt about a particular component value, measuring it is always the right thing to do.

As mentioned above, colors are used in labeling several different components. The color-to-numbercorrelation is given in Table B.1. There are numerous poems and phrases in which the first letter of thecolor name is the first letter of a word, and the poem or phrase follows the 0-to-9 order in the followingtable. None of these phrases will be repeated here.

Color ValueBlack 0Brown 1

Red 2Orange 3Yellow 4Green 5Blue 6

Violet 7Grey 8White 9

Table B.1: The color-numeric correspondence in electrical components.

B.1 Resistor Codes

The most common usage of color codes is in labeling resistors. Typical resistors have four color bandsas shown on the left side of Figure B.1. Precision resistors have a 5th colored band as shown in theright side of the figure. For a resistor with n bands, the first n− 2 bands give the numerical part of theresistance, the (n − 1)th band gives the power-of-ten multiplier, and the nth band gives the tolerance.Table B.2 shows how this works for four-band resistors, while table B.3 explains five-band resistors.

A couple of resistor examples are shown in Figure B.2. The first has four bands: red-black-yellow-gold. From Table B.2, we see that the first two bands give s 20. The third band says that we multiply thisby 104 and the fourth band indicates that we have a 5% tolerance. The resistor is R = 200 kΩ (±5%).The second example is a 5-band resistor with purple-black-brown-red-brown. Table B.3 gives us the

175

176 APPENDIX B. COMPONENT LABELS

Ban

d 1

Ban

d 2

Tole

ran

ce

Ban

d 3

Ban

d 1

Ban

d 2

Ban

d 3

Tole

ran

ce

Ban

d 4

Figure B.1: The left-hand diagram shows a normal resistor with 4 bands. The method for reading these isshown in Figure B.2. The right-hand diagram shows the coding on precision resistors. Table B.3 gives therules for reading these.

Color 1st 2nd 3rd 4th

Black 0 0 ×100

Brown 1 1 ×101

Red 2 2 ×102

Orange 3 3 ×103

Yellow 4 4 ×104

Green 5 5 ×105

Blue 6 6 ×106

Violet 7 7Grey 8 8White 9 9Gold ×10−1 ±5%Silver ×10−2 ±10%

(None) ±20%

Table B.2: The meaning of each band in a normal (4-band) resistor.

Color 1st 2nd 3rd 4th 5th

Black 0 0 0 ×100 ±1%Brown 1 1 1 ×101 ±.1%

Red 2 2 2 ×102 ±.01%Orange 3 3 3 ×103 ±.001%Yellow 4 4 4 ×104

Green 5 5 5 ×105

Blue 6 6 6 ×106

Violet 7 7 7Grey 8 8 8White 9 9 9Gold ×10−1

Silver ×10−2

Table B.3: The meaning of each band in a precision (5-band) resistor.

numeric part from the first three bands as 701. The fourth band indicates we multiply this by 102 andthe fifth band says that we have 0.1% tolerance. Thus R = 70.1 kΩ (±0.1%).

B.1. RESISTOR CODES 177

2 0 4 5%

7 0 1 2 .1%

2 0 1

2 22 5%

20 x 104 Ω = 200 kΩ (5%)

701 x 102 Ω = 70.1 kΩ (0.1%)

20 x 101 Ω = 200 Ω (20%)

22 x 102 Ω = 2.2 kΩ (5%)

red

red

black

yellow

gold

purple

black

brown

brown

red

red

red

red

black

brown

gold

Figure B.2: Examples of reading 4-band and 5-band resistors. Note that in the third example, the color ofthe fourth band is “none”.


B.2 Capacitors

There are probably more ways of labeling capacitors than one can count. In this section, we go over anumber of the labeling schemes that one may encounter in building circuits. As with any component,measuring it is probably the most accurate way to determine its actual value. Electrolytic capacitorstend to come in cylindrical cans. These capacitors have a definite parity with the positive terminal(anode) being labeled in some fashion. A mark may be printed on the capacitor, or there may be a bandor ring around one end of the capacitor as shown in Figure B.3. The capacitor will also normally haveits capacitance printed on the side in µF ; however, a 22µF capacitor (for example) may be labeled as22 M, where M is used to represent µF . In addition, the capacitor will have a voltage rating whichindicates the maximum voltage at which the capacitor can operate. If one of these devices is hooked upbackwards and subjected to a large voltage, one of the ends tends to remove itself from the the capacitorwith a loud bang.

+

−

Crimp or band

Figure B.3: An electrolytic capacitor. Capacitance is indicated in µF , while the end with the crimp or bandis the positive end (anode) of the capacitor.

Another type of capacitor is the ceramic disk capacitor. The are typically flat discs. A couple oftypical labeling schemes for these are shown in Figure B.4.

XXM

YYVCCM

Figure B.4: The ceramic capacitor on the left is labeled with three numbers as shown, CCM. The value ofthe capacitor is given as CC × 10M pF . The label 103 translates to 10 × 103 pF , while 501 translates to50× 101 pF . The capacitor on the right has both a capacitance and a voltage on it. The XXM is XX µF ,while the voltage is given as Y Y V .

You may also encounter tantalum electrolytic capacitors, seen in Figure B.5. Some of these arecolor-coded as shown in the figure, where Table B.4 shows how to interpret the colors on the capacitor.

B.2. CAPACITORS 179

Voltage and + Polarity

Tolerance

C

M

C

+ −

Figure B.5: A tantalum electrolytic capacitor. The capacitance can be written numerically on the capacitorin µF , or the color code in Table B.4 can be used. If the color code is used, the capacitance is in pF .

Color Voltage Value MultiplierBlack 4 0Brown 6 1

Red 10 2Orange 15 3Yellow 20 4 104

Green 25 5 105

Blue 35 6 106

Violet 50 7 107

Grey 8White 9

Table B.4: The color code for the tantalum electrolytic capacitors shown in Figure B.5. The capacitance isgiven in pF .


B.3 Semiconductor Labels

Semiconductors are labeled with a combination of letters and numbers:

XNYYYY

with the letters and numbers having the following meaning.

X The number of semiconductor junctions. For a diode, this is one. For a bipolar transistor, this is2.

N The device is a semiconductor.

YYYY The identification number (order of registration) of the device. This also may includes a suffixletter that can indicate matching devices (M), reverse polarity (R) and modifications (A,B,C,· · ·).

An example is the 2N2222 transistor, for which there is also a modified version, the 2N2222A. Atypical diode is the 1N4004.

B.4. DIODES 181

B.4 Diodes

In a diode, the pin which is connected to the p-type semiconductor layer is the anode, while thatconnected to the n-type layer is the cathode, and it is crucial to know which one is which. The diodeis said to be forward biased when the anode is at higher potential than the cathode, or reverse biasedwhen the cathode is at higher potential. Figure B.6 shows a couple of typical diode packages on theleft, while on the right are a couple of typical light-emitting diode (LED) packages. For the diode, thepointed end of the can, or the end with the stripe or band around it, indicates the cathode. In the LED,the shorter leg, or the side that has a flat spot on the base of the can, is the cathode. Zener diodes

Cathode Anode

Cathode Anode

Cath

ode

Anode

Cath

ode

Anode

Figure B.6: Typical diode and light-emitting diode containers. Under forward biasing, the anode is at higherpotential than the cathode.

will probably have the breakdown voltage printed on the can as well. “5.6” would mean that the diodebreaks down when it is reverse biased with 5.6V . There may also be colored bands on a diode. Thisinformation codes the diode type. Two examples of this are shown in Figure B.7 while Table B.5 showswhat each color means. The last band is always the suffix letter, with black indicating that there is nosuffix. The remaining bands, reading away from the cathode, give the diode identification number. Toget the full number, add 1N to the start of the code. In the examples, yellow-black-black-yellow-browncorresponds to 4004A. This is then a 1N4004A diode.


yel

low

bla

ck

bla

cky

ello

w

bro

wn

4 0 0 4 A 5 4 5

yel

low

bla

ck

gre

en

gre

en

1N4004A 1N545

Figure B.7: Colored band labels for diodes.

Color Digit SuffixBlack 0 (none)Brown 1 A

Red 2 BOrange 3 CYellow 4 DGreen 5 EBlue 6 F

Violet 7 GGrey 8 HWhite 9 J

Table B.5: The color codes used to identify diodes.

B.5. TRANSISTORS 183

B.5 Transistors

The pin labels of typical bipolar transistors are shown in Figure B.8. While it is usually safest todouble-check the pins on the transistor spec sheet, Figure B.8 does accurately describe a majority ofthese transistors. The base connection is in the middle. Most bipolar transistors will function, but notas well, if one reverses E and C in a circuit.

BE C CE

B B

EC

Figure B.8: Typical pinouts for bipolar transistors. The three pins are the emitter (E), the base (B), andthe collector (C).


B.6 Integrated Circuits

Typical ICs come in 8- and 14-pin packages. Figure B.9 shows the pin numbering scheme on a 14-pin package. The key identifying mark is the tab shown at the center of the right-hand side of thechip. Looking at the top of the package with the tab on the right, pin 1 is above the tab and thehighest-numbered pin (14) is below the tab.

141312

1110

98

123

76

54

2 134567

8 9 10 11 12 13 14

Figure B.9: The pin number scheme on a 14-pin IC package. Pin 1 is to the right of the tab, and pin 14 isto the left of the tab.

Appendix C

Curve Fitting in Excel

C.1 Introduction

For many of the labs that in thus manual, we will need to fit theoretical curves to our measured data.While there are many computational tools that can do this, a very common one is to carry this out inExcel. This appendix will describe how this is done using a more recent version of Excel.

Figure C.1: Enter your data into and Excel spreadsheet.

C.2 Performing Linear Fits to our Data

Enter the data into an Excel spreadsheet In the course of our labs, we will have collected somedata. The example here assumes that we have measured the I-V curve of a resistor. The data we

185

186 APPENDIX C. CURVE FITTING IN EXCEL

collected are as given in Table C.1 and we are told that the resistor is rated as 2 kΩ with 10% tolerances.The first thing that we will do is enter our data into an Excel spreadsheet. We show such a spreadsheet

Voltage (V) −5.0 −4.0 −3.0 −2.0 −1.0 0.0 1.0 2.0 3.0 4.0Current (mA) −2.58 −2.01 −1.55 −1.03 −0.50 0.01 0.48 0.99 1.57 2.05

Table C.1: The collected data for the I-V curve of a resistor,

in Figure C.1. Note that to allow us to keep track of what we really have, we have labeled the twocolumns and made sure that the units are in the column labels as well. The signs are also importanthere. If the voltage is negative, then at least for a resistor, the current needs to be negative as well.

Plot our data in Excel Now that we have the data in Excel, we would like to plot it. This is doneby highlighting the data, then pulling down the chartmenu in Excel. We will select the Marked Scatterplot, which will allow us to perform later fits to our data. In Figure C.2 are shown the pull-down menuon a Mac for the charts and the resulting plot of our data in Excel.

cc

Figure C.2: Plot your data in Excel.

C.2. PERFORMING LINEAR FITS TO OUR DATA 187

Performing a linear fit For fittng a straight line to our data, we can use the trendline feature inExcel. If we right-click on one of the points in our plot, one of the pop-up menus will be for a trendline.With this menu as shown in Figure C.3, we select the linear fit. Then, as shown in Figure C.4, we returnto this menu and select the options to show the results on our plot. The resulting plot with the overlaidfit is shown in Figure C.5.

Figure C.3: Place a linear trendline on your data.

Figure C.4: Put the fit parameters on your plot.


Figure C.5: Your plotted data with the fit parameters.

C.3. PERFORMING GENERAL FITS TO OUR DATA 189

Comparison of results to data We are now ready for the most important part of this exercise,to compare our fit results with our expectations. The mathematical form that was fit is given as

I(mA) = a V (V ) + b .

Our fit tells us that

a = 0.5119mA/V

b = −0.001mA ,

where we have made sure to indicate the units associated with these fit parameters based on the data weentered in Excel. The resistance is R = 1/a, but to get resistance, we need to write a = 0.0005119A/V ,so R = 1953 Ω. Recall that we were told that our resistor was supposed to be 2000 Ω with 10% tolerances.That means that we should have expected a measured value in the range of 1800 Ω to 2200 Ω. Thus,our result is within the expected tolerance.

C.3 Performing General Fits to our Data

Enter the data into an Excel spreadsheet The example here assumes that we have measured thefrequency response of a filter circuit. We set the frequency to typical values, then measured the inputvoltage, vin, and the output voltage vout of our circuit. The data we collected are as given in Table C.2.As before, we will enter our data into an Excel spreadsheet. However, in addition to simply entering

f (Hz) vin (mV) vout (mV)10 500 49920 500 50160 500 470100 500 430200 500 305600 500 1251000 500 802000 500 406000 500 1310000 500 820000 500 460000 500 2100000 500 0200000 500 0600000 500 01000000 500 0

Table C.2: The collected data for the frequency response of a filter.

our date, we also add two computed columns. The first is the angular frequency, ω, which is computedat ω = 2πf . The second is the gain, G = vout/vin. We show such a spreadsheet in Figure C.6.

Plot our data in Excel Now that we have the data in Excel, we would like to plot it. This is doneby highlighting the data, then pulling down the chartmenu in Excel. We will select the Marked Scatterplot, which will allow us to perform later fits to our data. Once the plot is generated, we will want tochange the horizontal axis to log-scale from linear. This is done by right-clicking on the axis, selecting


Figure C.6: Data for our nonlinear fit.

Format Axis, and then under options, click the log scale. In Figure C.7 we show the resulting plot ofour data in Excel. In order to fit our data, we first need to decide what our fit function will be. For alow-pass filter, we expect that the magnitude of our gain will be

| G | =1√

1 + (ω/ωRC)2,

where our fit parameter is the characteristic frequency, ωRC . To be able to do the fit, we will needto define a variable omgrc. We do this by entering both the name and a value, 250, as shown in thebottom of Figure C.8. We then highlight both of these cells and select Insert from the top menu. On


Figure C.7: Plot your data in Excel.

the pull-down menu, we then select Name, and then select Define on the resulting menu. We can nowcreate a “predicted” column using the formula

=1/SQRT(1+(D2/omgrc)*(D2/omgrc))

We show this in Figure C.8.We now need to create a measure of how far apart our measured gain and predicted gain are. This

is usually done with a χ2 function. We create a new computed column that will contain the individualcontributions to our χ2. This is nominally

χ2 =

n∑i=1

(Gi(meas)−Gi(pred))2

σ2

where we square the difference between the measured and fit value, and then divide by our expectederror in the gain. In this case, we do not have a good feel for the error in the gain. Probably the bestthing that we can do is to estimate the error in the output voltage. We can assume that it is 5% of themeasured value, but given the nature of our scope, it is no smaller than 1mV . Thus, we might computethe error in the output voltage as

=MAX(C2*0.05,1)

and then the error in the gain as

=MAX(C2*0.05,1)/B2

This then lets us compute a reasonable χ2 as in the following.

=(E2-F2)*(E2-F2)/(G2*G2)


Figure C.8: Set up our prediction in Excel.

Figure C.9: Set up our prediction in Excel.

Finally, we need to have a cell that is the sum of the individual χ2 contributions. Doing all of this, weget the spreadsheet as shown in Figure C.9. We would now like to solve this to find the best value ofωRC . To do this, we select the cell with the summed χ2, then select the Data menu from the top bar.This brings up a Solver menu. This is the question mark that we see in Figure C.9. This brings up themenu in Figure C.10, where we have entered omegarc into the By changing variable cells box. We then


click on solve. This will think for awile, after which the value of ωRC will be optimized at about 996with the χ2 minimizing at about 2. We can now plot our fit data by selecting the ω, measured G andpredicted G columns and then making a new scatterplot. This is shown in Figure C.11.


Figure C.10: Set up the solver in Excel.


Figure C.11: Set up the solver in Excel.

basic electronics - wayne state...

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