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BACL02METHODS TO DESCRIBE LOGIC CIRCUITS

Logical statements in our on language

Trut! ta"les

Boolean alge"ra e#$ressions

Circuit sc!ematic % gra$!ic logic s&m"ols

Timing 'iagrams

Analysis of Combinational Circuits(or a gi)en logic circuit sc!ematic *in' t!e logic *unction+

Synthesis of Combinational Circuits(or a gi)en logic *unction $ro)i'e t!e circuit sc!ematic+

MULTILE,EL COMBI-ATIO-AL LOGIC

E#am$les(or a gi)en logic circuit sc!ematic *in' t!e logic *unction+

Example f .x' /xy' /y z11

Determine t!e trut! ta"le *or t!e circuit o* (igure ### +++++++

E#am$le circuit Dra t!e out$ut a)e*orm *or OR A-D an' 3OR gates

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A -OT gate in'icating a "utton is not $resse' !en its out$ut is true+

Timing 'iagram

E#am$le o* t!e use o* an OR gate in an alarm s&stem+

Mo'i*& t!e circuit so t!at t!e alarm is to "e acti)ate' onl& !en t!e $ressure an' t!e

tem$erature e#cee' t!eir ma#imum limits at t!e same time+

Su$$ose t!at &ou !a)e an un4non to%in$ut gate t!at is eit!er an OR gate or an

A-D gate+5!at com"ination o* in$ut le)els s!oul' &ou a$$l& to t!e gate6s in$uts to'etermine !ic! t&$e o* gate it is7

5rite t!e Boolean e#$ression *or out$utx

Determine t!e in$ut con'itions necessar& to acti)ate MEM.

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T!ree%in$ut 3OR8 to%le)el logic im$lementation T!ree%in$ut 3OR

using to to%in$ut 3ORs

Determine t!e in$ut con'itions necessar& to acti)ate DRIVE.

In$utsA9 t!roug!A0 are aress in$uts t!at are su$$lie' to t!is circuit *rom t!eout$uts o* a micro$rocessor+T!e eig!t%"it a''ress co'eA9 toA0 selects !ic! 'e)ice t!e micro$rocessor ants to

acti)ate+ Mo'i*& t!e circuit so t!at t!e micro$rocessor must su$$l& an a''ress co'e o* :A;

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Determine !at engine con'itions ill gi)e a arning+

C!ange t!is circuit to one using all -A-D gates+

3 % HIGH !ene)er to or more sitc!es are close'

Determine t!e in$ut con'itions nee'e' to turn on t!e LED+

La"eling Acti)e%LO5 Logic Signals

=RD =MEM+++>RD >MEM+++

A multi$lier circuit ta4es to%"it "inar& num"ers an' $ro'uces an out$ut "inar& num"er% e?ual to t!e arit!metic $ro'uct o* t!e to in$ut num"ers+

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Design t!e logic circuit *or t!e multi$lier+Construct a @%"it com$arator circuit t!at out$uts a ; i* t!e num"er is greater t!an ore?ual to an' out$uts a 0 ot!erise+

f .x2x;'x0 x2x;x0' x2x;x0

In a sim$le co$& mac!ine a sto$ signal S! is to "e generate' to sto$ t!e mac!ineo$eration an' energie an in'icator lig!t !ene)er +++++

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An analog%to%'igital con)erter is monitoring t!e 'c )oltage o* a ;2%, storage "atter& onan or"iting s$aces!i$+T!e con)erter6s out$ut is a *our%"it "inar& num"erA"CDcorres$on'ing to t!e "atter& )oltage in ste$s o* ; , it!A as t!e MSB+T!e con)erter6s"inar& out$uts are *e' to a logic circuit t!at is to $ro'uce a HIGH out$ut as long as t!e"inar& )alue is greater t!an 0;;02 .

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E#am$les o* loo$ing $airs o* a'Facent ;s+

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Com$lete Sim$li*ication rocessSte$ ; Construct t!e ma$ an' $lace ;s in t!ose s?uares corres$on'ing to t!e ;s int!e trut! ta"le+ lace 0s in t!e ot!er s?uares+Ste$ 2 E#amine t!e ma$ *or a'Facent ;s an' loo$ t!ose ;s t!at are not a'Facent to an&ot!er ;s+ T!ese are calle' isolate ;s+Ste$ @ -e#t loo4 *or t!ose ;s t!at are a'Facent to onl& one ot!er ;+ Loo$ any $air

containing suc! a ;+Ste$ : Loo$ an& octet e)en i* it contains some ;s t!at !a)e alrea'& "een loo$e'+Ste$ Loo$ an& ?ua' t!at contains one or more ;s t!at !a)e not alrea'& "een loo$e'ma#in$ sure to use the minimum number of loops.Ste$ < Loo$ an& $airs necessar& to inclu'e an& ;s t!at !a)e not &et "een loo$e'ma#in$ sure to use the minimum number of loops.Ste$ 9 (orm t!e OR sum o* all t!e terms generate' "& eac! loo$+

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T!e same ma$ it! to e?uall& goo' solutions+Don6t%Care Con'itionsSome logic circuits can "e 'esigne' so t!at t!ere are certain in$ut con'itions *or !ic!t!ere are no s$eci*ie' out$ut le)els usuall& "ecause t!ese in$ut con'itions ill ne)er

occur+ In ot!er or's t!ere ill "e certain com"inations o* in$ut le)els !ere e 'on6tcare !et!er t!e out$ut is HIGH or LO5+

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Don6tcare con'itions s!oul' "e c!ange' to 0 or ; to $ro'uce %ma$ loo$ing t!at&iel's t!e sim$lest e#$ression+

Let6s 'esign a logic circuit t!at controls an ele)ator 'oor in a t!ree%stor& "uil'ing+

M is a logic signal t!at in'icates !en t!e ele)ator is mo)ing /M. ;1 or sto$$e' /M. 01+%& % an' %( are *loor in'icator signals t!at are normall& LO5 an' t!e& go HIGH onl&!en t!e ele)ator is $ositione' at t!e le)el o* t!at $articular *loor+T!e circuit out$ut is t!e )*E+ signal !ic! is normall& LO5 an' ill go HIGH !ent!e ele)ator 'oor is to "e o$ene'+Onl& one o* t!e *loor in$uts can "e HIGH at an& gi)en time+

BAC;@L02METHODS TO DESCRIBE LOGIC CIRCUITS

Logical statements in our on language

Trut! ta"les

Boolean alge"ra e#$ressions

Circuit sc!ematic % gra$!ic logic s&m"ols

Timing 'iagrams

Analysis of Combinational Circuits(or a gi)en logic circuit sc!ematic *in' t!e logic *unction+Synthesis of Combinational Circuits(or a gi)en logic *unction $ro)i'e t!e circuit sc!ematic+

Minimiation o* Com"inational Circuits

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Minimiation o* Com"inational CircuitsAR-AUGH MA METHOD

S . /MD' V1 /MD V'1 /MD V1 S . M/D V1

Data Transfers

5or's "&tes ni""les

arallel trans*er

Serial trans*er

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Digital ICs are o*ten categorie' accor'ing to t!eir circuit com$le#it& asmeasure' "& t!e num"er o* e?ui)alent logic gates on t!e su"strate

Stan'ar' Com"inational Com$onentsDecoer circuitsAsserts one o* n out$ut lines 'e$en'ing on t!e )alue o* an m "it "inar& in$ut 'ata+In general an m%to%n 'eco'er !as m in$utsAm%; A0 an'

n out$uts ,n%; ,0 !ere n . 2m+In a''ition it !as an ena"le line E *or ena"ling t!e 'eco'er

28: 'eco'er im$lementation

General Deco'er 'iagram+ 9:#;@J @%to%J 'eco'er Logic it! 'eco'er

2%to%: 'eco'er it! ena"le

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(our 9:ALS;@Js *orming a ;%o*%@2 'eco'er+

BCD%to%9%segment 'eco'er>'ri)er 'ri)ing a common%ano'e 9%segment LED 'is$la&

Segment $atterns *or all $ossi"le in$ut co'es+EncoerT!e in)erse o* a 'eco'er % it enco'es a 2n%"it in$ut 'ata into an n%"it co'e+T!e enco'er !as 2nin$ut lines an' n out$ut linesOne o* t!e in$ut lines s!oul' !a)e a ; !ile t!e remaining in$ut lines s!oul' !a)e 06s+T!e out$ut is t!e "inar& )alue o* t!e in'e# o* t!e in$ut line t!at !as t!e ;+

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General enco'er 'iagram+ Onl& one in$ut s!oul' "e acti)e at one time+

An J%to%@ enco'er8 trut! ta"le circuit logic s&m"ol

An J%to%@ enco'er8 e?uationsriorit& circuit

riorit& circuit

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riorit& circuit trut! ta"le it! 'on6t cares /36s1riorit& enco'ers

riorit& enco'ers 9:#;:J $riorit& enco'er GS grou$ select

Trut! ta"le *or 9:#;:J $riorit& enco'er EO ena"le *or ot!er 9:#;:J 3 'on6t care

MULTILE3ERS /DATA SELECTORS1

A multiplexer acce$ts se)eral 'igital 'ata in$uts an' selects one o* t!em to $ass to t!eout$ut+T!e routing o* t!e 'esire' 'ata in$ut to t!e out$ut is controlle' "& t!e SELECT in$uts

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(unctional 'iagram o* a 'igital multi$le#er /MU31+ To%in$ut MU3+ MU3 s&m"ol

28; multi$le#er it! tristate "u**ers Transmission gate multi$le#er

:8; MU3 % 'eco'er tristate "u**ers :8; "& 28; Selection%Deco'er S&m"ol

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To%Le)el J%to%; MU3 J%to%; MU3 @%to%J 'eco'er @ le)el J8; MU3Using Multi$le#ers to Im$lement a (unction

MU3 % logic *unction 'escri"e' "& t!e trut! ta"le+ :%,aria"le (unction

:8; MU3 A-DOne>Kero Detectors

One>ero 'etectors Kero 'etect % -OR *unction

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:%"it e?ualit& com$arator 3-OR gatesMagnitu'e com$arison is usuall& 'one "& com$utingA % " an' loo4ing at t!e sign

ShifterShifters an' rotators mo)e "its an' multi$l& or 'i)i'e "& $oers o* 2+Logical s!i*ters!i*ts t!e num"er to t!e le*t /LSL1 or rig!t /LSR1 an' *ills em$t& s$otsit! 06s+E#8 ;;00; LSR 2 . 00;;0 ;;00; LSL 2 . 00;00Arit!metic s!i*ter on rig!t s!i*ts *ills t!e most signi*icant "its it! a co$& o* t!e mostsigni*icant "it /ms"1+ Use*ul *or multi$l&ing an' 'i)i'ing signe' num"ersE#8 ;;00; ASR 2 . ;;;;0 ;;00; ASL 2 . 00;00Rotatorrotates num"er in circle suc! t!at em$t& s$ots are *ille' it! "its s!i*te' o**t!e ot!er en'+E#8 ;;00; ROR 2 . 0;;;0 ;;00; ROL 2 . 00;;;A rig!t rotation "& n "its o* an n "it or' returns t!e original or' unc!ange'A rig!t rotation "& n%; "its is e?ui)alent to a le*t rotation o* ; "it

A le*t rotation o* F "its is e?ui)alent to a rig!t rotation o* n%F "its S!i*ters

-o$ical )alue s!i*te' in is ala&s 0 Arithmetic on rig!t s!i*ts sign e#ten'

S!i*ter

: "it Le*t>Rig!t S!i*ter

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:%"it s!i*ters8 s!i*t le*t logical s!i*t rig!t arit!metic s!i*t rig!tRotator

: "it rotatorS!i*ter an' rotator

A :%"it s!i*ter > rotator8 o$eration ta"le circuit

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Com"inational S!i*ter im$lemente' it! MU3es

J%"it rig!t s!i*ter Barrel s!i*ter RR @ le)els o* 2%to%; mu#Ho man& le)els *or @2%"it s!i*ter7

A :%"it s!i*ter8 o$eration ta"le circuit

:%"it rig!t s!i*ter N transistor arra& Barrel s!i*ter RR @ le)els o* 2%to%; mu#

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Barrel S!i*terA "arrel s!i*ter is a s!i*ter t!at can s!i*t or rotate t!e 'ata "& an& num"er o* "its in asingle o$eration

:%"it "arrel s!i*ter *or t!e rotate le*t o$eration8 o$eration ta"le circuitS!i*t im$lemente' "& -%"it%i'e multi$le#ers+Sign E#tensionCon)erting *rom smaller to larger integer in 26s com$lement re$resentationGi)en %"it signe' integer # con)ert it to 4%"it integer it! same )alue

Sign E#tension S3 S&m"ol Sign>eroE#ten'erKero e#ten'er *or logic o$erationsT!e E#ten'er ta4es a ;

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Transmitter

Recei)er3OR gates use' to im$lement /a1 t!e $arit& generator an' /"1 t!e $arit& c!ec4er *or ane)en%$arit& s&stem+

O'' an' E)en arit&ARITHMETIC CIRCUITS

Arit!metic unit Hal* A''er ;%"it

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T!e carr&7 (ull A''er (ull A''er ;%"it

ma$s *or t!e *ull%a''er out$uts (ull A''er im$lementationS . =A=BCI- =AB=CI- ABCI- A=B=CI-S . /=A=B AB1CI- /=AB A=B1=CI-S . =/A #or B1 CI- /A #or B1 =CI-S . A #or B #or C

COUT. BCI- ACI- AB

*our%"it $arallel a''er it! registers A B a''er timing

ARALLEL BI-AR ADDER Ri$$le%carr& A''er

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Carr& $ro$agate a''er @2%"it ri$$le%carr& a''er AerSubtractor Combination

Su"tractor o$eration ta"le A''er%su"tractor circuit Carr& Nin LSB.0>;

Arithmetic -o$ic /nit

ALU Ta4e stan'ar' 'igital logic com$onents ; "it ALU A-D OR SUM/A''er A-D OR ++1 connect t!em

ALU s&m"ol ALU o$erations -%"it ALU

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Unsigne' Integer5!en %280 . ;;; t!e ALU $er*orms t!e set if less than /S-01 o$eration+5!enA P "! , . ;+ Ot!erise , . 0+ , is set to ; i*A is less t!an ".SLT is $er*orme' "& com$uting S .A % ".I* S is negati)e /i+e+ t!e sign "it is set1A P ".

T!e zero exten unit $ro'uces an +%"it out$ut "& concatenating its ;%"it in$ut it! 06sin t!e most signi*icant "its+T!e sign "it /t!e +%;t! "it1 o* S is t!e in$ut to t!e ero e#ten' unit+Some ALUs $ro'uce fla$sAn o1erflo2 fla$ in'icates t!at t!e result o* t!e a''er o)er*loe'+A zero fla$ in'icates t!at t!e ALU out$ut is 0+

@2 "it signe' num"ers80000 0000 0000 0000 0000 0000 0000 0000to. 0ten0000 0000 0000 0000 0000 0000 0000 000;to. ;ten0000 0000 0000 0000 0000 0000 0000 00;0to. 2ten

+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++0;;; ;;;; ;;;; ;;;; ;;;; ;;;; ;;;; ;;;0to. 2;:9:J@

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;%"it ALU MSB @2%"it ALUO)er*lo8 Carr&Out MSB #or Carr&In MSB Kero 8 -OR Less SET to LSB

Signe'>Unsigne' integers

T!e ALU control lines8 Ain)ert Bnegate an' O$eration/;801

an' t!e corres$on'ing ALU o$erations ALU s&m"ol

Multiplier

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Multi$lication8 'ecimal "inar&

: # : multi$lier8J%"it result s&m"ol *unction im$lementation

A . :%"it in$ut num"er B . :%"it in$ut num"er C-. carr& into LSB $ositionS . @%"it o$eration select in$uts ( . :%"it out$ut num"erC-: . carr& out o* MSB $osition O,R . o)er*lo in'icatorBloc4 s&m"ol *or 9:LS@J2>HC@J2 ALU c!i$ *unction ta"leE#$an'ing t!e ALU

K; a''s loer%or'er "its+ K2 a''s !ig!er%or'er "its+ Q9NQ0 . J%"it sum+

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O,R o* K2 is J%"it o)er*lo in'icator+To 9:HC@J2 ALU c!i$s connecte' as an eig!t%"it a''er