backhaul solutions

8122019 Backhaul Solutions

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FLEXIBLE SCALABLE OPTIMAL983085

PERFORMANCE HIGHLY INTEGRATED

PORTFOLIO FOR BACKHAUL NETWORKS

Most mobile backhaul networks have evolved into complex combinations of legacy

voice-centric networks and new data-centric packet-switched IP networks Stringentand varied deployments require flexible scalable and high-capacity modems that cansupport multiple bands spectrum-efficient modulation rates and LoSnon-LoSconnections Integrated granular traffic management switching packet processing andOAM functionality have also become vital for meeting strict service-level agreementsand efficiently rolling out new services that effectively monetize investments in

wireless infrastructure

Xilinx All Programmable FPGAs and SoCs and proven IP put wireless networkdesigners a generation ahead The industry-leading 28nm portfolio helps meet fast-changing market requirements with high-performance low-power silicon andproductivity-boosting design tools

Design integration has become a top priority Highly integrated Xilinx devices are lettingdesigners implement more functions with fewer chips As many as seven discreetdevices can be replaced with a single Xilinx Zynqtrade-7000 All Programmable SoC Xilinx 7series FPGAs and SoCs are ideally suited for multi-gigabit wireless modem solutionsWith on-chip packet-processing and traffic management functions Xilinx AllProgrammable devices boost quality of service for converged data and voice traffic

Industry Challenges

bull Exploding mobile data traffic requiresincreased network intelligence and

aggregation capability

bull Co-existence of IP-based and TDM legacy

networks calls for a number of devices on

the backhaul modem baseband board

bull Moving to all outdoor units poses power

challenges

bull Network equipment OEMs are pressed

for year-to-year price decreases

Xilinx Backhaul Solution

bull Flexible and programmable high-bandwidth

modem and packet-processing solutions

for varied and fast-changing backhaul

networks

bull Single-chip solution replacing 7 chips for

lower power smaller form factor and lower

BOM costs

bull Ease of deployment with support for

multiple bands line of sight (LoS) and

non-LoS (NLoS) connections

bull Productivity-increasing design tools to

speed time to market

BACKHAUL SOLUTIONSWIRELESS

NEXT983085GENERATION ldquoALL PROGRAMMABLErdquoBACKHAUL 1024QAM MICROWAVE ANDE983085BAND MODEMS WITH NETWORK AWAREHIGH983085SPEED PACKET PROCESSING



Applications

Point-to-Point Microwave

A 1024QAM modem core is a must have to meet stringent requirements for todayrsquos wireless backhaul networks where reliability timing

and cost constraints are paramount The Xilinx solution supports legacy interfaces such as multiple E1T1 and SDH as well as GigabitEthernet Data rates are scalable to 1Gbps in a single polarization and 2Gbps in dual-polarized mode Enhanced phase noise toleranceenables BOM cost reduction and optimization for end equipment and exploits the benefits of higher-order modulations in field

Supported features


1024QAM MODEM CORE

1024QAM MODEM FEC WRAPPER

T x D D S

Configuration Registers

Interconnect

SPI

Master

SPI

Slave

RS232

Terminal

FT245 or

FT232

VCXO

1

VCXO

0

Embedded

Scope

FT245FT232

Interface DPLL

Delta-Sig

Mod Configuration

uProc

Interconnect

A W G N

R x D D S

D e l t a - S i g

M o d

D o w n s a m p l i n g

amp S h a p e fi l t e r

I n t e r p o l a

t e r

R e e d - S o l o m o n D e c o d e r

F r a m e

T i m i n g

B E R

T e s t e r


F r a m e

T i m i n g

RxPayload

FEC amp ILControl

CW Size CR

UncodedBER

D C O f f s e t

A G C D e t e c t o r

M i x e r

N G C

D D - E Q U

P I L O T S Y N C trade

D e r o t a t o r

F I F O

I F

S t r e a m i n g

F r a m e d I F

S T M - 1

T x

E t h e r n e t T x

M A C

S T M - 1 R x

E t h e r n e t R x

M A C

F I F O

I F

S t r e a m i n g

F r a m e d I F

D e f r a m i n g amp

D e m a p p i n g

D e s c r a m b l e r

D e i n t e r l a c e r

I n t e r l a c e r

P r e - D i s t r o t e r

M i x e r U

p s a m p l i n g


I n t e r p

o l a t e r


txPayload

tx symadj ctrl

Source 1

USBspis IF

spim IF

adc_q

agc

adc_i

STM-1 Tx Data

STM-1 Tx Clock

RGMII Tx

Tx Clock

STM-1 Rx Data

STM-1 Rx Clock

RGMII Rx

Rx Clock

dac_q

tx sym adj

rx sym clk ref clk [10]

dac_i

dac_q

dac_i

r s 2 3 2_

t x

r s 2 3 2_

r x

Source n

F r a m i n g amp

M a p p i n g

S c r a m b l e r

AdaptiveDistortion

ControlACM

P a y l o a d D e M U X

P a y l o a d M U X

POINT983085TO983085POINT MI CROWAVE

bull Interface Parallel IQ baseband complex or real interface

bull Modulation QPSK to 1024QAM

bull Symbol rate Software configurable 2-100 Msyms with sub-MHzprecision

bull FCC and ETSI channels Tested for spectral mask compliance

bull Bandwidth Software configurable 35 to 112MHz (Symbolrate Rolloff)

bull Automatic correction of Tx and Rx quadrature impairments inDSP

bull Group delay equalizer plusmn 600 ps to correct for analog

filter imbalances

bull Adaptive coding and modulation with software-defined profile

bull Closed-loop adaptive digital pre-distortion

bull Reed-Solomon FEC with configurable codeword lengthand payload amount

bull Convolutional interleaver with configurable depth

bull Decision-directed equalizer

bull DPLL module for synchronizing payload clock over linkfor SyncE and SDHTDM

bull Analog AGC control through 1-bit delta-sigma output

bull No software required for DSP core run-time operationbull ATPC closed-loop support in hardware

bull Dual-modem feature in a single FPGA with XPIC (affordabledouble data rate)




UWB MODEM FEC WRAPPER

UWB MODEM TOP

UWB MODEM CORE

SPIMaster

SPISlave

FT245 orFT232R

VCXO

EmbeddedScope

FT245FT232Interface DPLL

∆-sum

ModConfiguration

uProc

Interconnect

LLR

rx_if_clk

rx payload

tx_if_clk

tx payload

UncodedBER

CodingCW len

UWB Receiver(Sample Rate

Domain)

UWB Receiver(Symbol Rate

Domain)

UWB Transmitter(Sample Rate

Domain)

UWB Transmitter(Symbol Rate

Domain)

S t r e a m

P a c k a t i z i n g

R x E t h e r n e t

Q u e u e s

P a c k e t

S t r e a m i n g

T x E t h e r n e t

Q u e u e s

E t h e r n e t R x

M A C

E t h e r n e t T x

M A C

L D P C D e c o d e r

L D P C E n c o d e r

Source 1

USB

AXI MM

spis IF

r e f_

c l k [ 1 0 ]

SPI

ConfigurablePeripherals

adc_gain

adc_i[10][70]

adc_q[10][70]

dac_dclk

rx_dsp_dclk

tx_dsp_dclk

dac_i[10][90]

dac_q[10][90]

adc_clk

21b10

Packet ProcessorInterface


RSGMII Tx

Tx CLK

RSGMII Rx

Rx CLK

tx sym adj

rx sym clk Source n

ACM

NEXT983085GENERATION E983085BAND MODEM

Next-Generation E-Band Modem

Upper millimeter wave bands are a good fit for small cell backhauling where high capacity LoS links can be used for short-haul data

transmission The Xilinx eBand modem supports both point-to-point as well as point-to-multipoint communication modes and scales to 1to 3 Gbps for single polarization

Features

bull QPSK-256QAM modulationbull Up to 436 Msyms in 500MHz channel bandwidth

bull Software configurable CB 50100125150250375500MHz

bull IQ baseband or real interface

bull Rx analog AGC outputs

bull Rx and Tx AFC outputs

bull Tx and Rx imbalance correction

bull Digital automatic frequency recovery

bull Decision directed equalizer

bull LDPC FECbull Adaptive digital closed-loop pre-distortion

bull Adaptive coding and modulation

bull RGMIISGMII GbE interfaces

bull SyncE clock synchronization

bull SPI interface for ATPC messaging between modem and RF

microprocessor

bull TDD and FDD




Software Application Interface

Modular Ethernet Switch

DDR3 Memory Controller

Packet

Processing

ToFrom

Network

OAM and

Protection Switching

Traffic

Manager

110G

Ethernet MAC

+ 1588

+SyncE

Modem IF

ToFrom

Modem

2x SPI 2x UART

2x I2C GPIO

2x CAN2x SDIOw DMA

2x USBw DMA

2x GigEw DMA

Non-Volatile Memory Controller

DRAM Controller(DDR2 DDR3 LPDDR2)

SysMonADC

PCIe S e l e c t I O Packet Processing Switching

QoS and OAMMicrowaveE-Band Modem

(Dual Channel)

S el e c t I O

M GT s

ConfigurationSecurity

AXI Interfaces

for control

configuration

and monitoring

ARMreg Dual Cortextrade-A9 MPCoretradeComplex and System Interconnect

Zynq 7045 Processing System

NANDNORSRAM

QSPI

PACKET PROCESSING SOLUTION

FULLY INTEGRATED MOBI LE BACKHAUL ON A CHI P

Packet Processing

The Xilinx packet processing solution consists of a modular Ethernet switch supporting multiple 1G or 10G ports integrated packet

processing and traffic management quality of service and OAM (IEEE 8021ag and ITU Y1731) functionality This solution frameworksimplifies customization for meeting varied and diverse mobile backhaul requirements

Scalable Devices for

Functional ConsolidationFor mobile backhaul equipment XilinxFPGAs and SoCs let designers choosethe level of performance power andintegration that matches the designrequirements The 28nm devices design

tools IP design services and third-partyecosystem put designers a generationahead with capacity to build in highercapacity more network intelligence andtraffic management Xilinx modem andpacket-processing solutions offer a

choice of device

bull Artix-7 Ideal for low-bandwidth (740DSP slices)

bull Kintex-7 Higher performance (1920DSP slices)

bull Zynq-7000 Highest integration SoC

(4000 DMIPS processor up to 16 125Gbs GT)

Corporate Headquarters

Xilinx Inc2100 Logic DriveSan Jose CA 95124USATel 408-559-7778wwwxilinxcom

Europe

Xilinx EuropeOne Logic DriveCitywest Business CampusSaggart County DublinIrelandTel +353-1-464-0311wwwxilinxcom

Japan

Xilinx KKArt Village Osaki Central Tower 4F1-2-2 Osaki Shinagawa-kuTokyo 141-0032 JapanTel +81-3-6744-7777 japanxilinxcom

Asia Pacific Pte Ltd

Xilinx Asia Pacific5 Changi Business Park Singapore 486040Tel +65-6407-3000wwwxilinxcom

copy Copyright 2013 Xilinx Inc XILINX the Xilinx logo Virtex Spartan ISE and other designated brands included herein aretrademarks of Xilinx in the United States and other countries All other trademarks are the property of their respective owners

Printed in the USA PN 2528-1

Take the NEXT STEP

Visit wwwxilinxcom to learn more about the Xilinx wireless communications product portfolio and All Programmable FPGAs 3D ICsand SoCs

On a single Xilinx Zynq-7000 All Programmable SoC designers can implement the functionality that typicallyspans 2 modem chips (FPGAs ASICs or ASSPs) 2 PHY devices 1 control plane processor 1 Ethernetswitch with integrated traffic management and 1 timing and synchronization device



Applications

Point-to-Point Microwave

A 1024QAM modem core is a must have to meet stringent requirements for todayrsquos wireless backhaul networks where reliability timing

and cost constraints are paramount The Xilinx solution supports legacy interfaces such as multiple E1T1 and SDH as well as GigabitEthernet Data rates are scalable to 1Gbps in a single polarization and 2Gbps in dual-polarized mode Enhanced phase noise toleranceenables BOM cost reduction and optimization for end equipment and exploits the benefits of higher-order modulations in field

Supported features


1024QAM MODEM CORE

1024QAM MODEM FEC WRAPPER

T x D D S

Configuration Registers

Interconnect

SPI

Master

SPI

Slave

RS232

Terminal

FT245 or

FT232

VCXO

1

VCXO

0

Embedded

Scope

FT245FT232

Interface DPLL

Delta-Sig

Mod Configuration

uProc

Interconnect

A W G N

R x D D S

D e l t a - S i g

M o d

D o w n s a m p l i n g


I n t e r p o l a

t e r


F r a m e

T i m i n g

B E R

T e s t e r


F r a m e

T i m i n g

RxPayload

FEC amp ILControl

CW Size CR

UncodedBER

D C O f f s e t

A G C D e t e c t o r

M i x e r

N G C

D D - E Q U


D e r o t a t o r

F I F O

I F

S t r e a m i n g

F r a m e d I F

S T M - 1

T x

E t h e r n e t T x

M A C

S T M - 1 R x

E t h e r n e t R x

M A C

F I F O

I F

S t r e a m i n g

F r a m e d I F

D e f r a m i n g amp

D e m a p p i n g

D e s c r a m b l e r

D e i n t e r l a c e r

I n t e r l a c e r

P r e - D i s t r o t e r

M i x e r U

p s a m p l i n g


I n t e r p

o l a t e r


txPayload

tx symadj ctrl

Source 1

USBspis IF

spim IF

adc_q

agc

adc_i

STM-1 Tx Data

STM-1 Tx Clock

RGMII Tx

Tx Clock

STM-1 Rx Data

STM-1 Rx Clock

RGMII Rx

Rx Clock

dac_q

tx sym adj

rx sym clk ref clk [10]

dac_i

dac_q

dac_i

r s 2 3 2_

t x

r s 2 3 2_

r x

Source n

F r a m i n g amp

M a p p i n g

S c r a m b l e r

AdaptiveDistortion

ControlACM

P a y l o a d D e M U X

P a y l o a d M U X

POINT983085TO983085POINT MI CROWAVE

bull Interface Parallel IQ baseband complex or real interface

bull Modulation QPSK to 1024QAM

bull Symbol rate Software configurable 2-100 Msyms with sub-MHzprecision

bull FCC and ETSI channels Tested for spectral mask compliance

bull Bandwidth Software configurable 35 to 112MHz (Symbolrate Rolloff)

bull Automatic correction of Tx and Rx quadrature impairments inDSP

bull Group delay equalizer plusmn 600 ps to correct for analog

filter imbalances

bull Adaptive coding and modulation with software-defined profile

bull Closed-loop adaptive digital pre-distortion

bull Reed-Solomon FEC with configurable codeword lengthand payload amount

bull Convolutional interleaver with configurable depth

bull Decision-directed equalizer

bull DPLL module for synchronizing payload clock over linkfor SyncE and SDHTDM

bull Analog AGC control through 1-bit delta-sigma output

bull No software required for DSP core run-time operationbull ATPC closed-loop support in hardware

bull Dual-modem feature in a single FPGA with XPIC (affordabledouble data rate)





UWB MODEM TOP

UWB MODEM CORE

SPIMaster

SPISlave

FT245 orFT232R

VCXO

EmbeddedScope


∆-sum

ModConfiguration

uProc

Interconnect

LLR

rx_if_clk

rx payload

tx_if_clk

tx payload

UncodedBER

CodingCW len


Domain)


Domain)


Domain)


Domain)

S t r e a m


R x E t h e r n e t

Q u e u e s

P a c k e t

S t r e a m i n g

T x E t h e r n e t

Q u e u e s

E t h e r n e t R x

M A C

E t h e r n e t T x

M A C



Source 1

USB

AXI MM

spis IF

r e f_

c l k [ 1 0 ]

SPI


adc_gain

adc_i[10][70]

adc_q[10][70]

dac_dclk

rx_dsp_dclk

tx_dsp_dclk

dac_i[10][90]

dac_q[10][90]

adc_clk

21b10



RSGMII Tx

Tx CLK

RSGMII Rx

Rx CLK

tx sym adj

rx sym clk Source n

ACM





Features














microprocessor

bull TDD and FDD







Packet

Processing

ToFrom

Network

OAM and


Traffic

Manager

110G

Ethernet MAC

+ 1588

+SyncE

Modem IF

ToFrom

Modem

2x SPI 2x UART

2x I2C GPIO

2x CAN2x SDIOw DMA

2x USBw DMA

2x GigEw DMA



SysMonADC



(Dual Channel)

S el e c t I O

M GT s


AXI Interfaces

for control

configuration

and monitoring



NANDNORSRAM

QSPI



Packet Processing






choice of device







Europe


Japan






Take the NEXT STEP







UWB MODEM TOP

UWB MODEM CORE

SPIMaster

SPISlave

FT245 orFT232R

VCXO

EmbeddedScope


∆-sum

ModConfiguration

uProc

Interconnect

LLR

rx_if_clk

rx payload

tx_if_clk

tx payload

UncodedBER

CodingCW len


Domain)


Domain)


Domain)


Domain)

S t r e a m


R x E t h e r n e t

Q u e u e s

P a c k e t

S t r e a m i n g

T x E t h e r n e t

Q u e u e s

E t h e r n e t R x

M A C

E t h e r n e t T x

M A C



Source 1

USB

AXI MM

spis IF

r e f_

c l k [ 1 0 ]

SPI


adc_gain

adc_i[10][70]

adc_q[10][70]

dac_dclk

rx_dsp_dclk

tx_dsp_dclk

dac_i[10][90]

dac_q[10][90]

adc_clk

21b10



RSGMII Tx

Tx CLK

RSGMII Rx

Rx CLK

tx sym adj

rx sym clk Source n

ACM





Features














microprocessor

bull TDD and FDD







Packet

Processing

ToFrom

Network

OAM and


Traffic

Manager

110G

Ethernet MAC

+ 1588

+SyncE

Modem IF

ToFrom

Modem

2x SPI 2x UART

2x I2C GPIO

2x CAN2x SDIOw DMA

2x USBw DMA

2x GigEw DMA



SysMonADC



(Dual Channel)

S el e c t I O

M GT s


AXI Interfaces

for control

configuration

and monitoring



NANDNORSRAM

QSPI



Packet Processing






choice of device







Europe


Japan






Take the NEXT STEP









Packet

Processing

ToFrom

Network

OAM and


Traffic

Manager

110G

Ethernet MAC

+ 1588

+SyncE

Modem IF

ToFrom

Modem

2x SPI 2x UART

2x I2C GPIO

2x CAN2x SDIOw DMA

2x USBw DMA

2x GigEw DMA



SysMonADC



(Dual Channel)

S el e c t I O

M GT s


AXI Interfaces

for control

configuration

and monitoring



NANDNORSRAM

QSPI



Packet Processing






choice of device







Europe


Japan






Take the NEXT STEP



backhaul solutions

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