automotive 32-bit microcontroller technology & product roadmap · automotive 32-bit...

Automotive 32-bit Microcontroller

Technology & Product Roadmap

2017年ST汽车MCU技术日2017年6月6日，上海2017年6月8日，深圳

2017年6月13日，北京

LIU Shan Lin

Marketing Manager, Micro BU

ADG Marketing and Application

Greater China & South Asia Region

STMicroelectronics

Market Drivers

Increase Levels of Security Level

Increase Levels of Safety

Increase Product

Scalability

Ensure Price competitiveness

Increase Networking Capability

Increase Quality levels

Increase Processing Power

Automotive MCU Market Drivers 2

32-bit Automotive Microcontrollers 3

Market coverage

EV’s Battery Management

Braking

General Purpose

Performance

EV’sPower

Converters(DC-DC)

RADAREngine

Management

Transmission

2

Wheelers

1st

Install

Access

ories

Park Pilot

& Rear Camera

Lighting & Body

control units

Over-the-air update

in-carGateways

Scalable family to cover

car networks, interiors and

car body applications with

Security and ISO CAN-FD

High performance

multicores

with dedicated timing unit,

Security and ASIL-D Safety

Enabled by an extensive

support ecosystem for

tools and software

More than

200 part

numbers

Available

Crolles

Internal Manufacturing

High performance General Purpose

More than

150M parts

shipped

Zero ppm target

Professional Tools and

Software Offer

Technology Roadmap

Automotive Technology Roadmap 5

Embedded NVM

STMicroelectronics, CMOS Headquarters,

200mm/300mm wafer fabs, Crolles, France

PRODUCTIONM10

(90 nm)

0.18 mm2

Flash cell

PRODUCTIONM55

(55 nm)

0.135 mm2

Flash cell

RAMP-UPM40

(40 nm)

0.082 mm2

Flash cell

1-Transistor

NOR Flash

Under

DevelopmentIn-house Embedded NVM

Development & Manufacturing in

Advanced 300mm Wafer Fab

Automotive package roadmap 6

eQFP

BGA

QFN QFN Dual Row

Perf

orm

ance

Wire bonding

Today Roadmap

Flip-chip

Metal-Lid

Exposed

System in Package

Passive

integration

ST leading the way towards smaller, faster and cooler MCU

Sm

all

Effic

ient

Pin

s v

s S

ize

Up to 4Mbyte Flash

in 10x10 64Pin

7x7 Body- 48Pins

Higher Freq

Better Safety

Better Thermal

Performance

R

QFP

More I/Os same size

eQFP

BGA

32-bit Automotive MCU Roadmap

32-bit Automotive Microcontroller Roadmap 8

2014 2016 2018 2020

SPC56 (90nm) SPC57 (55nm) SPC58 (40nm) Sxx (28nm)

Silicon technology CMOSM10… P28…

System, softwareSingle to Multicore

Full Autosar

Safety, SecurityISO26262 ASIL A-D / Fail Operational

HSM / SHE+

Quality and Reliability Top ranking Zero Defect Strategy

Manufacturig Flexible and Independent Manufacturing

In Production In Design / Qualif Conceptual Design

32-bit Automotive MCU Roadmap 9

Full roadmap view

1st Generation 2nd Generation

Extended functionality and increased performance

2nd Generation+ products recommended for new designs

Pictus64MHz, 2x z0

QFP100/144

Monaco80MHz, z3

QFP144/176

Bolero120MHz, z4+z0

QFP176/208

BGA256

Andorra150MHz, z4

QFP176/BGA324

Leopard120MHz, 2x z4

QFP100/144

Bernina 200MHz, 3x z4

Bolero B64MHz, z0

QFP64/100/144

Bolero 64MHz, z0

QFP100/144/176

Chorus 200MHz, 3x z4

QFP144/176

BGA292/376

High Performance, Safety critical MCU

General Purpose, Body & Gateway MCU

Pictus64MHz, z0

QFP64/100/144

Bolero D64MHz, z0

QFP64/100

Lavaredo80MHz, z2

K2160MHz, z4+z2

Resourc

es &

Perf

orm

ance

Eiger180MHz, 3 x z4

QFP176/BGA292

KGD

QFP176/BGA292

KGD

QFP144/176

KGD

QFP80/100


QFP144/176

BGA292


QFP64/100/144/176

BGA292

Sphaero140MHz, z4

QFP100/144

Velvety80MHz, z0

QFP64/100

Chorus 120MHz, z4

QFP64/100/144/176

Chorus 80MHz, z2

QFP64/100

ASIL D

ASIL DASIL D

ASIL D

ASIL D

ASIL D

ASIL D

HW Security

Design

Sampling

Qualified

Concept

D

C

SD

S

6MB

4MB

3MB

2MB

1MB

512k

10MB

16MB

128k

400MHz

48MHz

64MHz

80MHz

200MHz

120MHz

180MHz

ASIL D

D

D

ASIL B

ASIL B

ASIL B

General Purpose - Body & Gateway

32-bit MCUs Roadmap





General purpose / body and gateway roadmap view

Bolero120MHz, z4+z0

QFP176/208

BGA256

Bolero B64MHz, z0

QFP64/100/144

Bolero 64MHz, z0

QFP100/144/176

General Purpose, Body & Gateway MCU

Bolero D64MHz, z0

QFP64/100

256K

128K

512K

376K

192K

1.5MB

1MB

768K

2MB

1.5MB

3MB

Resourc

es &

Perf

orm

ance

HW Security

Design

Sampling

Qualified

Concept

D

C

S


QFP144/176

BGA292/376


QFP144/176

BGA292


QFP64/100/144/176

BGA292

Chorus 120MHz, z4

QFP64/100/144/176

Chorus 80MHz, z2

QFP64/100

ASIL D

ASIL D

D

S

ASIL B

ASIL B

ASIL B

Bolero Family 12

Product Roadmap – B, C, D lines

QFP176 /208 – BGA25664/100/144 PIN QFP

64/100 PIN QFP

100/144/176 QFP

4M

6M

8M

3M

2M

1.5

M1

M7

68

K5

12

K3

84

K2

56

K1

92

K1

28

K

LQFP100 / LQFP144 / LQFP176LQFP64 /LQFP100 LQFP176 / LQFP208 / LBGA256

Body Access

SPC560D• e200z0h core (48MHz)

• 256KB Flash w/ ECC

• 4x16KB Data Flash

(RWW) w/ ECC

• 16KB SRAM

• 1x CAN

• 3x LINFlex

• 2x SPI

• 1x 12-bit ADC (S&H)

SPC560D40256K Flash 16KRam

SPC560D30128K Flash 12KRam

Bolero - SPC560B• e200z0h core (64MHz)

• 1.5MB Flash w/ ECC

• 4x16KB Data Flash

(RWW) w/ ECC

• 96KB SRAM w/ ECC

• 6x CAN, 10x LINFlex

• 6x SPI, 1x I²C

• 1x 10-bit, 1x 12-bit ADC (S&H)

SPC560B641.5MFlash 96KRam

SPC560B601MFlash 80KRam

SPC560B54768KFlash 64KRam

Bolero(B)&

Gateway(C)

SPC560B/C• e200z0h core (64MHz)

• 512KB Flash w/ ECC

• 4x16KB Data Flash (RWW) w/ ECC

• 48KB SRAM w/ ECC

• 6x CAN, 4x LINFlex

• 3x SPI, 1x I²C


SPC560B/C50512K Flash 32/48KRam

SPC560B/C40256K Flash 24/32KRam

Bolero(B)&Gateway(C)

SPC564B/EC

• e200z4d core (120MHz)

• e200z0h as second core (80MHz)

• 3MB Flash w/ ECC

• 4x16KB Data Flash (RWW) w/ ECC

• 256KB SRAM

• 1x 10-bit, 1x 12-bit ADC (S&H)

• 6x FlexCAN, 10xLINFlex

• FlexRay

• Ethernet

• Cryptographic Services Engine (CSE)

SPC56EC743MFlash 256KRam

SPC56EC641.5MFlash 192KRam

SPC56EC702MFlash 256KRam

SPC564B641.5MFlash 128KRam

SPC564B702MFlash 256KRam

Chorus Family 13

Product Roadmap

QFP176 /208 – BGA25664/100/144 PIN QFP64/100 PIN QFP 100/144/176 QFP 80MHz 120MHz 2x 180MHz 3x 180MHz

SPC58NG804MFlash / 768KRAM

SPC58NG846MFlash / 768KRAM

• 3x z4 core @180MHz

• 256Kdata flash

• COM: 8 / 18 / 2 / 1 / 10

• HSM (Evita Medium)

• ASIL-D

• QFP144 / 176 / BGA292

COM: CAN / LIN / ETH / FR / SPI

1M

1.5

M2M

3M

4M

6M

8M

10M

8M

6M

4M

3M

2M

1.5

M1M

76

8K

512K

SPC582B50512KFlash / 64KRAM

SPC582B54768KFlash / 80KRAM

SPC582B601MFlash / 96KRAM

• z2 core @80Mhz

• 64Kdata flash

• COM: 7 / 6 / 0 / 0 / 4

• ASIL-B

• QFN48 / QFP64 / 100

SPC584B641.5MFlash / 160KRAM



SPC584B70 • z4 core @120Mhz

• 64Kdata flash

• COM: 8 / 14 / 1 / 0 / 7


• ASIL-B

• QFP64 / 100 / 144 / 176

• 2x z4 core @180Mhz

• 128Kdata flash

• COM: 8 / 18 / 1 / 1 / 8


• ASIL-B

• QFP64 / 100 / 144 / 176

• BGA292

SPC58EC804MFlash / 512KRAM



3x 200MHz

SPC58NH846MFlash / 768KRAM

SPC58NH908MFlash / 1MRAM

• 3x z4 core @200MHz

• 256Kdata flash

• COM: 12 / 28 / 2 / 1 / 10

• Gigabit Ethernet

• OTA (flash context switch)

• eMMC / HyperFlash

• USB (no PHY)

• HSM (Evita Full)

• ASIL-D

• QFP144 / 176

• BGA292 / 376

SPC58NH9210MFlash / 1,28MRAM

SPC58EC80

SPC58NG84

SPC58NH92

SPC582B60

Chorus Family 14

Number 1 in Gateway Market

Chorus family designed in more than 50% of new gateway generation

Vehicle Software

Update over-the- air

FOTA

BGA292/376 eQFP64-176

Gateway

MCU

Gateway + OTA

storage MCU

eMMC

1Gbyte

Advanced

in-car

networking

Body Units

Networking Scalability

Single, dual and triple cores

Up to 200MHz operation

Memory from 512Kbyte to 10Mbyte

Security & Safety

ASIL-B / ASIL-DEvita

Medium/Full

Package Options

QFN48

http://www.opensig.org/

http://www.opensig.org/

• Embedded Memory and performance• up to 10M flash / 1.28MRAM

• Single core, dual core and triple core platform up to 200MHz

• Data and instruction cache as well as local data RAM to avoid waitstates at max freq.

• Rich set of automotive network protocols• Up to 12x CAN with ISO CAN FD

• 2x Ethernet 10/100Mb/1Giga bit/s

• FlexRay dual channel

• Up to x 28 LIN interfaces

• Peripherals• eMIOS timer with 96ch combined with Cross Triggering Unit

• ADC: 4x 12-bit / 1x 12-bit supervisor / 1x 10-bit Standby

• Up to 10 SPI

• Miscellaneous• Security: HSM up to Evita Full

• FOTA: Flash context switching

• External memory interface: eMMC, HyperFlash, Fast SPI

15

Chorus FamilySystem Integration

• Chorus provides extended scalability within the family by offering

• Wide range of packages from QFN48 to eTQFP176 and BGA376

• Compatible pinout from 512kB Flash up to 10MB Flash devices

• Aligned cores and platform architecture

• Common peripherals set and memory mapping

• Easy migration path from Bolero products

• Reuse of well adopted Bolero peripherals like eMIOS/CTU, LINFlex, DSPI

• Maintained Low Power concept with the Mode Entry and Standby domain

• Extended standby capability with the Smart Standby Unit for autonomous Contact Monitoring handling

• Development and Programming Tools

• Compiler, debugger and programmers can be reused

• 2-pin JTAG supported with backwards compatibility in 5-pin mode as for Bolero

16

Chorus FamilyScalability & Compatibility

Chorus 1M SPC582B60 18

Block Diagram (superset)

Freq. max Voltage Temp. ASIL I/O Package

80MHz 5V / 3.3V -40 / +125°C B 80 48 /64/100

Core

• 80 MHz Power Architecture™ ISA e200z2 Core (VLE)• Single Issue Core with

Floating Point Unit

Memory

• 1M byte RWW Flash with ECC

• 4x16k Data Flash with ECC

• 96k RAM with ECC

I/O

• 7 x MCAN / ISO CAN-FD

• 6 x LINFlex

• 4 x DSPI

• 1 x I2C

• 1x 32ch eMIOS

• 32ch CTU (Cross Triggering Unit)

• 32 channel ADC• 1x 12-bit ADC

System

• FM-PLL

• MPU

• 16 Channel eDMAController

• 2 x CRC Unit

• Fault Collection & Control Unit

• 8 x PIT / 1x STM / 1x RTC/API

• Nexus IEEE-ISTO 5001-2010 Class 2+

16

eD

MA

Crossbar Switch

Debug

JTAG

NexusIEEE-ISTO

5001-2010

Power

Architecture™

e200z2

VLE

FPUSWT

STM

INTC

8x

PIT

FM

PL

L

1x 1

2b

it AD

C

1x

I2C

7x

MC

AN

6x

LIN

Fle

x

4x

DS

PI

eM

IOS

32

ch

RT

C/A

PI

CT

U 3

2ch

Memory Protection Unit

2x

CR

C

FC

CU

AIP

S

1M

FLASH

64k Data

FLASH

96k

S-RAM

Memory Timer PeripheralsSystem Platform

Available

Chorus 2M SPC584B70 19


Core

• 120 MHz Power Architecture™ ISA e200z4 Core (VLE)• Dual Issue Core with Floating

Point Unit• 8k-Instruction Cache, 4k-Data

Cache• 64k Local d-RAM

Memory



• 192k RAM (128k SRAM, 64k Local d-RAM) with ECC

I/O

• 8 x MCAN / FD-CAN

• 14 x LINFlex

• 1 x Ethernet (100Mb/s, time stamping, AVB, IPv4 Checksum)

• 7 x DSPI

• 1 x I2C

• 2x 32ch eMIOS


• 64 channel ADC• 1x 12-bit ADC• 1x 12-bit ADC Supervisor

System

• SSWU (Smart Standby Wake-up)

• Security Module: HSM (Evita Medium)

• FM-PLL

• MPU

• 32 Channel eDMA Controller

• 2 x CRC Unit





ET

H

32

eD

MA

Debug

JTAG

NexusIEEE-ISTO

5001-2010

Power

Architecture™

e200z4

8k-I/4k-DCache

VLE

FPUSWT

STM

INTC

2x

CR

C

6x

PIT

FM

PL

L

1x

I2C

8x

MC

AN

12

x L

INF

lex

7x

DS

PI

eM

IOS

32

ch

eM

IOS

32

ch

FC

CU

RT

C/A

PI

CT

U 6

4ch

HS

M

D-RAM

AIP

S

AD

C

1x 1

2-b

it

AD

C S

up

erv

iso

r

Crossbar Switch


2M

FLASH

64k Data

FLASH

128k

S-RAM


120MHz 5V / 3.3V -40 / +125°C B 150 64/100/144/176

Design

Chorus 4M SPC58EC80 20


Core

• 180MHz Power Architecture™ ISA e200z4 Core (VLE)• Dual Issue Core with Floating

Point Unit• 8k-Instruction Cache, 4k-Data


• 180MHz Power Architecture™ ISA e200z4 Core (VLE)• Dual Issue Core with Floating

Point Unit • 8k-Instruction Cache, 4k-Data


Memory



• 512k RAM (384k SRAM, 2x 64k Local d-RAM) with ECC

I/O


• 18 x LINFlex


• Dual Channel FlexRay (10MB/s,128 buffers )

• 8 x DSPI, 1 x I2C2x 32ch eMIOS


• 95 channel ADC• 3x 12-bit ADC• 1x 12-bit ADC Supervisor• 1x 10-bit Standby ADC

System



• FM-PLL

• MPU


• 2 x CRC Unit

• Fault Collection & Control Unit (incl. error pin)

• 8x PIT / 1x STM / 1x RTC/API


Power

Architecture™

e200z4

8k-I/4k-DCache

VLE

FPUSWT

STM

INTC

2x

CR

C

8x

PIT

FM

PL

L

1x

I2C

8x

MC

AN

16

x L

INF

lex

8x

DS

PI

eM

IOS

32

ch

eM

IOS

32

ch

FC

CU

CT

U 6

4ch

D-RAM

AIP

S

AD

C(S

TB

Y)

1x 1

2-b

it

AD

C S

up

erv

iso

r

Crossbar Switch


4M

FLASH

128k Data

FLASH

128k

S-RAM

256k

S-RAM

Fle

xR

ay

ET

H

64

eD

MA

HS

M

Power

Architecture™

e200z4

VLE

FPUSWT

STM

D-RAM

8k-I/4k-DCache INTC

AIP

S

AD

C

3x 1

2-b

it

Debug

JTAG

NexusIEEE-ISTO

5001-2010


180MHz 5V / 3.3V -40 / +125°C B 215 64/100/144/176/292


Available

Chorus 6M SPC58NG84 21


Power

Architecture™

e200z4

INTC

FC

CU

ME

MU

Fle

xR

ay

2x

ET

H

LF

AS

T

64

eD

MA

HS

M

Power

Architecture™

e200z4

VLE

FPUSWT

STM

I-RAM

D-RAMLSP

1x

I2C

8x

M-C

AN

18

x L

INF

lex

7x

DS

PI


Crossbar SwitchCrossbar Switch


Power

Architecture™

e200z4

8k-I/4k-DCache

VLE

FPUSWT

STM

I-RAM

D-RAM

2x

µS

B

RAM Ctrl RAM Cont.FLASH Cont. FLASH Cont.

288k

S-RAMA

IPS

8x

PIT

FM

PL

L

320k

S-RAM

2x

Ts

en

s

2x

CR

C

6M

FLASH

256k Data

FLASH

8k-ICache

AIP

S

CT

U

eM

IOS

32

ch

eM

IOS

32

ch

AD

C S

up

erv

iso

r

AD

C

4x 1

2-b

it

AD

C (S

TB

Y)

1x 1

0-b

it

Power

Architecture™

e200z4

8k-I/4k-DCache

VLE

FPUSWT

STM

I-RAM

D-RAM

JTAG/Debug

NexusIEEE-ISTO

5001-2010

INTC

Core

• 180MHz Power Architecture™ ISA e200z4 Core (VLE)• Floating Point Unit• 8k-Instruction Cache, 4k-Data

Cache• 16k Local i-RAM, 64k Local d-RAM• Lock Step (optional)

• 180MHz Power Architecture™ ISA e200z4 Core (VLE)• Floating Point Unit• 8k-Instruction Cache, 4k-Data

Cache• 16k Local i-RAM, 64k Local d-RAM

• 180MHz Power Architecture™ ISA e200z4 Core (VLE)• Floating Point Unit & LSP(DSP)• 8k-Instruction Cache• 16k Local i-RAM, 32k Local d-RAM

Memory

• 6M byte RWW Flash with ECC • 4x64k Data Flash with ECC

• 768kRAM (608k SRAM + 160k d-RAM) with ECC• Including 256k Standby

I/O


• 18 x LINFlex


• Dual Channel FlexRay (10MB/s, 128 buffers)

• 10 x DSPI, 1 x I2C

• 2x 32ch eMIOS


• 86 channel ADC• 4x 12-bit ADC• 1x 12-bit ADC Supervisor• 1x 10-bit Standby ADC

System



• FM-PLL

• MPU


• 2 x CRC Unit



• 1x LFAST (Interprocessor bus)

• Nexus IEEE-ISTO 5001-2010 Class 3+ (Aurora interface) Freq. max Voltage Temp. ASIL I/O Package

180MHz 5V / 3.3V -40 / +125°C D 205 144/176/292


Available

ASIL-D

High Performance - Safety Critical

32-bit MCUs Roadmap





High Performance - Safety Critical MCUs

Pictus64MHz, 2x z0

QFP100/144

Monaco80MHz, z3

QFP144/176

Andorra150MHz, z4

QFP176/BGA324

Leopard120MHz, 2x z4

QFP100/144

High Performance, Safety critical MCU

Pictus64MHz, z0

QFP64/100/144

3MB

2MB

4MB

1MB

768K

512K

376K

192K

Resourc

es &

Perf

orm

ance

1MB

1.5MB

1MB

768K

ASIL D

2MB

HW Security

Design

Sampling

Qualified

Concept

D

C

S

Bernina 200MHz, 3x z4

Lavaredo80MHz, z2

1.5MB

1MB

K2160MHz, z4+z2

2MB

Eiger180MHz, 3 x z4

QFP176/BGA292

KGD

4MB 4MB

QFP176/BGA292

KGD

QFP144/176

KGD

QFP80/100

Sphaero140MHz, z4

1MB

QFP100/144

Velvety80MHz, z0

512k

256k

QFP64/100

ASIL D

6MB

ASIL D

ASIL D

1.5MB

6MB

ASIL D

2.5MB

ASIL D

D

D

Double Core

High Performance - Safety Critical MCUs 24

Product Roadmap – P, L lines

QFP176 /208 – BGA25664/100/144 PIN QFP 100/144/176 QFP LQFP100 / LQFP144LQFP64 /LQFP100 LQFP100 / LQFP144

4M

3M

2M

1.5

M1

M7

68

K5

12

K3

84

K2

56

K1

92

K

SPC560P40256KFlash / 20KRam

Pictus - SPC560P• up to 64 MHz Power Architecture

• e200z0h core

• 512KB Program Flash with ECC

• 4x16KB EEPROM Flash with ECC

• 40KB SRAM with ECC

• 2 x CAN

• 1 x FlexRay

• 2 x LINFlex

• 4 x SPI

• 2 x 10-bit ADC (S&H)




Pictus - SPC56AP/0P

• up to 64 MHz Power Architecture

• Single and Dual e200z0h core

• 1MB Program Flash with ECC

• 4x16KB EEPROM Flash w ECC


• 3 x CAN

• 1 x FlexRay

• 2 x LINFlex, 5 x SPI

• 2x 10 Bit ADC (S&H)

SPC56AP601MFlash / 80KRam

SPC56AP54768KFlash / 64KRam


SPC560P601MFlash / 80KRam

Leopard - SPC56EL/4L

• up to 120MHz Power Architecture

• Single (4L) and Dual (EL) e200z4d core

• Lock Step and Decoupled Parallel modes

• 2MB RWW Flash with ECC


• EE emulation

• 3 x CAN, 1 x FlexRay, 2 x LINFlex, 3 x SPI

• 2 x 12-bit ADC (S&H)

SPC564L702MFlash / 192KRam

Dual Core

Safety ASIL level D

SPC56EL702MFlash / 192KRam

SPC564L601MFlash / 128KRam

SPC564L54768kFlash / 96KRam

SPC56EL54768kFlash / 96KRam

SPC56EL601MFlash / 128KRam

High Performance - Safety Critical MCUs 25

Product Roadmap – M, A lines

QFP176 /208 – BGA25664/100/144 PIN QFP 100/144/176 QFP

4M

3M

2M

1.5

M1

M7

68

K5

12

K3

84

K2

56

K1

92

K

LQFP176 / PBGA324LQFP144 / LQFP176

SPC563M641.5MFlash/94K+17kRam

Monaco - SPC563M

• e200z3 core (80MHz)

• 1.5MB RWW Flash with ECC


• 2x CAN

• 2x SCI

• 2x SPI


SPC563M601MFlash/64K+17kRam

SPC564A743MFlash / 160K+17kRam


Andorra - SPC564A• e200z4d core (150MHz)

• 4MB RWW Flash with ECC


• 3x CAN

• 3x SCI

• 3x SPI

• FlexRay



Velvety – 0.5M SPC570S50 26

Superset Block Diagram

• Core

• Up to 80 MHz Power Architecture™ ISA e200z0 Core (VLE)

• ASILD SEooC

Memory

• 512k byte Flash with ECC

• 4x8k Data Flash with ECC (1 RWW partition)

• 48k SRAM with ECC

• Crossbar with MPU (8 regions) w. process ID support

I/O

• 2x FlexCAN with 32MB

• 2 x LINFlex

• 3x DSPI

• 4 x eTimer (6ch each)

• ADC – 1+1 x 12Bit, up to 16Ch.

• fast 10Bit conversion & supervisor ADC concept

• 1 x ADC cross triggering unit (CTU)

System

• 16ch eDMA (lockstep)

• CRC Unit (2Ch.)


• Software watchdog timer (inc. window mode, flow monitoring)

• Temperature Sensor

• 3.3V or 5Vsingle supply

• FM-PLL and 16MHz internal RC OSC

• Nexus Class 3 / JTAG (2 pin or 5 pin) / Trace Port (4MDO)

• 64/100 pins LQFP package ePAD

• -40oC - + 150°C Tj / 165°C Tj

superv.

Debug

JTAG

Nexus


Crossbar Switch

512K

4x 8k

FLASH

48K

SRAM

FMPLL

IRC

1*

LIN

Fle

x

1*D

SP

I

2*D

SP

I

1*

LIN

Fle

x

FCCU

MEMU

16

eD

MA

1*

Fle

xC

AN

1*

Fle

xC

AN

Product / Application Specific Memory ConnectivitySystem / Platform

˙˙˙

1*

ADC

2*e

Tim

er

2*e

Tim

er

CTU

1 * PITCRC TSENS

Periph.

Bridge

INTC

Power Architecture™

e200z0

VLE

INTC

STM

SWT

Periph.

Bridge

TSENS

Qualified

ASIL-D

Qualified

Sphaero – 1.5M SPC574S64 27


Core

• Up to 140 MHz Power Architecture™ ISA e200z4 Core (VLE)

• Dual Issue Core with Floating Point Unit

• 12k Cache (8k-Instruction Cache, 4k-Data Cache)

• 32k TCM (32k d-RAM)

• ASILD SEooC

Memory

• 1.5Mbyte + 4x16k Flash with ECC (1 RWW )

• 128k RAM with ECC (96k SRAM + TCM)

• Crossbar with MPU (16 regions)

I/O

• 1 x FlexRay Dual Channel with 128MB (optional)

• 3x ISO CAN FD

• 4 x LINFlex (3x master only)

• 4 x DSPI

• 2 x SENT (2x3ch overall)

• 2 x FlexPWM (4x3ch each) + 2 x FlexPWM (2ch each)

• 4 x eTimer (6ch each)

• ADC – 2x (3+1)x 12Bit, 18/32/33Ch. (on QFP100/144/BGA)

• fast 10Bit conversion & supervisor ADC concept

• 2 x ADC enh´d cross triggering unit (eCTU)

System

• 16Ch eDMA

• CRC Unit


• Software watchdog timer (inc. window mode, flow monitoring)

• 3.3V or 5V advanced supply (internal or external logic supply)

• FM-PLL, FlexRay PLL and 16MHz internal RC OSC

• Nexus Class 3+ / JTAG (2 pin or 5 pin)

• 100-144 pins LQFP package (0.5mm pitch)

• -40oC - + 150oC Tj

superv.superv.

Debug

JTAG

Nexus


Crossbar Switch

1.5M

4x 16k

FLASH

96K

SRAM

FMPLL

IRC

2*

LIN

Fle

x

1* SENT

2*D

SP

I

2*D

SP

I

2*

LIN

Fle

x

FCCU

MEMU

1*F

lexR

ay

16

eD

MA

1* SENT

2*

MC

AN

1*

MC

AN

Product / Application Specific Memory ConnectivitySystem / Platform

˙˙˙

3*

ADC

˙˙˙

3*

ADC

2*F

lexP

WM

2*e

Tim

er

2*F

lexP

WM

2*e

Tim

er

PWM Synch.

eCTU eCTU

1 * PITCRC TSENS

Periph.

Bridge

INTC

Power Architecture™

e200z4

VLE

INTC

STM

SWT

8k-i

Cache

FPU

CMPU

32k-dTCM

4k-d

Cache

Periph.

Bridge

ASIL-D

Lavaredo – 1.5M SPC572L64 28


Core

• 80 MHz Power Architecture™ ISA e200z2 Core (VLE)• Floating Point Unit &

LSP(DSP)

Memory

• 1.5M byte RWW Flash with ECC • +2x16k Data Flash with ECC

• 64k RAM with ECC• +19k SRAM on Timer Module• +8k Overlay RAM

I/O

• Generic Timer Module (Mid-End Version)

• 16 Inputs, 56 Outputs

• 2 x M-CAN

• 3 x LINFlex, 2 x DSPI including 1 x μSB

• 1 x Ethernet

• 4 x SENT

• 24 channel ADC• 3 SAR ADC, 12-bit, TUE ±4LSB• 1 Σ-Δ ADC with OSR x32-64• Decimation filters (4th ord. IIR or

8th ord. FIR with prog.coeff.)

System

• PLL

• MPU


• 5 x PIT

• 1 x LFAST (Interprocessor bus)

• Nexus Class 3+

• Designed for eTQFP80, eTQFP100


LF

AS

T

32

eD

MA

Debug

JTAG

NexusIEEE-ISTO

5001-2010

19

k S

RA

M

2x

M-C

AN

4x

SE

NT

3x

LIN

Fle

x

2x

DS

PI

Power

Architecture™

e200z2

VLE

FPUSWT

STM

INTC

GTM

(Low-End Version)

3x

12

b A

DC

1x

Σ-Δ

AD

C

1x

µS

B

Ts

en

s

1.5M

FLASH

32k Data

FLASH

FLASH Cont.E

the

rne

t

I/O

Bridge

PL

L

8k

Overlay

RAM

64k

S-RAM

RAM Cont.

DSP

Crossbar Switch


Qualified

K2 – 2.5M SPC574K72 29


Core

• 160 MHz Power Architecture™ ISA e200z4 Core (VLE)• Floating Point Unit• 4k-Instruction Cache, 2k-Data

Cache• 16k Local i-RAM, 64k Local d-

RAM • 1x Lock Step configuration

• 80 MHz Power Architecture™ ISA e200z2 Core (VLE)• Floating Point Unit &

LSP(DSP)• 16k Local i-RAM, 48k Local d-

RAM

Memory

• 2.5M byte RWW Flash with ECC • +4x16k Data Flash with ECC

• 176k RAM (64k SRAM, 112k Local d-RAM) with ECC• +26k SRAM on Timer Module• +16k Overlay RAM

I/O

• Generic Timer Module (Mid-End Version)

24 Inputs, 64 Outputs

• Dual Channel FlexRay (10MB/s), 128 buffers

• 3 x ISO CAN FD


• 1 x Ethernet, 1 x I2C

• 6 x SENT, 2 x PSI5

• 48 channel ADC• 5 SAR ADC, 12-bit, TUE ±4LSB• 2 Σ-Δ ADC with OSR x32-64

System

• FM-PLL

• MPU


• 2 x CRC Unit


• 6 x PIT


• Nexus Class 3+

• EBI only for Calibration (High speed debug interface)

• Designed for eTQFP144, eLQFP176

Power

Architecture™

e200z4

INTC

INTC


Cal B

us

Fle

xR

ay

LF

AS

T

32

eD

MA

Power

Architecture™

e200z2

VLE

FPU

Debug

JTAG

NexusIEEE-ISTO

5001-2010

SWT

STM

INTC

I-RAM

D-RAM

1x

I2C

26

k S

RA

M

2x

M-C

AN

1x

M-T

TC

AN

2x

PS

I5

6x

SE

NT

4x

LIN

Fle

x

5x

DS

PI




Power

Architecture™

e200z4

4k-I/2k-DCache

VLE

FPUSWT

STM

INTC

I-RAM

D-RAM

GTM

(Mid-End Version)

5x

12

b A

DC

2x

Σ-Δ

AD

C

2x

µS

B

2x

Ts

en

s

2x

CR

C

2.5M

FLASH

64k Data

FLASH

I/O

Bridge

FC

CU

ME

MU

FLASH Cont.E

the

rne

t

I/O

Bridge

FM

PL

L

DSP

16k

Overlay

RAM

64k

S-RAM

RAM Cont.

Qualified

ASIL-D

Eiger – 6M SPC58NE84 30


32

eD

MA

64

eD

MA

3x

10

b A

DC

Power

Architecture™

e200z4

INTC

INTC

Power

Architecture™

e200z4

INTC

INTC


Cal B

us

Fle

xR

ay

LF

AS

T

64

eD

MA

HS

M

Power

Architecture™

e200z4d

VLE

FPU

Debug

JTAG

NexusIEEE-ISTO

5001-2010

SWT

STM

INTC

I-RAM

D-RAM

8k-ICache

1x

I2C

61

k S

RA

M

7x

M-C

AN

1x

M-T

TC

AN

3x

PS

I5

15

x S

EN

T

18

x L

INF

lex

10

x D

SP

I




Power

Architecture™

e200z4d

8k-I/4k-DCache

VLE

FPUSWT

STM

INTC

I-RAM

Power

Architecture™

e200z4d

8k-I/4k-DCache

VLE

FPUSWT

STM

INTC

I-RAM

D-RAMD-RAM

32

eD

MA

Generic Timer Module

(40 Inputs / 104 Outputs)

5x

12

b A

DC

6x

Σ-Δ

AD

C

2x

µS

B

Ts

en

s

2x

CR

C

6M

FLASH

256k Data

FLASH

I/O

Bridge

FC

CU

ME

MU

FLASH Cont. FLASH Cont.

Eth

ern

et

16k

Overlay

RAM

320k

S-RAM

RAM Cont.

I/O

Bridge

FM

PL

L

DSP

16k

Overlay

RAM

288k

S-RAM

RAM Cont.

Core

• 2x 180 MHz Power Architecture™ ISA e200z4d Core (VLE)• Dual Issue Core with Floating

Point Unit • 2x (8k-Instruction Cache, 4k-

Data Cache)• 2x (16k Local i-RAM, 64k Local

d-RAM) • 1x Lock Step configuration

• 180 MHz Power Architecture™ ISA e200z4 Core (VLE)• Dual Issue Core with Floating

Point Unit & LSP(DSP)• 8k-Instruction Cache• 16k Local i-RAM, 32k Local d-

RAM

Memory

• 6M byte RWW Flash with ECC • +4x64k+2x16k Data Flash with

ECC

• 768k RAM (608k SRAM, 160k Local d-RAM) with ECC• +61k SRAM on Timer Module• +32k Overlay RAM

I/O

• Generic Timer Module (High-End Version)

• Dual Channel FlexRay (10MB/s), 128 buffers

• 7 x (FD)M-CAN, 1 x (FD)M-TTCAN


• 2 x Ethernet, 1 x I2C

• 15 x SENT, 2 x PSI5, 1 x PSI5-S

• 86 channel ADC• 5 SAR ADC, 12-bit, 1.5us

conversion time, TUE ±4LSB• 3 SAR ADC, 10-bit, 1us conversion

time, TUE ±2LSB• 6 Σ-Δ ADC with OSR x32-64

System

• Security Module (HSM)

• FM-PLL

• MPU

• AMU


• 2 x CRC Unit


• 8 x PIT


• Nexus Class 3+

• EBI only for Calibration (High speed debug interface)

• Designed for eLQFP176, LFBGA292 and KGD

Available

ASIL-D

http://www.st.com/spc5http://www.stmicroelectronics.com.cn/zh/automotive-microcontrollers.html

Please find more SPC5 information from ST Website

http://www.st.com/spc56

http://www.stmicroelectronics.com.cn/zh/automotive-microcontrollers.html

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