august 29, 2015204521 digital system architecture course introduction and overview pradondet...

April 19, 2023204521 Digital System Architecture

Course Introduction and Overview

Pradondet NilaguptaSpring 2005

(original notes from Prof. Randy Katz,

Prof. Dan Connors,Prof. Amirali Baniasadi)

April 19, 2023204521 Digital System Architecture 2

Course Info

Lecturer: Pradondet Nilagupta Email: [email protected]:http://www.cpe.ku.ac.th/~pom/courses/205521/204521.html

Phone: 9428555 ext 1401

office: rm.406 Building 15 Engineering Faculty

Office hours: Wed. 4-6 PM. or make an appointment

Lecture hr: Wed. 6-9 PM.


References Textbook

Main Textbook (required)– Computer Architecture a Quantitative Approach 3rd

Edition, John L. Hennessy, David A. Patterson, Morgan Kaufmann 2003.

Supplement Text– Advance Computer Architectures A design Space

Approach, Dezso Sima, Terence Fountain, Peter Kacsuk, Addison-Wesley, 1997

– Computer System Design and Architecture, Vincent P. Heuring, Harry F. Jordan, Addison-Wesley 1997.

– Computer Organization, V. Carl Hamacher, Zvonko G. Vranesic, Safwat G. Zaky,, McGraw-Hill, 1996.


Grading

25% Homeworks

30% MidtermExam

30% Final Exam

15% Paper Presentation


Topic Coverage

Fundamentals of Computer Design (Chapter 1)Instruction Set Principle (Chapter 2)Pipelining: Basic and Intermediate Concepts ( Appendix A)Instructional Level Parallelism (Chapter 3, 4)Memory Hierarchy Design(Chapter 5)Storage System (Chapter 7)Computer Arithmetic (Appendix H)Vector Processors (Appendix G)


Related Courses

Digital& Org.

Digital& Org.

Comp.Arch.

Comp.Arch. ParallelParallel

How to build itImplementation details

Why, Analysis,Evaluation

Parallel Architectures,Languages, Systems

Strong

Prerequisite

Basic knowledge of theorganization of a computeris assumed!


Course Focus (1/2)

To Understand the design techniques, machine structures, technology factors, evaluation methods that will determine the form of computers in 21st Century

Technology ProgrammingLanguages

OperatingSystems History

ApplicationsInterface Design(Inst. Set Arch.)

Measurement & Evaluation

Parallelism

Computer Architecture:• Instruction Set Design• Organization• Hardware


Computer Architecture Is …the attributes of a [computing] system as seen by the programmer, i.e., the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation.

Amdahl, Blaaw, and Brooks, 1964

SOFTWARESOFTWARE


Computer Architecture’s Changing Definition

1950s to 1960s: Computer Architecture Course: Computer Arithmetic

1970s to mid 1980s: Computer Architecture Course: Instruction Set Design, especially ISA appropriate for compilers

1990s: Computer Architecture Course:Design of CPU, memory system, I/O system, Multiprocessors, Networks

2010s: Computer Architecture Course: Self adapting systems? Self organizing structures?DNA Systems/Quantum Computing?


Computer Architecture Topics (1/2)

Instruction Set Architecture

Pipelining, Hazard Resolution,Superscalar, Reordering, Prediction, Speculation

Addressing,Protection,Exception Handling

L1 Cache

L2 Cache

DRAM

Disks, WORM, Tape

Coherence,Bandwidth,Latency

Emerging TechnologiesInterleavingBus protocols

RAID

VLSI

Input/Output and Storage

MemoryHierarchy

Pipelining and Instruction Level Parallelism


Computer Architecture Topics (2/2)

M

Interconnection NetworkS

PMPMPMP …

Topologies,Routing,Bandwidth,Latency,Reliability

Processor-Memory-Switch

MultiprocessorsNetworks and Interconnections


Throughout this text we will focus on optimizing machine cost per performance


Computer Architecture

Role of a computer architect:

To design and engineer the various levels of a computer system to maximize performance and programmability within limits of technology and cost


Instruction Set Architecture

Applications

Operating System

Firmw areCompiler

Instruction Set Processor I/O System

Datapath & Control

Digital Design

Circuit Design

Layout

S/W and H/W consists of hierarchical layers of abstraction, each hides details of lower layers from the above layer

The instruction set arch. abstracts the H/W and S/W interface and allows many implementation of varying cost and performance to run the same S/W

Levels of Abstraction


The Task of Computer Designer

determine what attribute are important for a new machinedesign a machine to maximize cost performance

What are these Task?instruction set designfunction organizationlogic designimplementation– IC design, packag

ing, power, cooling….


Instruction Set Architecture (ISA)

refer to actual programmer visible instruction set

serve as the boundary between software and hardware

must be designed to survive changes in hardware technology, software technology, and application characteristic.

i.e. 80xx, 68xxx,80x86



Instruction set:

– Complete set of instructions used by a machine

ISA:

– Abstract interface between the HW and lowest-level SW. It encompasses information needed to write machine-language programs including

• Instructions

• Memory size

• Registers used

• . . .



Fetch Instruction From Memory

Decode Instruction determine its size & action

Fetch Operand data

Execute instruction & compute results or status

Store Result in memory

Determine Next Instruction’s address

•Instruction Execution Cycle


Organization and Hardware (1/2)

organization includes high-level aspect of computer design such as– memory system– bus structure– internal CPU

• arithmetic, logic, branch, data transfer are implemented

• i.e.. SPARC2, SPARC 20 has same instruction set but different organization


Organization and Hardware (2/2)

Hardware used to refer to specific of a machine– detailed logic design– packaging technology of machine

machine identical ISA and nearly identical organization but they differs in detailed hardware

implementation


Choosing between 2 designs

What should the computer architect aware of in choosing between two designs?– design complexity

• complex design take longer to complete, this means a design will need to have higher performance to be competitive

– design time both hardware and software


Early Computing

1946: ENIAC, us Army, 18,000 Vacuum Tubes

1949: UNIVAC I, $250K, 48 systems sold

1954: IBM 701, Core Memory

1957: Moving Head Disk

1958: Transistor, FORTRAN, ALGOL, CDC & DEC

Founded

1964: IBM 360, CDC 6600, DEC PDP-8

1969: UNIX

1970: FLOPPY DISK

1981: IBM PC, 1st Successful Portable (Osborne1)

1986: Connection Machine, MAX Headroom Debut


Generation

Evolutionary

Parallelism

Year Logic Storage Prog. Lang. O/S54 Tubes core (8 ms)

58 Transistor (10s) FORTRAN60 ALGOL, COBOL Batch

64 Hybrid (1 s) thin film (200ns) Lisp, APL, Basic66 IC (100ns) PL/1, Simula,C67 Multiprog.71 LSI (10ns) 1k DRAM O.O. V.M.

73 (8-bit P)

75 (16-bit P) 4k DRAM78 VLSI (10ns) 16k DRAM Networks80 64k DRAM

84 (32-bit P) 256k DRAM ADA87 ULSI 1M DRAM89 GAs 4M DRAM C++

92 (64-bit P) 16M DRAM Fortran90

Underlying Technologies


History

1. “Big Iron” Computers:

Used vacuum tubes, electric relays and bulk magnetic storage devices. No microprocessors. No memory.

Example: ENIAC (1945), IBM Mark 1 (1944)


History

Von Newmann:

Invented EDSAC (1949).

First Stored Program

Computer. Uses Memory.

Importance: We are still using

The same basic design.


The Von Neumann Computer ModelPartitioning of the computing engine into components:

– Central Processing Unit (CPU): Control Unit (instruction decode , sequencing of operations), Datapath (registers, arithmetic and logic unit, buses).

– Memory: Instruction and operand storage.– Input/Output (I/O) sub-system: I/O bus, interfaces, devices.

– The stored program concept: Instructions from an instruction set are fetched from a common memory and executed one at a time

-Memory

(instructions, data)

Control

DatapathregistersALU, buses

CPUComputer System

Input

Output

I/O Devices

Major CPU Performance Limitation: The Von Neumann computing model implies Neumann computing model implies sequential executionsequential execution one instruction at a time one instruction at a time


Hardware Components of Any Computer

Processor (active)

Computer

ControlUnit

Datapath

Memory(passive)

(where programs, data live whenrunning)

Devices

Input

Output

Keyboard, Mouse, etc.

Display, Printer, etc.

DisksNetworks ...

Five classic components of all computers:Five classic components of all computers:

1. Control Unit; 2. Datapath; 3. Memory; 4. Input; 5. Output1. Control Unit; 2. Datapath; 3. Memory; 4. Input; 5. Output}

Processor

} I/O


Generic CPU Machine Instruction

Execution Steps

Instruction

Fetch

Instruction

Decode

Operand

Fetch

Execute

Result

Store

Next

Instruction

Obtain instruction from program storage

Determine required actions and instruction size

Locate and obtain operand data

Compute result value or status

Deposit results in storage for later use

Determine successor or next instruction

(Implied by The Von Neumann Computer Model)

Major CPU Performance Limitation: The Von Neumann computing model implies sequential

execution one instruction at a time


Computer Components

Datapath of a von Newman machine

ALU

OP1 + OP2

Op1 Op2

OP1 + OP2...

Op1Op2

General-purpose Registers

ALU i/p registers

ALU o/p register

Bus


Computer Components

Processor(CPU):– Active part of the motherboard– Performs calculations & activates devices– Gets instruction & data from memory– Components are connected via Buses

Bus:– Collection of parallel wires– Transmits data, instructions, or control signals

Motherboard– Physical chips for I/O connections, memory, & CPU


Computer Components

CPU consists of– Datapath (ALU+ Registers):

• Performs arithmetic & logical operations

– Control (CU): • Controls the data path, memory, & I/O

devices• Sends signals that determine operations of

datapath, memory, input & output


Technology Change

Technology changes rapidly– HW

• Vacuum tubes: Electron emitting devices • Transistors: On-off switches controlled by electricity• Integrated Circuits( IC/ Chips): Combines thousands

of transistors• Very Large-Scale Integration( VLSI): Combines

millions of transistors• What next?

– SW• Machine language: Zeros and ones• Assembly language: Mnemonics• High-Level Languages: English-like• Artificial Intelligence languages: Functions & logic

predicates• Object-Oriented Programming: Objects & operations

on objects


Technology => dramatic change

Processor–logic capacity: about 30% per year–clock rate: about 20% per year

Memory–DRAM capacity: about 60% per year (4x every 3

years)–Memory speed: about 10% per year–Cost per bit: improves about 25% per year

Disk–capacity: about 60% per year

Question: Does every thing look OK?


Software Evolution.

Machine languageAssembly languageHigh-level languagesSubroutine libraries

There is a large gap between what is convenient for computers & what is convenient for humans

Translation/Interpretation is needed between both


Language Evolution

swap (int v[], int k){ int temp temp = v[k]; v[k] = v[k+1]; v[k+1] = temp;}

00000000101000010000000000011000000000001000111000011000001000011000110001100010000000000000000010001100111100100000000000000100101011001111001000000000000000001010110001100010000000000000010000000011111000000000000000001000

swap: muli $2, $5, 4 add $2, $4, $2 lw $15, 0($2) lw $18, 4($2) sw $18, 0($2) sw $15, 4($2) jr $31

High-level language program (in C)

Assembly language program (for MIPS)

Binary machine language program (for MIPS)


HW - SW Components

Hardware– Memory components

• Registers• Register file• memory• Disks

– Functional components• Adder, multiplier,

dividers, . . .• Comparators• Control signals

Software– Data

• Simple– Characters– Integers– Floating-point– Pointers

• Structured– Arrays– Structures

( records)– Instructions

• Data transfer• Arithmetic• Shift• Control flow• Comparison• . . .


Predictions for the Late 1990s (1/2)

Technology– Very large dynamic RAM: 64 MBits and

beyond– Large fast Static RAM: 1 MB, 10ns

Complete systems on a chip– 10+ Million Transistors

Parallelism – Superscalar, Superpipeline, Vector,

Multiprocessors– Processor Arrays


Predictions for the Late 1990s (2/2)

Low Power– 50% of PCs portable by 1995– Performance per watt

Parallel I/O– Many applications I/O limited, not computation– Computation scaling, but memory, I/O bandwid

th not keeping pace

Multimedia– New interface technologies– Video, speech, handwriting, virtual reality, …


Moore’s Law


Technology => dramatic change

Processor– logic capacity: about 30% increase per year– clock rate: about 20% increase per year

Memory– DRAM capacity: about 60% increase per year (4x

every 3 years)– Memory speed: about 10% increase per year– Cost per bit: about 25% improvement per year

Disk– Capacity: about 60% increase per year

Higher logic density gave room for instruction pipeline & cacheHigher logic density gave room for instruction pipeline & cache

Performance optimization no longer implies smaller programsPerformance optimization no longer implies smaller programs

Computers became lighter and more power efficient Computers became lighter and more power efficient


Dead Computer Society

ACRI

Alliant

American Supercomputer

Ametek

Applied Dynamics

Astronautics

BBN

CDC

Convex

Cray Computer

Cray Research

Culler-Harris

Culler Scientific

Cydrome

Dana/Ardent/Stellar/Stardent

Denelcor

Elxsi

ETA Systems

Evans and Sutherland Computer Division

Gould NPL

Guiltech

Intel Scientific Computers

Gould NPL

Guiltech

Intel Scientific Computers

International Parallel Machines

Kendall Square Research

Key Computer Laboratories

MasPar

Meiko

Multiflow

Myrias

Numerix

Prisma

Thinking Machines

Saxpy

Scientific Computer Systems (SCS)

Soviet Supercomputers

Supertek

Supercomputer Systems (SSI)

Suprenum


The Processor Chip


Intel 4004 Die Photo

Introduced in 1970– First

microprocessor

2,250 transistors

12 mm2

108 KHz


Intel 8086 Die Scan

29,0000 transistors

33 mm2

5 MHz

Introduced in 1979– Basic architecture

of the IA32 PC


Intel 80486 Die Scan

1,200,000 transistors

81 mm2

25 MHz

Introduced in 1989– 1st pipelined

implementation of IA32


Pentium Die Photo


296 mm2

60 MHz

Introduced in 1993– 1st superscalar

implementation of IA32


Pentium III


125 mm2

450 MHz

Introduced in 1999


MOORE’s LAW

µProc60%/yr.(2X/1.5yr)

DRAM9%/yr.(2X/10 yrs)1

10

100

1000

198

0198

1 198

3198

4198

5 198

6198

7198

8198

9199

0199

1 199

2199

3199

4199

5199

6199

7199

8 199

9200

0

DRAM

CPU198

2

Processor-MemoryPerformance Gap:(grows 50% / year)

Per

form

ance

Time

“Moore’s Law”

Processor-DRAM Memory Gap (latency)


Moore’s Not-Exactly-Law

Not a law of nature– But fairly accurate over 38 years and counting

No exponential is forever– but we can delay “forever” (Gordon Moore in

2003)

More about Moore’s Law athttp://www.intel.com/research/silicon/mooreslaw.htm


Its all about money.(Trends affect profits, costs, etc.)


Performance Trend

In general, tradeoffs should improve performance

The natural idea here… HW cheaper, easier to manufacture can make our processor do more things…


Price Trends (Pentium III)


Price Trends (DRAM memory)


Computer Engineering Methodology

TechnologyTrends



Evaluate ExistingEvaluate ExistingSystems for Systems for BottlenecksBottlenecks

TechnologyTrends

Benchmarks




Simulate NewSimulate NewDesigns andDesigns and

OrganizationsOrganizations

TechnologyTrends

Benchmarks

Workloads




Simulate NewSimulate NewDesigns andDesigns and

OrganizationsOrganizations

Implement NextImplement NextGeneration SystemGeneration System

TechnologyTrends

Benchmarks

Workloads

ImplementationComplexity


Context for Designing New Architectures

Application Area– Special Purpose (e.g., DSP) / General

Purpose– Scientific (FP intensive) / Commercial

Level of Software Compatibility– Object Code/Binary Compatible (cost

HW vs. SW)– Assembly Language (dream to be

different from binary)– Programming Language; Why not?


Context for Designing New Architectures

Operating System Requirements for General Purpose Applications– Size of Address Space– Memory Management/Protection– Context Switch– Interrupts and Traps

Standards: Innovation vs. Competition– IEEE 754 Floating Point – I/O Bus – Networks – Operating Systems / Programming Languages


Recent Trends in Computer DesignRecent Trends in Computer Design

The cost/performance ratio of computing systems have seen a steady decline due to advances in:

– Integrated circuit technology: decreasing feature size, • Clock rate improves roughly proportional to improvement in • Number of transistors improves proportional to (or faster).

– Architectural improvements in CPU design.

Microprocessor systems directly reflect IC improvement in terms of a yearly 35 to 55% improvement in performance.

Assembly language has been mostly eliminated and replaced by other alternatives such as C or C++

Standard operating Systems (UNIX, NT) lowered the cost of introducing new architectures.

Emergence of RISC architectures and RISC-core (x86) architectures.

Adoption of quantitative approaches to computer design based on empirical performance observations.

august 29, 2015204521 digital system architecture course introduction and overview pradondet...

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