aug2014 pelab

7/18/2019 Aug2014 PELab

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ITER, ELECTRICAL ENGINEERING (SOA University)

PE-LAB Manual of Department Of Electrical Engineering 1

Experiment No-1.

Aim of the Experiment: To Study the static V-I characteristics of SCR.

Apparatus Required: 1. Static characteristic SCR Module.

2. Multi meters - 3 numbers.

3. Patch Chords.

Circuit Diagram:

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Theory: In V-I characteristics there are three states of operation

i. Reverse blocking mode.

ii.

Forward blocking mode.

iii. Forward conduction mode.

The characteristics curve is shown in fig.

Reverse Blocking Mode:

When cathode is more positive with respect to anode with switch ‘S’ open, then

SCR is told to be in reverse blocking mode.

In this mode, junction J1 & J3 are reverse biased & junction J2 is forward biased.

A small leakage current will flow.

This is called off-state of thyristor.

When reverse voltage is more than a critical value known as V BR , then J1 & J3

junction will be forced fully breakdown & a huge amount of current flow. So high power

loss in SCR occurs & heat will generate which will damage the SCR. Hence reverse

voltage < VBR .

In reverse mode SCR offers high impedance, so it acts as open circuit.

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Forward Blocking Mode:

In this mode anode is made positive with respect to cathode with switch ‘S’ open.

In this mode, junction J1 & J3 are forward biased & junction J2 is reverse biased.

In this mode a small current called forward leakage current flows.

When forward voltage increases then at certain voltage VBO, J2 junction will

breakdown & conduction takes place.

When Va < VBO, the SCR offers high impedance & acts as open circuit.

Forward Conduction Mode:

First SCR should be forward biased & switch ‘S’ should be closed.

When gate pulse is applied then SCR conducts at certain voltage less than V BO &

gate current (Ig) is inversely proportional to VBO.

Voltage drop across SCR is very small & SCR offers low impedance i.e. short

circuit.

When Ia > IL, then SCR conducts where

IL is the latching current defined as the amount of anode current above which SCR

conducts & acts as low impedance circuit or SCR jumps from forward blocking state to

forward conduction state.

IH is the holding current defined as the amount of anode current below which SCR jumps

to forward blocking region from forward conduction state and acts as high impedance

path.

IL > IH.

Procedure:

1.

Connect the circuit as per the circuit diagram.

2.

Switch ON the 230V ac supply.

3. Now vary the gate current (Ig) and keep to a fix value.

4.

Now slowly vary the anode-cathode voltage (VAK ) by varying supply voltage tillthe thyristor get turned ON (means VAK =1volt), now switch off the gate current if still

VAK = 1volt then find out the corresponding supply voltage and anode current. The supply

voltage will be VBO and anode current will be IL. if after gate switch off VAK =VS that

means thyristor is not latch up. So again switch on the gate and increase the supply to

obtain VBO and IL.

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5.

Further increase the VAK and note the anode current.

6. Then decrease the VAK and take the anode current till the thyristor voltage is not

equal to supply. The moment Vs=VAK take the anode current just before that , that is the

holding current.

7.

By various gate current follow the same procedure.

8.

Then plot the graph between VAK and IA with different gate current.

Tabulation:

For a value of Ig.

SL NO. VAK IA(amp)

Result Analysis:

1. Find the latching current.

2. Find the holding current.

3. Find the break over voltage.

4.

Show with increase of gate current, break over voltage decreases.5.

Also find the ratio of IL/IH.

Questions:

1.

What do you mean by VBO, IL, IH.

2.

How the VBO is affected by gate current.

3. Thyristor is a voltage or current or charge control device, justify.

4. Why thyristor is called semi controlled device.

5.

What is the basic difference between the diode and Thyristor in V-I characteristic?6.

For what period gate supply should be given.

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Experiment No-2:

Aim of the experiment: To study the operation of the R, R-C & UJT triggering circuit in

application with a single phase half wave controlled rectifier.

Apparatus Required:

1.

R, R-C,UJT firing circuit model.

2.

CRO

3.

Loading Rheostat.

4. Digital Multimeter.

Circuit Diagrams:

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Theory:

Uni-junction transistor (UJT):

(a) Basic structure of UJT(b) Symbolic representation (c) Equivalent circuit

UJT is an n-type silicon bar in which p-type emitter is embedded. It has three terminals

base1, base2 and emitter ‘E’. Between1

B and2

B UJT behaves like ordinary resistor and

the internal resistances are given as1 B

R and2 B

R with emitter open1 2 BB B B

R R R . Usually

the p-region is heavily doped and n-region is lightly doped. The equivalent circuit of UJT

is as shown. When BB

V is applied across1

B and2

B , we find that potential at A is

1 1

1

1 2 1 2

BB B B

AB BB

B B B B

V R RV V

R R R R

is intrinsic stand-off ratio of UJT and ranges between 0.51 and 0.82. Resistor2 B

R is

between 5 to 10K .

Operation:

When voltage BB

V is applied between emitter ‘E’ with base 11

B as reference and the

emitter voltage E

V is less than D BE V V the UJT does not conduct. D BB

V V is

RB2

VBB

+

-

E

B1

RB1VBB

A+

-

Ve Ie

B2

E

B2

B1B1

A

B2

E

RB2

RB1n-type

p-type

Eta-point

Eta-point

(a) (b) (c)

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designated as P V which is the value of voltage required to turn on the UJT. Once

E V is

equal to P BE D

V V V , then UJT is forward biased and it conducts.

The peak point is the point at which peak current P I flows and the peak voltage

P V is

across the UJT. After peak point the current increases but voltage across device drops,

this is due to the fact that emitter starts to inject holes into the lower doped n-region.

Since p-region is heavily doped compared to n-region. Also holes have a longer life time,

therefore number of carriers in the base region increases rapidly. Thus potential at ‘A’

falls but current E I increases rapidly.

1 B R acts as a decreasing resistance.

The negative resistance region of UJT is between peak point and valley point. After

valley point, the device acts as a normal diode since the base region is saturated and1 B

R

does not decrease again.

Fig 3.22 V-I Characteristics of UJT

Ve

VBBR load line

Vp

Vv

IeIvIp0

Peak Point

Cutoff region

Negative ResistanceRegion

Saturationregion

Valley Point

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Resistance triggering:

A simple resistance triggering circuit is as

shown. The resistor1

R limits the current

through the gate of the SCR. 2 R is the variableresistance added to the circuit to achieve

control over the triggering angle of SCR.

Resistor ‘R’ is a stabilizing resistor. The

diode D is required to ensure that no negative

voltage reaches the gate of the SCR.

Circuit diagram for resistance firing

Design

With2 0 R , we need to ensure that

1

m

gm

V I

R , where

gm I is the maximum or peak gate

current of the SCR. Therefore1

m

gm

V R

I .Also with

2 0 R , we need to ensure that the

voltage drop across resistor ‘R’ does not exceed gmV , the maximum gate voltage

1

1

1

1

m

gm

gm gm m

gm m gm

gm

m gm

V RV

R R

V R V R V R

V R R V V

V R R

V V

Operation:

Case 1: gp gt V V

gpV , the peak gate voltage is less then gt

V since2

R is very large. Therefore, current ‘I’

flowing through the gate is very small. SCR will not turn on and therefore the load

LOAD

vO

a b

i R1

R2

D

R Vg

VT

v =V sin tS m

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LOAD

vO

R

C

V

v =V sin tS m

D2

VC

+

-

D1

voltage is zero and scr

v is equal to s

V . This is because we are using only a resistive

network. Therefore, output will be in phase with input.

Case 2: gp gt

V V ,2

R optimum value.

When2

R is set to an optimum value such that gp gt

V V , we see that the SCR is triggered at

090 (since

gpV reaches its peak at 0

90 only). The waveforms shows that the load voltage is

zero till 090 and the voltage across the SCR is the same as input voltage till it is triggered

at 090 .

Case 3: gp gt

V V ,2

R small value.

The triggering value gt

V is reached much earlier than 090 . Hence the SCR turns on earlier

thanS

V reaches its peak value. The waveforms as shown with respect to sin s m

V V t .

At , , sinS gt m gp gt gpt V V V V V V

Therefore 1sin

gt

gp

V

V

But1 2

m gp

V RV

R R R

Therefore 1 21

sin gt

m

V R R R

V R

Since1

, , gt

V R R are constants2

R

Resistance capacitance triggering:

RC HALF WAVE

Capacitor ‘C’ in the circuit is connected

to shift the phase of the gate voltage.1

D

is used to prevent negative voltage from

reaching the gate cathode of SCR.

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vs

0

V sin tm

0 t

t

a vc

- /2

a

vc

Vgt

vo

vT

Vm

-Vm

vs

0

V sin tm

0

a vc

- /2

a

vc

Vgt

0

0

vo

vT

Vm Vm

-Vm( 2 + )

(a) (b)

t

In the negative half cycle, the capacitor charges to the peak negative voltage of the

supply mV through the diode

2 D . The capacitor maintains this voltage across it, till the

supply voltage crosses zero. As the supply becomes positive, the capacitor charges

through resistor ‘R’ from initial voltage ofm

V , to a positive value.

When the capacitor voltage is equal to the gate trigger voltage of the SCR, the SCR is

fired and the capacitor voltage is clamped to a small positive value.

Case 1: R Large.

When the resistor ‘R’ is large, the time taken for the capacitance to charge fromm

V to gt V

is large, resulting in larger firing angle and lower load voltage.

Case 2: R Small

When ‘R’ is set to a smaller value,

the capacitor charges at a faster rate

towards gt

V resulting in early

triggering of SCR and hence L

V is

more. When the SCR triggers,

the voltage drop across it falls to 1

– 1.5V. This in turn lowers, thevoltage across R & C. Low voltage across the SCR during conduction period keeps the

capacitor discharge during the positive half cycle.

DESIGN EQUATION From the circuit1C gt d V V V . Considering the source voltage and

the gate circuit, we can write s gt C v I R V . SCR fires when

s gt C v I R V that is

1S g gt d v I R V V . Therefore 1 s gt d

gt

v V V R

I

. The RC time constant for zero output voltage

that is maximum firing angle for power frequencies is empirically gives as 1.32T RC

.

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Procedure:

Resistance Triggering:

1. Connect the input power cable from the supply to the trainer kit.

2.

Connect one end of the load rheostat to the anode of SCR in triggering module.

3. Connect other end of the load rheostat to the supply and cathode of SCR to other

end of supply.

4.

Connect the triggering circuit across the gate cathode of SCR using patch cords.

5.

Switch on the power supply to trainer and observe & trace the wave form of gate-

cathode voltage and output voltage across the load for different firing angle by varying

the rheostat.

R-C Triggering:

1. Connect the input power cable from the supply to the trainer kit.

2. Connect one end of the load rheostat to the anode of SCR in triggering module.

3.

Connect other end of the load rheostat to the supply and cathode of SCR to other

end of supply.

4.

Connect the triggering circuit across the gate cathode of SCR using patch cords.

5. Switch on the power supply to trainer and observe & trace the wave form of gate-

cathode voltage and output voltage across the load for different firing angle by varying

the rheostat.

UJT Triggering:

1. Connect the G1, K1 terminals of the UJT to gate-cathode terminals of SCR.

2.

Connect one end of the load rheostat to the anode of SCR in triggering module.

3.

Connect other end of the load rheostat to the supply and cathode of SCR to other

end of supply.

4. Switch on the power supply to trainer and observe & trace the wave form of gate-

cathode voltage and output voltage across the load for different firing angle by varyingthe rheostat.

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Tabulation:

For different triggering circuits

Firing angle Measured Vload Calculated Vload

Result Analysis:

1.

Check how the firing angle in each triggering is controlled.

2.

Trace load voltage, thyristor voltage and gate-cathode voltage in each triggering

case.

3. Check whether for same firing angle for each triggering circuit load voltage

changes or not.

4. Check in which triggering gate loss is minimum.

Questions:

1.

What are the drawbacks of resistance triggering?

2.

What are the drawbacks and advantages of R-C triggering?

3.

Why we will prefer UJT triggering circuit than the other two.

4. What do you mean by snow-balling effect?

5. In which region UJT operates.

6. Is the load voltage is affected by triggering circuit or not.

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Experiment No-3:

Aim of the experiment: To study the operation of 1-phase full-bridge and 1-phase semi

controlled rectifiers for R, R-L and R-L-FD load.

Apparatus required:

1.

1-phase SCR bridge converter kit.

2.

Patch cords.

3.

CRO.

4. DC Voltmeter.

5. CRO Probe.

6. Multimeter.

Circuit Diagram:

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Theory:

In continuous mode: T1 & T2 both conduct from wt = α to (π + α).

T3 & T4 conduct from (π + α) to (2π + α).

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In discontinuous mode: T1 & T2 conduct from wt = α to β. For R load β= π.

T3 & T4 conduct from (π + α) to (π +β).

From β to (π + α) and (π +β) to (2π + α) all the thyristors are in off state.V0 = 0

For continuous mode:

α < wt < (π + α) --- I0 will flow through the path VS-T1-load-T2-VS.VT1 = VT2 = 0 , V0 =VS , I0 = IT1 = IT2 = IS .

(π + α) < wt < (2π + α) --- I0 will flow through the path VS-T3-load-T4-VS. VT3 = VT4 = 0

,V0 = -VS , I0 = IT3 = IT4 = -IS.

For discontinuous mode:

α < wt < β --- I0 will flow through the path VS-T1-load-T2-VS. VT1 = VT2 = 0, V0 = VS , I0 = IT1 = IT2 = IS .

β < wt < (π + α) --- V0 = 0. I0 = IT1= IT2= IS = 0, VT1= VT2 = VS.

(π + α) < wt < (π + β) --- I0 will flow through the path VS-T3-load-T4-VS. VT3 = VT4 = 0,

V0 = -VS ,

I0 = IT3 = IT4 = -IS.

(π + β) < wt < (2π + α) --- V0 = 0. I0 = IT3= IT4= IS = 0, VT3= VT4 = -VS.

For continuous mode: circuit turn off time of thyristor tc = (π - α)/w sec.

For discontinuous mode: circuit turn off time of thyristor tc = (2π - β)/w sec.

Comment: Load current is always positive but source current is alternative.

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. Where √ , , X = wL.

For continuous mode:

Average output voltage V0 π ∫

Average load current, I0= V0/R.

Rms output voltage Vor √π

∫ √

Rms value of current Ior =( Vor / R).

Power delivered to load = Vor Ior .

Input volt amperes = (rms source voltage) (total rms line current) = VS* Ior .

Input power factor = (power delivered to load / input VA)

For discontinuous mode:

Average output voltage V0 π

∫

Average load current, I0= V0/R.

Rms output voltage Vor

√π ∫ √

Rms value of current Ior =( Vor / R).

Power delivered to load = Vor Ior .

Input volt amperes = (rms source voltage) (total rms line current) = VS* Ior .

Input power factor = (power delivered to load / input VA) .

Procedure:

1.

Connection should be done according to circuit diagram.

2.

Switch on the trainer power switch and then switch on the 24V AC switch and triggering

switch.

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3.

Vary the output voltage by varying the firing angle step by step and trace the output

voltage and thyristor voltage.

4. For each reading calculate the average output voltage and measured the same by multi

meter.

5.

Then calculate the % error for each firing case and draw a plot between firing angle VS

error.

Tabulation: For R-load, R-L Load, R-L with FD.

Sl

no

Firing

angle

Calculated Avg

output Voltage

Measured Avg

output Voltage

%error

Result Analysis:

1. Verify that the Avg output voltage of R-load and R-L with FD is same for all firing

angles.

2.

Verify that the continuity of load current depends on load inductance.

3. Verify that FD improves Avg output voltage for R-L Load.

4.

Trace the output voltage, thyristor voltage, load current for different load at a

constant firing angle.

Questions:

1. How the load current nature depends on load inductance.

2. How the Avg output voltage depends on load.

3.

What do you mean by firing angle, extinction angle and conduction angle?

4. What is the need of freewheeling diode?

5.

How the semi converter is superior to full converter.

6. For which load we will get line commutated inverter operation.

7. What do you mean by continuous and discontinuous mode of operation of ac to dc

converter?

8.

What is the advantage of bridge converter over mid-point converter?

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Experiment No-4:

Aim of the experiment: To study the different commutation techniques of thyristor.

Apparatus Required:

1. Thyristor forced commutated trainer.

2.

CRO & CRO Probe.

3.

Patch Cords.

Circuit Diagrams:

Load Commutation Circuit Diagram

Current Commutation Circuit

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Complementary Commutation Circuit Voltage Commutation Circuit

Theory:

Self commutation or load commutation or class A commutation:

In this type of commutation the current through the SCR is reduced below the holding

current value by resonating the load. i.e., the load circuit is so designed that even though

the supply voltage is positive, an oscillating current tends to flow and when the current

through the SCR reaches zero, the device turns off. This is done by including an

inductance and a capacitor in series with the load and keeping the circuit under-damped.

This type of commutation is used in Series Inverter Circuit.

Expression for current

At 0t , when the SCR turns ON on the

application of gate pulse assume the current

in the circuit is zero and the capacitor

voltage is 0C V .V

R L V (0)c

C

T i

Load

+ -

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2 2

A I S

s

Taking inverse Laplace inverse

sint A

i t e t

Note: For effective commutation the circuit

should be under damped.

That is2

1

2

R

L LC

With R = 0, and the capacitor initially

uncharged that is 0 0C V

sinV t

i L LC

But1

LC

Therefore sin sinV t C t

i LC V L L LC LC

and capacitor voltage at turn off is equal to nearly 2V.

Conduction time of SCR

.

Current commutation:

Assume load current to be constant.

Mode-1:

Main thyristor is fired. Load current flows through VS-Tm-load-VS.V0 = VS. I0 = ITm.

Capacitor can’t discharge as D2 is reverse biased. So capacitor holds it’s

potential till auxiliary thyristor is not fired.

The moment Ta is fired capacitor starts discharging through the path C-Ta-L-C.

& .

Capacitor again recharged to opposite polarity with -VS. The moment capacitor

is recharged to opposite polarity the auxiliary thyristor will turn off.

Current i

Capacitor voltage

Gate pulse

Voltage across SCR

0

/2

t

t

t

t

V

V

2V

C V

L

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Mode-2:

Now the capacitor voltage forward bias the diode D2 and IC flows through the

path C-L-D2-Tm-C.

V0 = VS + VTm.

This capacitor current opposes the thyristor current.

When the capacitor current value becomes equal to thyristor current main

thyristor will turn off.

Unless Tm is not turn off D1 can’t conduct as voltage drop across Tm reverse bias

the D1.

The moment Tm will turn off IC flows through the path C-L-D2-D1-C and loadcurrent through the path VS-C-L-load-VS. ID1 = IC – I0. V0 = VS + VD1.

When capacitor current decreases to I0 then ID1 becomes 0. And D1 will off.

Then I0 = IC till capacitor is not recharged to original polarity.

The moment capacitor charges to original polarity up to VS. IC = 0 and I0 will

circulate through FD.V0 = 0.

V0 fluctuation is almost negligible.

Design: ( π

)

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√ π

π

π

Complementary-commutation: In complementarycommutation the current can be transferred between

two loads. Two SCRs are used and firing of one

SCR turns off the other. The circuit is shown in

figure 3.31.

The working of the circuit can be explained as

follows.

Initially both and are off; Now, is fired.Load current flows through . At the same time, the capacitor C gets charged to V

volts through and (‘b’ becomes positive with respect to ‘a’). When the capacitor

gets fully charged, the capacitor current becomes zero. To turn off , is fired; the

voltage across C comes across and reverse biases it, hence turns off. At the same

time, the load current flows through and . The capacitor ‘C’ charges towards V

through and and is finally charged to V volts with ‘a’ plate positive. When the

capacitor is fully charged, the capacitor current becomes zero. To turn off , istriggered, the capacitor voltage (with ‘a’ positive) comes across and turns off. The

related waveforms are shown in figure 3.32

1T 2T 1T

L I

1 R

2 R

1T

ci

1T

2T

1T

1T

2 R

2T

1 R

2T

2T 1T

2T

2T

V

R 1

R 2

T1

T2

IL

iC

C

a b

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Expression for circuit turn off time :

From the waveforms of the voltages across and capacitor, it is obvious that is the

time taken by the capacitor voltage to reach 0 volts from – V volts, the time constant

being RC and the final voltage reached by the capacitor being V volts. The equation forcapacitor voltage can be written as

Where is the final voltage, is the initial voltage and is the time constant.

At , , , , , Therefore .

. Therefore . .

Taking natural logarithms on both . .

This time should be greater than the turn off time of . Similarly when is

commutated

And this time should be greater than of . Usually .

Voltage / Auxiliary-commutation:

Initially it is assumed that capacitor is charged to a

voltage of Edc with polarity shown & T1 & T2 are

initially OFF.

When T1 is ON a load current starts flowing through T1& V0 = Edc, and capacitor gets a discharging path

through T1 and a resonant current also starts flowing

through C, T1, L,D which changes the polarity of

capacitor voltage to – Edc.

ct

1T

ct

c

v t

t

c f i f v t V V V e

f V

iV

ct t 0

cv t

1 RC f V V

iV V 10

ct

R C V V V e

10 2

ct

R C V Ve

12

ct

R C V Ve

10.5

ct

R C e

1

ln0.5 ct

R C

1

0.693c

t R C

qt

1T

2T

20.693

ct R C

qt 2T

1 2 R R R

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When T2 turns ON a reverse voltage appears across T1 i.e. the – Edc and turns OFF

T1.

Procedure:

For load Commutation:

1.

Connection should be done as per the circuit diagram.

2.

Switch on the trainer power supply.

3.

Switch on the main SCR switch.

For Current Commutation:

1. Connection should be done as per the circuit diagram.

2.

Switch on the trainer power supply.3. Switch on the auxiliary SCR then main SCR switch.

4.

Keep the frequency knob to one particular frequency and vary duty cycle step by

step and observe, trace the different wave forms.

5.

Repeat the same for different frequencies.

For Complementary Commutation:


2. Switch on the trainer power supply.

3.

Switch on the auxiliary (T2) SCR then main SCR (T1) switch.

4.



5.


For Voltage Commutation:


2. Switch on the trainer power supply.

3.

Switch on the auxiliary SCR then main SCR switch.

4.



5.


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Result Analysis:

In all commutation we have to find Thyristor voltage, load voltage, capacitor voltage

circuit turn off time. And also compare the result with theoretical result.

Questions:

1.

What is the conduction period of thyristor in load commutation?

2.

What is the peak current of thyristor. Does it depend on commutating elements or

not, justify.

3. In current commutation what is the conduction period of auxiliary thyristor.

4. What is the peak current of main and auxiliary thyristor.

5. In complementary commutation what is the peak current of thyristor.

6.

Whether the voltage across capacitor is alternative or unidirectional.

7.

In voltage commutation what is the peak current of thyristors.

8. Is the diode is essential in current commutation.

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Experiment No-5:

Aim of the Experiment:

To trace the output voltage waveform of Three Phase full wave fully

controlled and semi controlled converter with R, R-L, R-L-E Load with & without FD.

Apparatus Required:

1. CRO & CRO Probe.

2.

3-Phase Converter module.

3.

50Ω/5A Rheostat.

4. 120mH/4A Inductive load.

5. Patch cords.

6. Multimeter.

Circuit

Diagram:

Theory:

It consists of 6 SCRs.

The odd number SCRs are positive group SCRs, even number SCRs are negative group

SCRs, The difference between each arm SCR is 3.

Supply is given through transformer to provide isolation.

There are 3-arms, each arm consists of two SCRs.

T1, T3 and T5 are called positive group SCRs. T2, T4 and T6 are called negative group

SCRs.

Each arm SCR should be fired after 1800 from each other.

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Each group SCRs should be fired 1200 apart.

Each SCR can be fired after be forward biased.

T1 can be fired after 300. Let firing angle delay for each SCR is α. T1 will conduct at wt =

300 + α.

(300 + α) < wt < (900 + α) ---- T1 & T6 are conducting. The load current flows through the

path a-T1-load-T6-b.

V0 = Vab = Van – Vbn = (900 + α) < wt < (1500 + α) ---- T1 & T2 are conducting. The load current flows through

the path a-T1-load-T2-c.

V0 = Vac = Van – Vcn =

(1500 + α) < wt < (2100 + α) ---T3 & T2 are conducting. The load current flows through

the path b-T3-load-T2-c.

V0 = Vbc = Vbn – Vcn = (2100 + α) < wt < (2700 + α) ---T3 & T4 are conducting. The load current flows through

the path b-T3-load-T4-a.

V0 = Vba = Vbn – Van =

(2700 + α) < wt < (3300 + α) ---T5 & T4 are conducting. The load current flows through

the path c-T5-load-T4-a.

V0 = Vca = Vcn – Van = (3300 + α) < wt < 3900 + α) ---T5 & T6 are conducting. The load current flows through the

path c-T3-load-T4-b.

V0 = Vcb = Vcn – Vbn =

Average load voltage is:

√ √

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√ Vm = maximum phase voltage.

Average load current is: I0 = (V0 / R).

Rms value of output voltage:

√ √

Rms value of load current: Ior = (Vor / R).

Assuming load current to be ripple free, rms value of thyristor current:

ITH ∫ .

Rms value of source current ISr ∫

Procedure:

1. Connect as per the circuit diagram.

2. Connect the converter power circuit as shown in figure.

3.

Connect resistive load (lamp-load) across the output terminals of the power circuit.

4.

Keep the MCB in off position.

5.

In control unit side, one firing angle pot is provided. Keep it in minimum position.

6. Connect the firing pulses terminals to gate-cathode terminals of respective SCRs.

7.

After connection over, give the3-phase supply to the power circuit through the auto

transformer and keep it in minimum position. Then switch on the MCB.8.

Observe the output and thyristor wave forms on CRO by giving a supply voltage

for different firing. And also trace those waveforms.

9. Measure the average output voltage and also calculate the average output voltage

and find the error.

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Observation:

SL.NO Average Vo in

volt(Measured)

Average Vo in

volt(calculated)

Calculation:

Calculation should be done using this formula

Average load voltage is:

√

√

√ Vm = maximum phase voltage.

Result Analysis:

Check the firing gap of the thyristors, trace the wave forms of thyristor voltage , load

voltage .

Questions:

1. In 3-phase full converter, what is the interval of firing the three SCRs Pertaining to

one group?

2. In a 3-phase semi-converter, for firing angle less than or equal to 60o, what is the

conduction angle of each diode & thyristors.

3. In a 3-phase semi-converter how many output pulses exit for α>=600 & α<600.

4. In 3-phase full converter output voltage ripple reduces or increases in comparison

to 1-phse .

5. For α>=900 what is the average output voltage for R-L load.

7/18/2019 Aug2014 PELab




Experiment No-6:


DC Jones chopper to control o/p average dc voltage at constant frequency

with different duty cycle.

Apparatus Required:

1. Chopper Circuit Model.

2. CRO & CRO Probes.

3. Multimeter.4.

Patch Cords.

Circuit Diagram:

Theory:

Jones Chopper:

Jones chopper is one kind of voltage-

commutated chopper.

Some times in voltage commutated

chopper capacitor does not get

sufficient energy from L to turn-off theTm. So commutation failure occurs.

To avoid this type of commutation

failure we have to use coupled coilinstead of single coil.

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Here L1 and L2 are tightly coupled inductors. They are used for boosting sufficient

energy for capacitor to turn-off Tm.

This coupled coil may be either, secondary windings of autotransformer or center

tapped coil or two reactive coils which are magnetically coupled.

Operation: Assume load current to be constant.

Initially capacitor is charged to Vs with upper plate positive externally.

When the main thyristor is fired, load current flows through the path Vs-Tm-L2-

load-Vs and at the same time capacitor discharges through the path C-Tm-L1-D-C.

Capacitor current IC = √ o VC =

o

Thyristor current is ITm = I0 + IC.

Since load current always flowing through L2 and induces an e.m.f in L1. So the

capacitor recharges to a potential (Vc + E)>Vs with lower plate positive. Where E=induced e.m.f.

The moment capacitor recharged to opposite polarity IC = 0, VC = -(VS+E), ITm =I0.

When auxiliary thyristor is fired the capacitor voltage reverse bias the Tm and turn

it off.

Then capacitor discharges through the path C-Ta-L2-load-Vs and again recharge to

original polarity.

Advantages:

We can use higher voltage and lower mF capacitors because the trapped energy in

the inductor L2 can be forced in to the commutating capacitor C rather than simplycharging the capacitor by supply voltage.

On time and off time can be varied individually. So there will be greater flexibility

in control.

Procedure:

1.

Switch on the power ON/OFF switch.

2. Power on the switch “SW1”.

3.

Power on the switch “SW2”.

4. Change the duty cycle keeping frequency constant and measured the average

output voltage of output.

5.

Change the frequency keeping duty cycle constant and measured the average

output voltage of output.

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Tabulation:

SL NO Frequency Duty Cycle Measured

Vo

Calculated

Vo

%error

Calculation:

Average load voltage ∫

(for R and R-L load)

T = Ton + Toff . .

To calculate the Ton time we have to take the period from the instant load voltage equal

to the source voltage and end at the instant the load voltage is 33% of the peak value.

Result Analysis:

Trace the thyristor and load voltages and capacitor voltage, check the peak value of load

voltage, also verify that it is a modified voltage commutation circuit. Find the circuit

turns off time of each SCR

Questions:

1. What is the peak voltage of load?

2.

What is the peak current of main thyristor.

3.

How it is superior to voltage commutated chopper.

4.

Which type of commutation is used?

5. How the output voltage varying with duty cycle.

6. In which control we will get small variation of output voltage(between frequency

or pulse width modulation technique) .

7/18/2019 Aug2014 PELab




Experiment No-7:


To determine the output voltage wave form and circuit turn of time of half bridge

series inverter.

Apparatus Required:

1. SCR series inverter trainer.

2. Rheostat of 220Ω/1A.

3.

CRO and CRO Probe.

4.

Patch chords.

Circuit Diagram:

Theory:

Series inverter:

Since the commutating components are permanently

connected in series with the load so these inverters are

known as series inverter. The circuit should be under-

damped in nature. As current attains zero value due to

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nature of series circuit this is also known as self-commutated inverters. These inverters

operate at frequency 200HZ-100KHZ. So sizes of commutating components are small.

Applications: 1. Induction heating. 2. Fluorescent lightning.

Basic series inverter:

R is the load resistance. L-C are commutating components. In R-L-C circuit L-C are so

chosen that circuit must be under damp.According to the firing of T1 and T2 different

frequency of output is obtained.

Mode-1:

When T1 is fired the source or load current will flow through the path source-T 1-L-C-R-

source. Io = Is. When Io reaches zero value, capacitor is fully charged to VC .Oncecapacitor is fully charged it tries to discharge, the moment capacitor tries to discharge T 1

will turn off. Then after some time Toff, T2 is fired. Toff > thyristor turn off time. Unless

the two thyristors will conduct simultaneously and there is a chance of short circuit of

source and also thyristor will not get sufficient time to regain its’ reverse blocking

capability. The minimum time gap should be equal to Toff = = dead zone time.

Where w = output frequency and wr = circuit ringing frequency. When T2 is fired then

capacitor discharges through C-L-T2-R-C. Io is – ve and = Ic but Is = 0. Capacitor charges

during one half cycle and releases same charge during next half cycle. So positive halfcycle current is identical to negative half cycle current.

Drawbacks:

Load current is taken from the supply during the positive half cycle only. This increases

the peak current rating of dc source. Since source current is only flowing during positive

cycle only, its’ harmonics content is more pronounced. Maximum operating frequency is

limited within ringing frequency. Load voltage waveform is distorted due to dead zone.

Commutating components have to carry the load current continuously so the rating of Land C should be high. Amplitude and duration of load current depends on the load circuit

parameters. So inverter suffers from poor output regulation.

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Modified series inverter:

In this case no requirement of dead zone. As there is no

chance of short circuit of source. Output voltage

waveform is improved. Maximum operating frequencycan be higher than the ringing frequency. But still source

current during positive half cycle. Amplitude of load

current depends on R-L-C value. Harmonics content can’t

be reduced.

Half bridge series inverter:

By this process we can overcome some disadvantages of

modified series inverter like…Source current exits for both

positive and negative half cycle. So harmonic contents

reduce. Peak current rating of source decreases. In this case

initially capacitor is charged then capacitor is charged to Vs +

Vco. When T1 is fired capacitor discharges through the path

C-T1-L-R-C. Io is positive. When T2 is fired capacitor

discharges through the path C-R-L-T2-C. Io is negative.

Procedure:

1.


2. Switch on the power switch.

3. Switch on the 24V DC switch.

4. Observe the output wave form and thyristor wave form and trace it .

5. Determine the thyristor turnoff time.

6.

Tabulate the output frequency and SCR turn off time.

Tabulation:

SL NO Output frequency SCR turn-off time

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Result Analysis:

Trace the thyristor and load voltages and capacitor voltage, find the dead zone. Also find

how dead zone can be minimized to make the load current continuous.

Questions:

1.

What are the drawbacks of basic series inverter?

2.

How can we overcome these drawbacks by modified series inverter?

3.

How half bridge inverter is superior to all?

4. What are the drawbacks of half bridge series inverter?

5. What do you mean by dead zone?

6. How can we make the load current continuous.

7/18/2019 Aug2014 PELab




Experiment No-8:


To study the operation of cycloconverter and observe the output waveforms

for R and R-L Load.

Apparatus Required:

1. Cycloconverter Module.

2. CRO & CRO Probe.

3.

Patch Chords.

Circuit Diagram:

Theory:

Output frequency is less than the input frequency. Forced commutation is not required. It

requires only natural commutation. Midpoint Transformer is in the ratio 1:1:1. P1, P2 are

positive group thyristors because they can only operate when supply is positive. Similarly N1, N2 are negative group thyristors because they can only operate when supply is

negative.

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Operation:

There is two mode of operation: 1. Continuous mode. 2. Discontinuous mode.

Continuous mode:

During positive half of supply, P1 and N1 are forward biased.

Similarly During negative half of supply, P2 and N2 are forward biased.

The conduction period of each thyristor is 1800 for continuous conduction.

Let consider an example that f 0 = f s/4. For 4 complete input cycles one output cycle is

obtained. Let considered there is a firing angle delay of α.

For continuous mode operation the firing scheme is given in the table:

Period. Operating

thyristor.

Output

voltage Vo

Period. Operating

thyristor.

Output

voltage Voα to (π + α) P1 Vs (4π + α)to(5π +

α)

N2 -Vs

(π + α)to(2π +α)

P2 -Vs (5π + α)to(6π +α)

N1 Vs

(2π + α)to(3π +

α)

P1 Vs (6π + α)to(7π +

α)

N2 -Vs

(3π + α)to(4π +α)

P2 -Vs (7π + α)to(8π +α)

N1 Vs

For discontinuous mode operation the firing scheme is given in the table:

Period. Operatingthyristor.

Outputvoltage Vo

Period. Operating

thyristor.

Outputvoltage Vo

α to β P1 Vs (4π + α)to(4π + α

+ β)

N2 -Vs

β to (π + α) none 0 (4π + α + β)to(5π

+ α)

none 0

(π + α)to(π + α

+ β)

P2 -Vs (5π + α)to(5π + α

+ β)

N1 Vs

(π + α +

β)to(2π + α)

none 0 (5π + α + β)to(6π

+ α)

none 0

(2π + α)to(2π +α + β)

P1 Vs (6π + α)to(6π + α+ β)

N2 -Vs

(2π + α +

β)to(3π + α)


+ α)

none 0

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(3π + α)to(3π +

α + β) P2 -Vs (7π + α)to(7π + α

+ β) N1 Vs

(3π + α +

β)to(4π + α)


+ α)

none 0

Procedure:

1.


2. Now select the desired firing angle.

3. For each selected frequency Observe the load output voltage waveform on CRO.

4. By varying firing angle observe various waveforms.

Tabulation:

Firing angle Output

Frequency

Measured

voltage

Calculated

voltage

% error

Result Analysis:

Trace the load voltage, thyristor voltage. Check whether the rms value of output changes

with frequency change or not for a particular firing angle.

Questions:

1. Does the output voltage affected by frequency change.

2.

Which type of commutation is used in step down cycloconverter?

3.

Write some application of cycloconverter.

4.

Does the output voltage depends on load or not, give reason.

5. Which thyristors are called positive group thyristors and why.

7/18/2019 Aug2014 PELab




Experiment No-9:


To study and trace the phase and line voltage waveform of a IGBT based 3-Ø voltage

source inverter.

Apparatus Required:

1.

Inverter Module and Firing module.

2. CRO & CRO Probe.

3. Patch Chords.

4.

Lamp load (3-phase)

5.

Variac.

Circuit Diagram:

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Theory:

There Phase Voltage Source Inverters:

For providing adjustable frequency power to industrial applications, 3-phase inverters

are more common.

It takes dc supply from battery or rectifier.

It consists of 6 thyristors or IGBTs and 6 diodes. Now a day’s IGBTs are very popular.

It has three arms, each arm has two switches. The naming of switches is in such a way

that the difference between arm switches is 3.

All the switches are so connected that they all should be forward biased by the dc

source.

A large capacitor is connected across source to provide constant dc voltage and also

suppress the harmonics feed back to dc source.

There are two possible of firing the switches

1.

1800 conduction mode. That is, each switch conducts for 1800.

2. 1200 conduction mode. That is, each switch conducts for 1200.

There phase 1800mode VSI:

Assumptions:

1.

Each switch is considered

as ideal switch.

2. Load is star connected.

3.

IGBTs are preferred for

switches.

Each switch conducts for 1800.

There is 1800 firing gap between the arm switches.

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There should be 1200 gap between positive group switches. That means the firing gap

between S1, S3 and S5 is 1200. Similarly the firing gap between negative group switches

S2, S4 and S6 is 1200.

(0 < wt < 600):

S1, S6 and S5 are conducting. Load current flows through the path Vs-

S1-a-R-n-R-b- S6-Vs and also along the path Vs- S5-c-R-n-R-b- S6-Vs.

(600 < wt < 1200):


S1-a-R-n-R-b- S6-Vs and also along the path Vs- S1-a-R-n-R-c- S2-Vs.

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.

(1200 < wt < 1800):


S1-a-R-n-R-c- S2-Vs and also along the path Vs- S3-b-R-n-R-c- S2-

Vs.

.

(1800 < wt < 2400):


S3-b-R-n-R-a- S4-Vs and also along the path Vs- S3-b-R-n-R-c- S2-Vs.

.(2400 < wt < 3000):

S4, S3 and S5 are conducting. Load current flows through the path

Vs- S3-b-R-n-R-a-S4-Vs and also along the path Vs- S5-c-R-n-R-a-

S4-Vs.

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.

(3000 < wt < 3600):


S5-c-R-n-R-a- S4-Vs and also along the path Vs- S5-c-R-n-R-b- S6-Vs.

.

The rms value of phase voltage is given by:

√

The rms value of fundamental component of phase voltage is given by:

√

There phase 1200mode VSI:

Assumptions:

4.

Each switch is considered

as ideal switch.

5.

Load is star connected.

6. IGBTs are preferred for

switches.

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Each switch conducts for 1200. There is 1800 firing gap between the arm switches.

There should be 1200 gap between positive group switches. That means the firing gap

between S1, S3 and S5 is 1200. Similarly the firing gap between negative group switches

S2, S4 and S6 is 1200.

(0 < wt < 60

0

):

S1and S6 are conducting. Load current flows through the path Vs- S1-a-R-

n-R-b- S6-Vs.

(600 < wt < 1200):

S1 and S2 are conducting. Load current flows through the path Vs- S1-a-R-

n-R-c- S2-Vs.

.

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(1200 < wt < 1800):

S3 and S2 are conducting. Load current flows through the path Vs- S3-b-

R-n-R-c- S2-Vs.

(180

0

< wt < 240

0

):

S3 and S4 are conducting. Load current flows through the path Vs- S3-b-R-

n-R-a- S4-Vs.

.

(2400 < wt < 3000):

S4 and S5 are conducting. Load current flows through the path Vs- S5-c-

R-n-R-a- S4-Vs.

.

(3000 < wt < 3600):

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S5 and S6 are conducting. Load current flows through the path Vs- S5-c-R-n-R-b- S6-Vs.

.

The rms value of line voltage is given by: √

The rms value of fundamental component of line voltage is given by:

√

Procedure:

1.

Connect according to circuit diagram.

2.

Set the control module in single pulse either in 1800 or 1200 mode.

3.

Then give power supply to inverter.

4. Observe the tracings across the phase and line voltages.

5. To observe phase current connect CRO probe between Ir and ground.

6.

Measure the rms values of phase and line voltages.

Result Analysis:

Trace the load phase and line voltages, trace the phase currents, measure the voltages and

compare with calculated values and verify the line voltage in 1800 is more than 1200

mode.

Questions:

1.

Which mode has higher line voltage?2. What is the drawback of each mode?

3. How many switches are on at a time in each mode?

4. What is the need of capacitor parallel to DC source?

5.

Commutation gap exit in which mode.

6.

In which mode load current is discontinuous.

7/18/2019 Aug2014 PELab




Experiment No-10:


To study and trace the output waveform of a single Phase AC Voltage Controller Using

TRIAC.

Apparatus Required:

1.

Triac Module and Firing module.

2. CRO & CRO Probe.

3. Patch Chords.

4.

R and R-L load

Circuit Diagram:

Theory:

SCR is an unidirectional device conduct only from A to K by giving a proper

gate signal in forward blocking mode.

A TRIAC is a bidirectional device which can conduct from A to K and K to A

with a proper gate signal.

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As it can conduct in both direction the terms A & K are not applicable to

TRIAC. Its three terminals are MT1 (Main terminal 1), MT2 (Main terminal 2)& Gate.

When a +ve gate voltage w.r.t MT1 is applied in ve half it conducts from MT1

to MT2.

When a +ve gate voltage w.r.t MT2 (or -ve voltage w.r.t MT1) is applied in -ve

half it conducts from MT1 to MT2.

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S1 & S2 get turn OFF naturally at π & 2π respectively due to resistive load as

current falls below IH.

In this experiment we use one TRIAC in place of two switch S1 & S2.

Procedure:

7. Connect according to circuit diagram.

8. Set the control module.

9.

Then give power supply to both modules.

10.

Observe the tracings across the load and TRIAC.

11. Measure load voltage for different firing angle.

Tabulation:

Firing angle Measured loadvoltage

Calculated loadvoltage

% error

Result Analysis:

Trace the load voltage, TRIAC voltage, for both R and R-L load and observe that in R-L

load the output voltage is not regulated till the firing angle is greater than power factor

angle. Measure the voltages and compare with calculated values.

Questions:

1.

How TRIAC is different from SCR.

2.

How can we change TRIAC by SCR for same AC voltage control?

3. What is the condition to get regulated ac voltage in R-L load?

4. To get regulated output voltage load current will be continuous or discontinuous.

5. Give 4 application of TRIAC.

aug2014 pelab

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