atlas itk 2017 - ihep · transient current technique (tct) • check sensor response with tct...
TRANSCRIPT
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IHEP ATLAS ITk-Strip Phase2 Upgrade
Xin SHIOn behalf of the IHEP ATLAS ITk Group
IHEP, CAS 3 November 2017
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Outline
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• ATLAS ITk Upgrade in China Joint effort between IHEP and Tsinghua U; received funding support from MOST (+bid to NSFC) to produce ~1000 barrel strip modules: core contribution of 1.8 MCHF
• Main Research Topics• Design of the front-end readout ASIC (ABCStar)
• Assembly and tests of barrel modules
• Evaluation of CMOS strip sensors
• And more …
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LHCb
CMS
ALICE ATLAS
.
27 km
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LHCPoint1:TheATLASExperiment
TheATLASCollaboration3000Members177Institutes38Countries
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ATLASITkUpgrade
• ATLAS Detector upgrade for the LHC high luminosity upgrade, all silicon tracking device
• ITk-Strip Barrel Layer 3-4:4.8 cm Layer 1-2: 2.4cm
• Radiation hardness (1MeV neq/cm2)Barrel short strip: 1.1×1015Barrel long strip: 0.6×1015
Endcap inner layer strip: 1.6×10155
Strip
Pixel
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ITkSiliconStripDetectorConcept
• Stave/Petal + Mechanics Supported Silicon Modules
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ITkUpgradeProjectTimeline
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ITk-STRIP TDR
Mid-2018: Pre-Production 2019: Production Readiness Reviews
2024: Detector Install
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TheTeam
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Xinchou Lou
8StaffMembers(7IHEP+1THU)
JoaodaCosta HongboZhu Weiguo Lu
XinShi Zhijun Liang Yiming Li XinChen
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MainResearchTopics
• Design of the front-end readout ASIC (ABCStar)
• Assembly and tests of barrel modules
• Evaluation of CMOS strip sensors
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Part1:Front-endASICdesign
• L0 trigger rate increase, redesign the digital readout GF/IBM 130nm CMOS
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Analog
Digital
Power
Previous Version
HCC
ABC
ABC
ABC
ABC
ABC
ABC
ABC
ABC
ABC
ABC HCC*
ABC*
ABC*
ABC*
ABC*
ABC*
ABC*
ABC*
ABC*
ABC*
ABC*
Data flow change
STAR
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ABC StarASIC Design
• Itusesthestandardbinaryreadout architecture• Datapath:amplifier,discriminator,inputregisterblock,pipeline,eventbufferandaclusteralgorithmtocompressdataforoutput
• Itisbeingdesignedtosupportvarioustriggermodes• ItwillbebuiltinGF130nm technology2017.4.11 WeiguoLu@StateKeyLab2017 11
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DigitalReadoutDesignandVerification
• Redesign all digital logic, Verification framework based on SystemVerilog: UVM verification concept used for chip readout for the first time.
• Submit final design by the end of 2017
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IEEE RT2016 Poster ( L. Cheng )TWEPP2016 Conf. Report(W. Lu)
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RecentProgressonASICDesign
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Blocks/tasksAnalog
status Ourcontribution
Blocks/tasksDigital
status Ourcontribution
FE ongoing InputRegisters fixed √Voltage regulator ongoing interested Twostagebuffers fixed √efuse pending Cluster Finder fixed
Analogmonitor pending interested Readout fixed
ESD pending TopLogic fixed √LCBandCommandDecoder
ongoing
hitsAccumulator fixed √Functionalverification
ongoing √
SEUprotection pending interestedDigitalbackend ongoing interested
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Part 2: Assembly and tests of barrel modules
• Produce 50 working modules during pre-production
• Tooling for module handling
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ABC130* Hybrid
Hybrid Control Module
Sensor Power board
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SiliconStripDetectorModule• Silicon Sensor + Hybrid PCB (with Readout ASICs and
control chips) + Power board + Glue and Wire-bonds
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QualityControl
• Based on the prototype study, along with the current ATLAS SCT detector experience, improve the quality control (QC) of module production process
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Receptionandvisualinspectionofcomponents HybridMetrology ASICAttachment HybridMetrology
Wire-bondingElectricalConfirmationTestsThermalTests
Receptionandvisualinspectionofcomponents
HybridElectricalConfirmationTests HybridAttachment ModuleMetrology
Wire-bondingModuleElectricalConfirmationTestsModuleI-VTestsThermalTests
Control board QC
Detector Module QC
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ModuleQCTask:Evaluatemaxno.ofmodulesinabonder– byIHEP
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• Designworkholder for2x2moduleonBondJet820• Releasedthefirstlayout(thanksforCraig’shelp!)• ProcessedatIHEP,willbeevaluatedatRAL
Drawing:YuzhenYang Production:FangChen
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IHEPLabforITkUpgrade• An existing class 1000 Cleanroom with 150m2
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• OGP Flash CNC 300 already purchased
• Hesse BondJet820 is being purchased
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IHEPDedicatedCleanroomforITk-Strip
• A new cleanroom is proposed for the strip production.
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Radiation-hardASICsImportIssue
• Currently all of the radiation-hard ASICs in module (ABC, HCC, power control AMAC, DC-DC and FESAT are NOT allowed to be imported into China!
• Milestone: got export license for GF/IBM ASICs from US Department of Commerce and Export permission from Switzerland government.
• Actively in collaboration with RAL in UK to train our team in parallel
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CollaborationwithRAL• RAL in UK is the leading institution on ATLAS ITk upgrade.
• MoU to be signed with RAL • Staff rotation plan to maintain 2 FTE’s at RAL for the coming years. • Invited RAL collaborators to China. Craig Sawyer will visit IHEP in August
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IHEP Team visited RAL on September 19, 2016
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DummyModuleProductionatRAL
• Use glass-ASICs and plastic hybrid for dummy module production
• Use SmartScope to measure the height of glue
22ASIC
2 4 6 8 10
m]
µTh
ickn
ess
[
0
50
100
150
200
250Expected Thickness
Measured Thickness (Metrology)
Measured Thickness (Spiral Micrometer)
0
100
200
300
1 3 5 7 9
Glue
Thickness
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SensorElectricaltestatRAL
• ATLAS 07 Mini Sensor + ABC130 , Learn basic silicon strip sensor test, measure I-V and Equivalent Input Noise
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偏置电压 -10 V -100 V -300 V
Sensor +ASIC 597.9e 565.9e 563.5e
ASIC 450.5e 449.5e 448.4e
Bias Voltage(V)-300 -250 -200 -150 -100 -50 0
Cur
rent
(uA)
-0.14
-0.12
-0.1
-0.08
-0.06
-0.04
-0.02
0
IV Data from k2410 at resource ASRL12::INSTRIV Data from k2410 at resource ASRL12::INSTR
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Part3:CMOSStripSensorStudy
• Based on CMOS technology, with low price, low material budget, good candidate for future silicon detector
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HR-CMOS(RAL)
HV-CMOS(UCSC/SLAC)
DiffusionReduction
AcceptorRemoval
Trapping
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TransientCurrentTechnique(TCT)
• Check Sensor Response with TCT
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Electrical Test Stand at IHEP TCT at IHEP
Motherboard
Daughterboad
Laser
Optical Focus
FPGA
Top-TCT Edge-TCT
G.Kramberger,AdvancedTransientCurrentTechniqueSystems,PoS(Vertex2014)032
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CHESS1-HRCMOSTest
• Use TCT Scan to test CHESS1-HR Sensor Structure
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CHESS2-HVTest
• Based on analog carrier board, revised CHESS1 testboard, will do TCT scan. Finished wire-bonding at RAL, waiting for temporary export permit.
• Setup DAQ to test the digital readout. Participate in the digital ASIC sensor (ABCN’) design.
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OtherActivities
• EUDAQ2.0 and EUTelescope development in collaboration with DESY
• InvolvedintheITSDAQDevelopment
• Glueheightmeasurementwithwirebonder• StudyonATLAS12Amini-Sensor
• Tobuildhalf-ringpixelusingdummymodules28
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Extremely HighRadiationEffectsonSiliconDetectors
• Study the effects of a beam-loss scenario at the ATLAS
• Assess the tolerance of Strip (Pixel) modules under very high particle fluencies
• Measure the damage threshold using the beam provided by the High-Radiation to Material facility at SPS
• Two tests scheduled in 2017: June and October
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C.Bertella
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ContributionstoIBL• We did not sign on the IBL project, but have made direct
contributions in several areas:
• Function blocks design and more for FE-I4 (W. Wei with CPPM)
• FE-I4 test stand setup and characterization (Y. Lu with LBL)
• Design of the DRX-12 II chip (Y. Zhang)
• FPGA firmware development (Histogramer) for Pixel DAQ (J. Hu)
• Tracking and Vertexing performance studies (Y. Fang with LBL)
30Blocks design, simulation and tape-out
DRX-12 II layout
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Summary
• ChinaATLASITkteamaregainingmomentum.
• Activelyinvolvedinthefollowingmainresearchtopics:
• Design of the front-end readout ASIC (ABCStar)
• Assembly and tests of barrel modules
• Evaluation of CMOS strip sensors
• And more exciting activities to come soon…
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