astrium use case
DESCRIPTION
Astrium Use Case. Main Objectives. Improvement of our skills in HW/SW codesign methods/technologies Explore and identify the optimal architecture for a given algorithm How to verify real time determinism ? How to debug a SoC ? - PowerPoint PPT PresentationTRANSCRIPT
Workshop - November 2011
Main Objectives Improvement of our skills in HW/SW codesign methods/technologies Explore and identify the optimal architecture for a given algorithm How to verify real time determinism ? How to debug a SoC ? Definition of the different types of models required at each step of the
design flow Evaluation of the use of HW models obtained from a HW design flow,
to be used in computer simulators for the integration and validation of critical embedded SW. (Representativity improvement and cost reduction)
Define an tool-aided flow that helps collaboration between different teams
Support to requirements traceability
Workshop - November 2011
Functional ArchitectureImage Processing « starrer »
Moving objects extractionMoving objects trackingLossless compression
MatLab ModelsImage 1000x1000 -> 10000x1000010 Hz100Mb/s of telemetry allocation
Telemetry bandwidth needs reductionGuidance/Navigation/Control
Static detection
Chips correlation
Model fitting
Chips specification
Resampling
Adaptive fusion
Stabilisation
Current imageN
Current MaskN
Out imageN
Main sequence
Geometric modelN
Reference image N-1
Initialisation
Mask Resampling
Reference mask N-1
Geometric modelN-1
Reference image N
Reference maskN
Geometric modelN
Reference image N -1 Resampled
Reference mask N-1 Resampled
Workshop - November 2011
Main Processing StepsImage Registration: computation of the
geometrical model of image distortion thanks to image correlation and re-sampling,
Image Fusion: data volume reduction by eliminating inter-images redundancies.
Stabilization: compensation for pan and tilt of the sensor by a new image re-sampling
Basically, serial processing but pipelining solution are investigated
Workshop - November 2011
Architectures cibléesµP + custom HW blocksHW in charge of a full transformation
(algorithm step)
Pipelining performed between SW stages and HW stages
µP + custom HW operators SW in charge of the full algorithm by using shared HW operators to
accelerate the processing
LEON 3 CPU
Processing Accelerator Interface
AHB decoder/arbiter
AHB Bus
Processing Accelerator Core
SDRAM Controler
AHB/APB Bridge
APB BusIRQ
PA Register I/F Write Data I/FRead Data I/F
wdatardata rvalidreg_wdata reg_writereg_addr
PA IRQ
irq reg_rdata writereadrlast wready wlast
Bus Error
berror
µPInstruction
TCMDataTCM
HW Engine
HW Engine
Local Bus
read
SmartDMA Engine
S
SS
SM
M
External Memory
Controller
S
External Memory
Deb
ug L
ink
Loca
l Bus
Local Bus
writ
e
S
writ
e
S
Workshop - November 2011
Evaluation Criteria (1)Design Space Exploration with performance profiling (functional,
resource usage, power consumption, ...) HW functions fast prototyping thanks to HLSSkeleton generation from IP-XACT DescriptionHW/SW co-simulation:
HW/SW interface validationRepresentative virtual platform for SW development, debug and validation
Automatic documentation generation from models (HW and SW)
Static and dynamic Analysis methods and tools to check real time constraints conformance
Workshop - November 2011
Evaluation Criteria (2)Questions to be answeredWhat can be verified and validated at each
abstraction level of modelling (and compliant with ECSS) ?
What is the position/role of IP-XACT description (only for assembling or the Central Data Base of all the design process)
Workshop - November 2011
Use Case ProcessAlgorithm Functional Modelling with MatlabAlgorithmic C Model (today coded by hand)C Model update for HLS usage
HW/SW partitioning Parallelism extraction
In parallel, developing SystemC/TLM Toolbox (ISS, DMA, Memory Controllers, Traffic Generator, Fault Injection Engines)
Automatic generation of SC/TLM & OBSW skeletons & documentationCoding of the behavioural partsUsing assertion-based verification applied on given IPsAssembling the Virtual PlatformReal Time SW constraint verification with WCET Tools Implementing requirements traceability through the overall process