assembling the ssdl/scu pic17 protoboard
TRANSCRIPT
AG-5 Assembly Guide
750 Naples Street • San Francisco, CA 94112 • (415) 584-6360 • http://www.pumpkininc.com
created by Andrew E. Kalman on Oct 13, 2000 updated on Sep 30, 2001 All trademarks mentioned herein are properties of their respective companies.
Assembling the SSDL/SCU PIC17 Protoboard
Introduction Pumpkin's SSDL/SCU PIC17 Protoboard ("protoboard") is the second in a series of enhanced replacements for the existing PICmicro® prototyping PCB that Stanford University's Space Systems Development Laboratory (SSDL, http://ssdl.stanford.edu/) and Santa Clara University's Santa Clara Remote Extreme Environment Mechanism Laboratory (SCREEM, http://screem.engr.scu.edu/) have been building up by hand from the PICProto64 prototyping board from microEngineering Labs, Inc (http://www.microengineering-labs.com/). CAUTION Please review Special Instructions for REV A Protoboards below before assembling any protoboards. This will ensure their correct operation. Note The PIC17 Protoboard is derived from the SSL/SCU PICmicro Protoboard detailed in Pumpkin's Application Guide AG-1 "Assembling the SSDL/DCU PICmicro Protoboard." Both protoboards share many similar features. The protoboard is a two-sided printed circuit board (PCB), measuring 4.00" x 8.00" x 0.062". It has the following enhancements over the PICProto64:
additional benchtop power connectors via banana jacks
dedicated 9V battery clip (vertical-mount) three different power sources (bench, battery and
system), switch-selectable improved microcontroller reset circuitry built-in two RS-232 channels built-in, with MAX233 driver two serial SPI EEPROMs built-in I2C pull-ups built-in
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DB-9 connectors used throughout for system power, system data, hardware USART (RS-232) and software USART (RS-232)
improved power supply decoupling and distribution improved grounding and noise immunity distributed test points for critical voltages a 12 x 15 hole breadboard area on 0.100" centers with
GND and +5V rails
Additionally, this protoboard is designed around the Microchip® PIC17C756A1 single-chip microcontroller (instead of the PIC16F877 and similar/compatible PICmicros). External memory can be used with the 17C756A when operating in microprocessor or extended microcontroller modes. External memory can be accessed by the 17C756A via the table read and table write instructions. This protoboard supports both external program memory (Flash) and external RAM with configurable memory maps.
CAD Genesis The protoboard was designed in OrCAD SDT v4.1,2 and laid out in PADS-PCB and PADS-2000. The PCB has been assigned a Pumpkin part number of 705-00192, and a project number of 90003. It is currently at Revision A (REV A). The relevant files are:
90003A.sch: OrCAD schematic Pumpkin.lib: OrCAD library Pumpkin2.lib: OrCAD library 90003A.asc: PADS-2000 ASCII job file 90003A.job: PADS-2000 job file 90003A.net: Futurenet netlist 90003A.zip: all PCB CAD files, .zip'd 90003Apd.zip: schematic and PCB verify plots, in
Acrobat (.pdf) format, and Bill of Materials
90003Aps.zip: PCB verify plots, PostScript format
Circuit Description Please refer to Schematics below or 90003A-1.pdf and 90003A-2.pdf in 90003Apd.zip to view the protoboard's schematic. A general description, enhancements over and differences between
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the protoboard and the earlier PICProto64-based version are described below. The CPU U1 is specified as a Microchip® PIC17C756A. Other compatible 16-bit processors (e.g. PIC17C752, PIC17C756, etc.) in a 68-pin PLCC package may also be used. The Oscillator and the Serial (SPI) EEPROM are implemented in a conventional manner. The Reset Circuitry uses a MC33164P-5 micropower reset supervisor to guarantee proper startup and reset on brownout conditions. The 10kΩ value for R5 is recommended to avoid the possibility of PICmicro latch-up. Most of the CPU's pins are available on the Expansion Connector H3. OSC[1..2] should not be used by any external devices. RA[2..5], RB[1..6] and RG[6..7] may or may not be available to external devices, depending on which components have been stuffed on the protoboard. A Duplicate Connector H6 is provided for easy jumpering to the signals present on H3. The EDAC3 Connector H7 has all of U1's remaining pins,4 and can be used to implement external memory on an expansion card instead of on the protoboard. U8-U15 form the 16-bit-wide External Memory System. U8 and U9 demultiplex the multiplexed address and data lines of U1's AD[0..15]. ALE, -OE and WE are the control signals. The 1 Megabit (128K x 8bit) Flash memories U10 and U11 are connected in a conventional manner to span U1's 16-bit address space. The 4 Megabit (512K x 8bit) static RAMs U14 and U155 are configured such that their upper 6 address lines specify an 8K page. These Paged Address bits PA[13..18] are driven by the serial shift register U13, which is part of the protoboard's SPI chain. U13 requires a rising edge on its strobe (STB) pin in order to transfer shifted data to its outputs QA-QH. RAM vs. Flash chip-enable decoding is performed by U12. This decoding can be overridden by setting the EN_RAM signal low (0V), in which case RAM is inaccessible and the entire 16-bit external address space (i.e. all 64K words) maps to Flash. The protoboard's Flash and RAM decoding can be altered by appropriate choice of U12:
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U12 EN_RAM Flash Space RAM Space RAM Banks6
74HC00 false (GND)
0000-FFFFh (64K words) -- --
74HC00 true (+5V)
0000-7FFFh (32K words)
8000-FFFFh (32K words) up to 64
74HC20 false (GND)
0000-FFFFh (64K words) -- --
74HC20 true (+5V)
0000-DFFFh (56K words)
E000-FFFFh (8K words) up to 64
Table 1: Effect of U12 on Flash and RAM Map
Note EN_RAM is reset7 at power-on by the Reset Circuitry, i.e. EN_RAM must explicitly be set (+5V) before external RAM can be accessed. Also, unlike the Serial (SPI) EEPROMs, U13's contents cannot be read via SPI. The DPDT Power Switch and Power Conditioning control power to the protoboard. In the center position, all power is off. In the up position, power comes from either the bench power supply (at J5 and J6) or the 9V battery (at B1), depending on which is greater.8 In the down position, power comes directly from the system power bus through the DB-9 connector H1 and bypasses the regulator U3. LED D3 will light whenever power is on, regardless of the source. The LM2931(A)Z-5.0 (TO-92 package) and LM2940(C)T-5.0 (TO-220 package) +5V fixed voltage regulators are automotive-grade parts which, among other things, have low quiescent currents, tolerate excess Vin, reverse hookup and shorts on the output, etc. The MAX233 RS-232 Transceiver U2 implements two RS-232 DTE (data terminal equipment) ports. Hardware handshaking is not supported. Since these DTE ports are the same (pinout- and connector gender-wise) as is commonly encountered on a PC, you will need a null-modem cable to connect to a PC. Connector H4 is connected through U2 to U1's built-in high-speed USART9 #1, making this a Hardware RS-232 Port. This port is commonly used for debugging. Connector H5 is connected through U2 to U1's built-in high-speed USART #2, making this also a Hardware RS-232 Port. In order to use this port, jumpers J1 and J2 must be connected. Black shorting blocks are provided for these jumpers. If you want to use USART #2 with a device other than U2, disconnect jumpers J1 and J2 and connect RX2 and TX2 to your device (e.g. a modem). If you still want to use RS-232 over H5, connect the two pads Z33 and Z34 to two general-purpose I/O pins on U1 and write a software UART to
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run in U1. The speeds of a software implementation are usually much lower than those of a hardware implementation. Therefore in this configuration H5 is part of a low-speed Software RS-232 Port. 10kΩ I2C Pull-Ups are provided via jumpers J3 and J4. Only one device per I2C bus should have pull-ups enabled. Blue shorting blocks are provided for these jumpers. LED D4 is intended for use as a system status indicator. If U13 is not stuffed then D4 must be connected directly to one of U1's output pins. R7-9 provided a small measure of noise immunity for the three communication ports. R10 and C8 form a Noise Filter between signal ground (GND) and chassis ground (the shields on the DB-9s). Test Points TP1-13 are provided for DC voltages throughout the protoboard. Decoupling Caps are provided for all of the digital circuitry. Special decoupling is provided for the analog supply voltages that serve U1's A/D converter. A Breadboard Area is provided for additional on-board prototyping. GND and +5V Power Busses are provided on the left and right sides, respectively, of the breadboard area. H3's (and therefore U1's) pinout is labeled on the solder side of the PCB to facilitate connections between the processor and the breadboard area. Six Mounting Holes are provided on the PCB. They will accept 4-40 fasteners and up to .250" diameter mounting hardware (e.g. standoffs).
PCB Description The PCB is a conventional double-sided board with 8-, 25- and 50-mil10 traces on a 5 or 25mil grid with 8mil clearance rules. Only through-hole components are used. Signals are routed with 8mil traces and 45-degree bends, whereas power and ground11 are routed with 50mil traces and orthogonal bends. Additionally, no trace may enter a pad with greater than 25mil width.12 A star-grounding scheme is employed, with all ground traces emanating from the "-" terminal of the 9V battery.
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Some additional text legends have been laid down on the copper layers in case the board is fabricated without soldermask and silkscreen. Two large silkscreen pads are provided for writing the serial number and a modification code directly on the PCB with a compatible marker.
Stuffing the PCB Please refer to Schematics below or cover.pdf contained in 90003Apd.zip to view the PCB with silkscreen part outlines and component designators. There are a few isuues to be aware of when populating the protoboard: U1 is socketed to enable connecting the MPLAB-ICE or PICMASTER in-circuit emulator. Note that this is not a ZIF13 socket, and therefore a PLCC extraction tool must be used to remove U1 from its socket. Therefore take extra care when removing or inserting U1. U8, U9, and U12-U15 all are socketed using low-profile sockets. By socketing these chips you can remove the External Memory System entirely in case you wish to run in U1's microcontroller mode. The prototype can accommodate two types of RAM chips 62256 (32Kx8bit) and 628512 (512Kx8bit). U14 and U15 must be of the same type and speed. 62256-type RAMs can come in two different 28-pin PDIP packages: 0.600" width and 0.300" width. In both cases, the orientation is "bottom justified" with respect to the 32-pin 628512-type RAM outlines used for U14 and U15. See Table 2, Figure 1 and Figure 2 for more information.
RAM type Width Position J7 J8
62256 0.600" Pins 1-14 & 15-28 overlap
pins 3-16 & 17-30, respectively, of 32-pin
package outline. on off
62256 0.300" Pins 1-14 are in center of 32-pin package outline.
Pins 15-28 overlap pins 17-30 of 32-pin outline.
on off
628512 0.600" Occupies all 32 pins. off on
Table 2 : Jumper Settings for different RAM types
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Note Settings for jumpers J7 and J8 other than those shown in Table 2 are invalid. Figure 1 shows the positions for pin 1 on the center row of 28 pins when using 62256 type RAMs with 0.600" lead widths for U14 and U15.
Figure 1: Pin 1 Positions for 28-pin 0.600" RAMs
Figure 2 shows the positions for pin 1 on the center row of 28 pins when using 62256 type RAMs with 0.300" lead widths for U14 and U15.
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Figure 2: Pin 1 Positions for 28-pin 0.300" RAMs
U10 and U11 are socketed using ZIF sockets. The 28- and 29-series Flash memories do not support in-circuit serial programming they must be programmed externally. By using high-quality ZIF sockets we're able to ensure a trouble-free, long life of removing the Flash memories for programming and re-installing them. The ZIF sockets accommodate DIP packages with 0.300" and 0.600" lead spacings. H1, H4 and H5 are all plug / male (exposed pins) DB-9 connectors. H2 is a socket / female (no exposed pins) DB-9 connector. Do not interchange the two types! Follow the orientation of all diodes D1-3, electrolytic capacitors C3 and C117-119 and TO-92 packages U3 and U6. Stuff only U3 or U7 not both. The holes for U7 (in a TO-220 package) are larger than, and are located above, those for U3 (in a TO-92 package). Power switch SW2 wobbles in place before soldering solder just a single terminal, and reheat if necessary to orient the switch in a proper, untilted vertical orientation. Then solder the remaining five terminals.
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J6 is a black banana jack, J5 is a red one. These jacks are mechanically fastened (not soldered) to the PCB. To mount each one, remove both nuts and discard the solder tab. The washer immediately under the plastic body must remain on the top (component) side of the PCB. Also, unscrew the knurled upper body 2-3 turns and make sure the upper washer is as far down the threaded shaft as possible14 before proceeding. From the top side of the PCB, place the jack's screw through the PCB, screw one nut on from the back side of the PCB and tighten it down with a 5/16" nut driver you must use Loctite® or a lock washer here or else each banana jack may work its way loose. The battery clip B1 is unfortunately not keyed it can be inserted in one of two orientations. The correct orientation is with the smaller of the two terminals to the left. The correct orientations of the banana jacks and battery clip is shown in Figure 3 below:15
Figure 3: Orientation of Banana Jacks and Battery Clip
When you have finished soldering all of the components to the PCB, mount the 4-40 hardware (screw, lockwasher16 and hex standoff) at each corner to give the PCB some "legs" to raise it high enough to clear the screws of the two banana jacks.
Special Instructions for REV A Protoboards The REV A protoboards were made using Alberta Printed Circuits' (http://www.apcircuits.com/) Proto 1 protoyping service. Therefore these protoboards have neither soldermask nor silkscreen. Please note the special instructions below when stuffing these boards. Be especially careful when soldering the memory area of the board. There are many instances of two 8mil traces passing between pins on a 0.100" grid. Because there is no soldermask, it is easy to unintentionally connect a pin to a nearby trace with solder. Use a fine soldering tip and just enough solder to get the job done.
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The PCB holes for battery clip B1 are a tight fit make sure you have pushed it down flush with the PCB before soldering it in place. The ZIF sockets for U10 and U11 must be installed with their release levers at the edge of the PCB. Otherwise they will not be able to open and close correctly. The PLCC socket for U1 has a required orientation. The arrow in the socket points to pin 1. Insert the socket so that the arrow points towards connectors H3 and H6.
Testing the Populated PCB Once you have stuffed and soldered all the required components, you can test the complete protoboard. Step 1. With U1's socket empty and SW2 in the center position, connect the protoboard to a lab benchtop power supply set for Vout = 6 to 20Vdc. 6Vdc should be adequate,17 but if you have a 9Vdc, 12Vdc or 15Vdc supply that should work, too. Use test clip leads with banana plugs, black for "-" (GND) and red for "+" (+5V). If your benchtop supply has a programmable current limit, set it for around 100mA. Step 2. Turn the system on by moving SW2 to the up position. Touch each chip with your fingertip nothing should be hot. LED D3 should light up. Check TP2 for +5Vdc, using TP3 for GND (0V). If you have anything other than +5Vdc on TP2 then you may have stuffed D2 and/or U3 backwards, or you may have stuffed another component (e.g. U4 or C3) backwards. If you have +5Vdc but D3 is not lit, it's probably soldered in backwards. A fully populated board (less U1, U10, U11, U14 and U15) will draw approximately 30-60mA if substantially more current is being drawn, you may have a problem. Step 3. Check to see that U2 is functioning properly by testing TP1 and TP5 for approximately +10Vdc and 10Vdc, respectively use TP4 for GND. Step 4. Ensure that the reset circuitry is working by checking TP9 for +5Vdc. Press and release SW1 and observe the voltage dropping to 0V, and then back up to +5Vdc. Step 5. If you have a 9V battery handy, you can test it by disconnecting the bench supply and snapping a 9V battery in place
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you should also get +5Vdc at TP2 with SW2 in the up position. If not, verify the orientation of the battery clip B1 and diode D1. Step 6. You can test the system power connector H1 by connecting a system power cable to it, moving SW2 to the down position and repeating the voltage tests above. Further Testing: At this point all of the subsystems above are probably working. Any further testing must be done with a CPU or in-circuit emulator. Note If your application fails to work when executing from Flash memory, you may have an unwanted connection in the External Memory System due to solder bridging between pins and traces (see above). "Stuck" address and data lines can easily been seen on an oscilloscope.
Using the SSDL/SCU PIC17 Protoboard A typical usage scenario is one where the protoboard is powered from a bench supply, with H2 connected to the system I2C data bus, and perhaps with H4 connected to a terminal program running on a PC. You can build additional circuitry on the protoboard by using the breadboard area. U7 (TO-220 regulator) can supply up to 1A for power-hungry components. If you plan to use an external module designed for the (original) SSDL/SCU PICmicro protoboard you'll need to ensure that the module's pinout and its software driver are compatible with H3 and U1, respectively. External modules get all of their power from the protoboard it's not necessary to hook power up to them separately. The Serial (SPI) EEPROMs are already available on the protoboard if you want to use them. You'll need to use the appropriate code module to enable their functionality in your application. If you want to use H5 as a Hardware RS-232 Port, be sure to connect jumpers J1 and J2. The PIC17C756A has up to 12 channels of 10-bit A/D. On the protoboard it is configured with AVdd = +5V and AVss = GND, with extra 0.1µF and 10µF capacitors for noise rejection and the A/D converter's supply pins. If this supply proves to be too noisy
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you can isolate the pins by cutting two traces located on the top side of the board near U1 and U9 as shown in Figure 4 below:
Figure 4: Cut These Traces To Isolate A/D Converter's
Power Supply Pins
You can then feed the A/D converter with a dedicated clean supply by running wires to the two pads Z21 and Z22. The A/D converter also has selectable positive (high) and negative (low) reference voltages. If you want a range other than 0-5V, configure U1's Special Function Registers accordingly and feed RG2 and RG3 with the appropriate voltages. These two pins (VREF- and VREF+) are available on H3 and H6. The IRQ ("I"), Dallas bus ("D") and +5V Dallas ("5") signals from system connector H2 are available on individual breakout pads as shown in Figure 5 below:
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Figure 5: Additional System Connector Breakouts
Integrating the Protoboard with MPLAB If you do not have a PICMASTER or MPLAB-ICE2000 In-Circuit Emulator (ICE), you must develop PIC17 Protoboard applications by externally programming either the processor U1 itself or the Flash memory chips U10 and U11 and then inserting them into their respective sockets. Note Repeatedly removing U1 for programming and reinserting it into its non-ZIF PLCC socket will quickly damage U1 and/or its socket. Therefore it is not recommended. Instead, use the Flash memories for non-ICE-based development. In the non-ICE, Flash-memory development environment you must have a PIC17C756A with the following configuration bits:
• PM2:PM1:PM0: 111 (Microprocessor mode) • FOSC1:FOSC0: 10 (XT oscillator)
This is not the PIC17C756A's default configuration. Therefore you must program U1's configuration words appropriately before it will execute the program stored in U10 and U11. You do not need to put an actual program (i.e. code) into U1. Setting the configuration bits only has to be done once. A PICSTART-Plus with a 68-pin PLCC adapter can be used to set the configuration bits.
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Once U1 is properly configured, you need to program the Flash memories. U1's instruction word length is 16 bits. U10 and U11 are 8 bits wide. Therefore each time you change your application program you must reprogram both U10 and U11. A device programmer with the ability to "split" a source file (e.g. Intel hex) is required. Usually the first (low) device programmed will be U10, and the second (high) will be U11. If you have an ICE for development, then you can disregard the Flash memories while testing and debugging your application. Just use the ICE with U1 in either microcontroller or microprocessor18 mode. This bypasses the on-board Flash memory entirely. Note If you use microcontroller mode with an ICE, remember that your final, flash-based application cannot use PORTC, PORTD or PORTE:0-2. When you are finished, program U10 and U11 and insert them and a pre-configured PIC17C756A onto the protoboard. and your program should run.
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Schematics
Date:
October 14, 2000Sheet
1
of
2
SizeDocument Number
REV
B90003A-1.SCH
A
Title
SSDL/SCU PIC17 Protoboard
www.pumpkinic.com
(415) 584-6360
San Francisco, CA 94112
750 Naples Street
Pumpkin, Inc.
AD0
AD1
AD2
AD3
A0
12
A1
11
A2
10
A3
9
A4
8
A5
7
A6
6
A7
5
A8
27
A9
26
A10
23
A11
25
A12
4
A13
28
A14
3
A15
31
A16
2
A17
30
D0
13
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
O E 2 4
W E 2 9
C E 2 2
A18
1
U14
HM628512
A0
A1
A2
A3
D0
13
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
A0
12
A1
11
A2
10
A3
9
A4
8
A5
7
A6
6
A7
5
A8
27
A9
26
A10
23
A11
25
A12
4
A13
28
O E 2 4
C E 2 2
A14
29
- W E 3 1
A15
3
A16
2
NC
30
VPP/NC
1
U10
28F010
AD0
AD1
AD2
AD3
AD[0..15]
A[0..15]
A0
A1
A2
A3
A0
A1
A2
A3
External Memory System
D0
3
D1
4
D2
7
D3
8
D4
13
D5
14
D6
17
D7
18
-OE
1
G 11
Q0
2
Q1
5
Q2
6
Q3
9
Q4
12
Q5
15
Q6
16
Q7
19
U8
74HC373N
AD0
AD1
AD2
AD3
+5V
CPU
VCC
VDD
+5V
VSS
VEE
T o S P I E E P R O M
RB2
RB3
RB1
RB0
RB1
RB2
RB3
RG4
RG5
RE3
AN11/RF7
21
AN10/RF6
22
AN9/RF5
23
AN8/RF4
24
AN7/RF3
25
AN6/RF2
26
AN5/RF1
27
AN4/RF0
28
AN3/RG0
34
AN2/RG1
33
VREF+/AN0/RG3
31
VREF-/AN1/RG2
32
AVDD
29
AVSS
30
AD0/RC0
3
AD1/RC1
67
AD2/RC2
66
AD3/RC3
65
AD4/RC4
64
AD5/RC5
63
AD6/RC6
62
AD7/RC7
61
AD8/RD0
11
AD9/RD1
10
AD10/RD2
9
AD11/RD3
8
AD12/RD4
7
AD13/RD5
6
AD14/RD6
5
AD15/RD7
4
ALE/RE0
12
-OE/RE1
13
-WE/RE2
14
RB2/PWM1
54
RB3/PWM2
57
RG5/PWM3
39
V D D2
V D D2 0
V D D3 7
V D D4 9
RB0/CAP1
59
RB1/CAP2
58
RG4/CAP3
38
RE3/CAP4
15
RA5/TX1/CK1
42
RA4/RX1/DT1
43
RG7/TX2/CK2
40
RG6/RX2/DT2
41
RA3/SDI/SDA
46
RA2/-SS/SCL
45
RB6/SCK
47
RB7/SDO
48
RA0/INT
60
RA1/TOCK1
44
RB4/TCLK12
56
RB5/TCLK3
55
V S S 1 9
V S S 3 6
V S S 5 3
V S S 6 8
OSC1/CLKIN
50
OSC2/CLKOUT
51
-MCLR/VPP
16
TEST
17U1
PIC17C756-25/L
D0
3
D1
4
D2
7
D3
8
D4
13
D5
14
D6
17
D7
18
-OE
1
G 11
Q0
2
Q1
5
Q2
6
Q3
9
Q4
12
Q5
15
Q6
16
Q7
19
U9
74HC373N
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
ALE
AD4
AD5
AD6
AD7
AD8
A4
A5
A6
A7
A8
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
AD4
AD5
AD6
AD7
A4
A5
A6
A7
A8
A9
A10
A11
A12
PA13
PA14
PA15
Z39
PAD14NC
AD4
AD5
AD6
AD7
A12
A7
A6
A5
PA14
32-pin
AD0
AD1
AD2
A4
A3
A2
A1
A0
Low
SRAM
-OE
-WE
PA16
PA18
PA17J
32-pin
-OE
-WE
Flash
ROM
Low
A9
A10
A11
A12
A13
A14
A15
AD9
AD10
AD11
AD12
AD13
AD14
AD15
ALE
-OE
-WE
ALE
AD9
AD10
AD11
AD12
AD13
AD14
AD15
(SCL)
(SDA)
RA2
RA3
RB4
RB5
RB4
RB5
RA2
RA3
RA1
RA0
(RX1)
(TX1)
(RX2)
(TX2)
RA4
RA5
RG6
RG7
RB6
RB7
RA5
RA4
IN
14
QA
15
QB
1
SCK
11
QC
2
-CL
10
QD
3
QE
4
STB
12
QF
5
-OE
13
QG
6
QH
7
OUT
9
U13
74HC595N
RG1
RG0
RF0
RF1
RF2
RF3
RF4
RF5
RF6
RF7
RB2
RB1
RB6
RAM
Page
Select
SPI
A0
A1
A2
A3
A4
A5
A6
PA13
PA14
PA15
PA16
PA17
PA18
EN_RAM
Socketed
DIP, ZIF
D0
13
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
A0
12
A1
11
A2
10
A3
9
A4
8
A5
7
A6
6
A7
5
A8
27
A9
26
A10
23
A11
25
A12
4
A13
28
O E 2 4
C E 2 2
A14
29
- W E 3 1
A15
3
A16
2
NC
30
VPP/NC
1
U11
28F010
-CE_ROM
AD8
AD9
AD10
AD11
AD12
AD13
AD14
A0
12
A1
11
A2
10
A3
9
A4
8
A5
7
A6
6
A7
5
A8
27
A9
26
A10
23
A11
25
A12
4
A13
28
A14
3
A15
31
A16
2
A17
30
D0
13
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
O E 2 4
W E 2 9
C E 2 2
A18
1
U15
HM628512
-CE_RAM
A0
A1
A2
A3
A4
A5
A6
Socketed
DIP,
AD8
AD9
AD10
AD11
AD12
AD13
AD14
Z40
PAD14NC
AD15
A12
A7
A6
A5
A4
A3
PA14
A7
A8
A9
A10
A11
A12
PA13
PA14
PA15
PA16
PA17J
AD15
D4
LED
R11
470
A7
A8
A9
A10
A11
A12
A13
A14
A15
Socketed
TP10TP
TP11TP
2 1Z21
VIA
-MCLR
RG3
RG2
AVDD
AVDD
AVSS
C1
22P
C2
22P
R6
1M
Y1
16MHz
OSC1
-MCLR
Oscillator
TP9
TP
R5
10K
OSC2
EDAC
Connector
Duplicate
Connector
A/D Test
Points
and
Dedicated
Feeds
AVDD
AVSS
AVDD
AVSS
Expansion
Connector
TP12TP
2 1 Z22
VIA
TP13TP
RG3
RG2
AVSS
+5V
Flash
ROM
High
Socketed
32-pin
DIP, ZIF
-OE
-WE
-CE_ROM
PA17
+5V
SRAM
High
J7
JUMPER
J8
-OE
-WE
-CE_RAM
PA18
PA17J
Socketed
32-pin
DIP,
AD8
AD9
A2
A1
A0
AD10
U1 in microprocessor mode
E000-FFFFh: external RAM, 8K word per page,
lower 56K words in use
0000-DFFFh: external ROM,
MM628512: 1Mbyte total
MM62256: 64Kbyte total
MM628512: J7 open, J8 closed
MM62256: J7 closed, J8 open
1
2
6 4
5
U12A
74HC20N
-CE_RAM
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
A13
A14
A15
RF7
+5V
1 3 5 7 9 11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2 4 6 810
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
H3
H-BOX2X20
RG0
RG1
RG2
RG3
RA1
-MCLR
-OE
-WE
RA0
RE3
+5V
+5V
1 3 5 7 9 11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2 4 6 810
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
H6
H-BOX2X20
RG0
RG1
RG2
RG3
RA1
-MCLR
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
RF7
-OE
-WE
RA0
RE3
+5V
1 3 5 7 9 11
13
15
17
19
2 4 6 8101214161820
H7
H-BOX2X10
ALE
-OE
-WE
AD0
AD2
AD4
AD6
AD8
AD10
AD12
AD14
AD1
AD3
AD5
AD7
AD9
AD11
AD13
AD15
AVDD
Reset
Circuitry
R2
10K
I N2 -RESET1
G N D 3
U6
MC33164P-5
+5V
RESET
C5
0.1U
SW1
KEY-TACT
OSC1
OSC2
RF0
RF1
RF6
RF5
RF4
RF3
RF2
RA2
RA3
RA5
RA4
RG4
RG5
RG6
RG7
OSC1
OSC2
RF0
RF1
RA2
RG4
RG5
RG7
(C) 2000 Pumpkin, Inc.
RF6
RF5
RF4
RF3
RF2
RA3
RA5
RA4
RG6
drawn by: AEK
|LINK
|90003A-2.SCH
9
10
8 12
13
U12B
74HC20N
-CE_ROM
Figure 6: First Page of Schematics
Assembly Guide
16 AG-5 Assembling the SSDL/SCU PIC17 Protoboard
Date:
October 14, 2000Sheet
2
of
2
SizeDocument Number
REV
B90003A-2.SCH
A
Title
SSDL/SCU PIC17 Protoboard
www.pumpkinic.com
(415) 584-6360
San Francisco, CA 94112
750 Naples Street
Pumpkin, Inc.
I2C
Pull-Ups
J3
JUMPER
J4
JUMPER
+5V
omitted by not stuffing U12-15.
like U4-5, has its own strobe.
external RAM.
8. External RAM system may be
9. U13 is on software SPI chain
10. EN_RAM must be high to access
startup with quiet power sources.
5. R6 guarantees oscillator
4. LM78(L)05 may be used as a
lower-performance alternative
for automotive-grade LM2930-
and LM2940-series regulators.
to a PC, use a null-modem cable
omitted by not stuffing them.
with female (socket) DB-9
connectors on both ends.
Notes:
1. To connect either RS-232 port
2. B1, D1-2, J5-6 and U6 may be
VCC
VDD
+5V
VSS
VEE
Power
Connector
System
3. R7-10 may be omitted by
1
2
3
4
5
6
7
8
9
1 01 1
H1
DB-9P
jumpers (i.e. shorts).
replacing them with 0-Ohm
TP6
TP
13 2456SW2
DPDT-PC
+5V_SYS
immunity
DPDT POWER SWITCH:
6. R7-10 provide RS-232 noise
pins are pulled high via R3-4.
7. RA2-3 (open drain, high-current)
11. H3 is partially compatible with
SSDL PIC Protoboard’s H3.
RA2
RA3
Serial
(SPI)
EEPROM
( I2C DATA )
( I2C CLK )
(IRQ)
R3
10K
R4
10K
Z30PAD
Z31PAD
I2C
Connector
System
1
2
3
4
5
6
7
8
9
1 01 1
H2
DB-9S
(DALLAS)
(+5V_DALL)
R7
10
Z32PAD
RB4
+5V
( s/w SCK )
( s/w SD0 )
( s/w SDI )
CS
1
SDO
2
WP
3
HOLD
7
SCK
6
SDI
5
U4
25AA640/P
CS
1
SDO
2
WP
3
HOLD
7
SCK
6
SDI
5
U5
25AA640/P
RB1
RB3
RB2
+5V
off
bench
or
batt
mid
----
---
up
down
----
system
power
conn.
3
1
2
U3
LM2931AZ-5.0
VIN
+5V
TP7
TP
D1
1N4001
VBATT
- 1
+2
B1
9VCLIP-968
CHASSIS
red
1
J5
BINDPOST
1
J6
BINDPOST
Power
Conditioning
C4
0.1U
TP8
TP
D2
1N4001
VBENCH
GND
C3
10U-100
R1
470
D3
LED
green
J2
JUMPER
J1
Z33
PAD
Z34
PAD
RA5
RA4
RG7
RG6
( USART2 -> )
( USART2 <- )
( USART1 -> )
( USART1 <- )
Socketed
C1+
8
C1-
13
P W R7
G N D 6
O1
5
I1
2
O2
3
I2
4
I3
1
O3
18
O4
20
I4
19
C2+11
C2-16
V-
12
V-
17
V+
14
C2+15
C2-10
G N D 9
U2
MAX233CPP
( -> )
( <- )
RS-232
Transceiver
R8
10
RB5
+5V
DTE
RS-232
port
Hardware
1
2
3
4
5
6
7
8
9
1 01 1
H5
DB-9P
1
2
3
4
5
6
7
8
9
1 01 1
H4
DB-9P
R9
10
+10V
-10V
Miscellaneous Parts
Z22
Socket, 68-pin, PLCC
Z19
Socket, 32-pin, DIP/0.600"
Z18
Socket, 32-pin, DIP/0.600"
Z1
PCB, SSDL PIC17 PROTOBOARD
Z23
SBlock, 0.100", black
Z2
Socket, ARIES 32-6554-11
Z3
Socket, ARIES 32-6554-11
Z20
Socket, 8-pin, DIP
Z21
Socket, 8-pin, DIP
C105
0.1U
Decoupling Caps
C102
0.1U
C103
0.1U
C104
0.1U
black
C101
0.1U
+5V
C106
0.1U
C111
0.1U
+5V
+5V
C107
0.1U
C108
0.1U
C109
0.1U
C113
0.1U
C114
0.1U
C112
0.1U
C110
0.1U
C115
0.1U
Z27
Screw, 4-40 slotted pan head (x6)
Z28
Washer, 4-40 split-lock (x6)
Z29
Stdoff, 4-40 Hex 0.187"x.562" (x6)
Z26
SBlock, 0.100", blue
Z25
SBlock, 0.100", blue
Z24
SBlock, 0.100", black
Z35
Socket, 14-pin, DIP
Z36
Socket, 16-pin, DIP
Z37
Socket, 20-pin, DIP
Z38
Socket, 20-pin, DIP
Alternate
(Hi-Power
TO-220)
Regulator
I 1
O3
G 2
U7
LM2940CT-5.0
VIN
+5V
( -> )
( <- )
Noise
R101M
C8
0.1U
Hardware
DTE
RS-232
port
(Debug)
Filter
Z14Z15Z16Z17
Z8
Z9
Z10Z11Z12Z13
Z4
PAD15NCZ5
Z7
Z6
+5V
C119
10U-100
AVDD
AVSS
C116
0.1U
C118
10U-100
C117
10U-100
+5V
Mounting
Holes
ZH1
PAD4
ZH2
PAD4
ZH3
PAD4
ZH4
PAD4
ZH6
PAD4
ZH5
PAD4
Test Points
TP1
TP
TP2
TP
TP3
TP
+5V
+10V
TP4
TP
TP5
TP
-10V
Power Busses & Breadboard Area
(C) 2000 Pumpkin, Inc.
drawn by: AEK
Figure 7: Second Page of Schematics
Assembly Guide
AG-5 Assembling the SSDL/SCU PIC17 Protoboard
17
PCB Layers
Figure 8: PCB Topside Plot
Assembly Guide
20 AG-5 Assembling the SSDL/SCU PIC17 Protoboard
1 The PIC17C756 (an earlier version) may also be used. The PIC17C756A
supports in-circuit serial programming (ICSP). 2 It may be ancient, but it's also reliable. 3 Error Detection And Correction. May refer to memory (and other) systems
which employ a system for determining which copies of multiple instances of important information are still valid in the event of partial corruption.
4 Except AVss, which is not available on any connector. AVss is the A/D converter's lesser supply voltage. AVss must equal Vss on U1.
5 256 Kilobit RAMs (generic type 62256) can also be used. 6 The number of RAM banks is dependent on the size of the RAMs. 7 The resetting of EN_RAM on REV A protoboards is unreliable because of
potential noise on PORTB:6 during reset. Your application should explicitly configure EN_RAM at system startup.
8 That's what diodes D1 and D2 are for. 9 Universal Synchronous/Asynchronous Receiver/Transmitter. 10 One thousandth of one inch, i.e. 0.001". 11 Chassis shields are routed at 25mils on this PCB. 12 This ensures that components can be desoldered with 50mil traces entering a
pad, the heatsink effect greatly reduces one's ability to successfully desolder the component without damaging the trace(s) or pad(s).
13 Zero Insertion Force. 14 This guarantees that the fastening screw that goes through the PCB is extended
to its full length. 15 J5 is shown in red. 16 On top of PCB. 17 This assumes you are using an LM2931- or LM2940-series low-dropout voltage
regulator. If you have substituted a lower-performance part, like a 7805, you may need to raise the voltage to > 7Vdc.
18 In MPLAB, select Memory: Supplied by Emulator under Options > Development Mode > Off-Chip Memory