arcteq is the global leader in arc flash protection and ... · signal output: bo1 (l>) to main...
TRANSCRIPT
2
Arcteq is the global leader in arc flash protection and mitigation solutions. Arcteq products cover all
applications ranging from stand-alone units to complete system solutions including LV and MV arc
quenching devices.
Arcteq products are protecting power generation, utility, industrial, marine, commercial and
institutional power systems in thousands of applications in all continents.
Arcteq arc flash protection products are UL and marine certified.
For complete applications booklet, please visit Arcteq website www.arcteq.fi and download the
document via http://arcteq.fi/downloads/aq-100-arc-flash-protection for AQ SAS™ Standard Arc
Schemes.
3
Index 1. Abbreviations ............................................................................................................................................ 4
2. Main and feeder breakers ......................................................................................................................... 5
2.1. Main and feeder breakers (AQ101-SS1) ............................................................................................ 5
2.2. Main and feeder breakers (AQ101-SS4) ............................................................................................ 9
2.3. Main and feeder breakers (AQ101-SS0) .......................................................................................... 11
3. Multiple mains and feeders ..................................................................................................................... 12
3.1. Multiple mains and feeders (AQ110P-SS4a) ................................................................................... 12
4. Main Tie Main .......................................................................................................................................... 14
4.1. Main Tie Main (AQ101-SS1) ............................................................................................................ 14
4.2. Main Tie Main (AQ101-SS4) ............................................................................................................ 16
4.3. Main Tie Main (AQ101-SS0) ............................................................................................................ 18
5. Multiple Mains and Bus Tie Breaker........................................................................................................ 20
5.1. Multiple mains and bus tie breaker (AQ110P- SS7a) ...................................................................... 20
4
1. Abbreviations
CC – Cable compartment
CB – Circuit Breaker
BB – Busbar
VT – Voltage Transformer
BS – Tie Bus /Tie Circuit Breaker
I> (int.) – Internal overcurrent I> (activated by internal overcurrent module from 3 phase A,
B, C &/or G/N)
I> (ext.) – External overcurrent I> (activated from external binary input(s))
Inc. – Energy source Xfmr, or Gen set
Out. – Outgoing Feeder
SS – Scheme Selection
LHS – Left Hand Side
RHS – Right Hand Side
5
2. Main and feeder breakers 2.1. Main and feeder breakers (AQ101-SS1)
Figure 2-1 Main and feeder breakers (AQ101-SS1)
Main benefits Full selective trip scheme with fast engineering and
simple setting.
HSO channel 2ms tripping time; Relay contact channel ≤7ms tripping time.
Appliable in one high circuit breaker arranagement with shipping splits.
Main Feeder(s) Out. Feeders
Number of Main Feeders 1
Number of Out. Feeders M*
Units Applied AQ110P AQ101
Schemes Applied SS1a SS1
Number of units Applied 1 M*
Selective Trip Yes Yes
Master Trip Yes
50BF(CBFP)** Yes Yes
*) M ≤ 20, max. number of units can be used in the application. **)CBFP time setting: 150ms or 100ms.
6
Trip and I/O description
AQ110P – SS1a L> I> (int.) I/O Description Trip Description
IL, Io
Current inputs Phase IL1, IL2, IL3 and E/F Io.
Measuring current for incomer feeder.
Signal output: HSO1 (I>) to outgoing feeder AQ101-SS1 input BI1.
S1 Sensor channel 1. Monitoring incoming
cable compartment.
Trip criteria: L> only. Trip outputs: T1 (Main CB), T2 (HVCB), T4 (trip alarm).
S2 IL, Io
Sensor channel 2. Monitoring incomer
circuit breaker compartment.
Trip criteria: I> + L>. Trip outputs: T1 (Main CB), T2 (HVCB), T3 (not in use), T4 (trip
alarm). Signal output: HSO2 (MT) to outgoing feeder AQ101-SS1 input
BI2.
S3/S4 IL, Io Sensor channel 3/4. Monitoring busbar
compartment.
Trip criteria: I> + L>. Trip outputs: T1 (Main CB), T3 (not in use), T4 (trip alarm). Signal output: HSO2 (MT) to outgoing units AQ101-SS1 input
BI2.
BI2 IL, Io Binary input 2.
Trip criteria: I> + L> Trip outputs: T1 (Main CB), T3 (not in use), T4 (trip alarm). Signal output: HSO2 (MT) to outgoing feeder AQ101-SS1 input
BI2. Signal input: L> from outgoing feeder AQ101-SS1 output BO1.
Table 2-1: Trip and I/O Description - AQ110P SS1a
L> I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1
IL, Io √
S1 √ √ √
S2 IL, Io √ √ √ √ √ √
S3 IL, Io √ √ √ √ √
S4 IL, Io √ √ √ √ √
BI2 IL, Io √ √ √ √ √
Table 2-2: Trip and I/O logic - AQ110P SS1a
7
AQ101-SS1: L> I> (ext.) I/O Description Trip Description
BI1 Binary input 1. Signal input: BI1 (I>) from Main feeder AQ110P-SS1a output
HSO1.
S1 BI1 Sensor channel 1. Monitoring outgoing
cable compartment.
Trip criteria: I> + L>. Trip output: T1 (outgoing CB), T3 (not in use), T4 (trip alarm). Signal output: BO1 (L>) to main feeder AQ110P-SS1a BI2 after
CBFP setting time.
S2 BI1
Sensor channel 2. Monitoring outgoing
circuit breaker compartment.
Trip criteria: I> + L>. Trip outputs: T2 (CBFP), T4 (CBFP). Signal output: BO1 (L>) to main feeder AQ110P-SS1a input BI2. Signal input: BI2 (MT) from main feeder AQ110P-SS1a output
HSO2.
S3/S4 BI1 Sensor channel 3/4. Monitoring busbar
compartment.
Trip criteria: I> + L>. Trip outputs: T2 (CBFP trip), T4 (CBFP trip alarm). Signal output: BO1 (L>) to main feeder AQ110P-SS1a input BI2. Signal input: BI2 (MT) from main feeder AQ110P-SS1a output
HSO2.
BI2 Binary input 2.
Trip criteria: I> + L> Trip outputs: T1 (outgoing CB), T2 (not in use), T3 (not in use),
T4 (trip alarm). Signal inputs: BI2 (MT) from main feeder AQ110P-SS1a output
HSO2.
Table 2-3: Trip and I/O Description - AQ101 SS1
L> I> (ext.) T1 T2 T3 T4 BO1
BI1
S1 BI1 √ √(CBFP) √ √ √(CBFP)
S2 BI1 √(CBFP) √(CBFP) √
S3 BI1 √(CBFP) √(CBFP) √
S4 BI1 √(CBFP) √(CBFP) √
BI2 √(MT) √(CBFP) √(MT) √(MT)
Table 2-4: Trip and I/O Logic - AQ101-SS1
8
Connections
9
2.2. Main and feeder breakers (AQ101-SS4)
Figure 2-2 Main and feeder breakers (AQ101-SS4)
Main benefits Full selective trip scheme with fast engineering and
simple setting.
HSO channel 2ms tripping time; Relay contact channel ≤7ms tripping time.
Appliable in one or two high circuit breaker arranagement with shipping splits.
Main Feeder(s) Out. Feeders
Number of Main Feeders 1
Number of Out. Feeders M*
Units Applied AQ110P AQ101
Schemes Applied SS1a SS4
Number of units Applied 1 M*
Selective Trip Yes Yes
Master Trip Yes
50BF(CBFP)** Yes Yes
*) M ≤ 20, max. number of units can be used in the application. **)CBFP time setting: 150ms or 100ms.
10
Trip and I/O description
AQ110P – SS1a
L> I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1
IL, Io √
S1 √ √ √
S2 IL, Io √ √ √ √ √ √
S3 IL, Io √ √ √ √ √
S4 IL, Io √ √ √ √ √
BI2 IL, Io √ √ √ √ √
Table 2-5: Trip and I/O logic - AQ110P SS1a
AQ101 – SS4
L> I> (ext.) T1 T2 T3 T4 BO1
BI1
S1 BI1 √ √(CBFP) √ √(CBFP)
S2 BI1 √ √(CBFP) √ √(CBFP)
S3 BI1 √ √ √
S4 BI1 √ √ √
BI2 √(MT) √(MT) √(MT) √(MT)
Table 2-6 Trip and I/O Logic - AQ101-SS4
11
2.3. Main and feeder breakers (AQ101-SS0)
Figure 2-3 Main and feeder breakers (AQ101-SS0)
Trip and I/O description AQ110P – SS1a:
L> I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1
IL, Io √ √
S1/S2/S3/S4 IL, Io √ √ √ √ √ √ √
BI2 IL, Io √ √ √ √ √ √ √
Table 2-7: Trip and I/O logic - AQ110P SS0a
AQ110P – SS0: L> T1 T2 T3 T4 BO1
S1/S2/S3/S4 √ √ √ √ √
BI2 √(MT) √(MT) √(MT) √(MT)
Table 2-8: Trip and I/O Logic - AQ101-SS0
Main benefits No feeder trip selectivity, only Master Trip from
incomer (most common on LV SWGR or LV MCC).
HSO channel 2ms tripping time; Relay contact channel ≤7ms tripping time.
Appliable for one high circuit breaker arranagement with shipping splits.
Main Feeder(s) Out. Feeders
Number of Main Feeders 1
Number of Out. Feeders M*
Units Applied AQ110P AQ101
Schemes Applied SS1a SS0
Number of units Applied 1 M*
Selective Trip No No
Master Trip Yes
50BF(CBFP)** No No
*) M ≤ 20, max. number of units can be used in the application. **)CBFP time setting: 150ms or 100ms.
12
3. Multiple mains and feeders
3.1. Multiple mains and feeders (AQ110P-SS4a)
Figure 3-1: Multi Incomers without Tie Breaker.
Main benefits Full selective trip scheme with fast engineering and
simple setting.
HSO channel 2ms tripping time; Relay contact channel ≤7ms tripping time.
Appliable in one high circuit breaker arranagement with shipping splits.
Main Feeder(s) Out. Feeders
Number of Main Feeders N**
Number of Out. Feeders M*
Units Applied AQ110P AQ101
Schemes Applied SS2a, SS4a SS1
Number of units Applied N** M*
Selective Trip Yes Yes
Master Trip Yes
50BF(CBFP)*** Yes Yes
*) M ≤ 20, max. number of units can be used in the application. **) N = 20-M, number of AQ110 units can be used in incomer feeders. ***)CBFP time setting: 150ms or 100ms.
13
Trip and I/O description
AQ110P-SS2a: L> I> (ext.) I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1
IL, Io √ √
BI1 √
S1 √ √ √
S2 IL, Io
√ √ √ √ √
√ √
BI1 √
S3 IL, Io
√ √ √ √
√ √
BI1 √
S4 IL, Io
√ √ √ √
√ √
BI1
BI2 IL, Io
√ √ √ √
√ √
BI1
Table 3-1: Trip and I/O logic - AQ110P SS2a
AQ110P-SS4a: L> I> (ext.) I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1(L>)
IL, Io √
S1 √ √ √ √(CBFP)
S2 IL, Io
√ √ √ √ √ √ BI2
S3/S4 IL, Io
√ √ √ √ √ BI2
BI1 √(MT) √
(CBFP) √(MT) √(MT)
Table 3-2: Trip and I/O Logic - AQ110P SS4a
AQ101-SS1: L> I> (ext.) T1 T2 T3 T4 BO1
BI1
S1 BI1 √ √(CBFP) √ √ √(CBFP)
S2 BI1 √(CBFP) √(CBFP) √
S3 BI1 √(CBFP) √(CBFP) √
S4 BI1 √(CBFP) √(CBFP) √
BI2 √(MT) √(MT) √(MT) √(MT)
Table 3-3: Trip and I/O Logic - AQ101 SS1
14
*) M ≤ 2
0, m
ax. nu
mb
er of u
nits can
be u
sed p
er section
al bu
sbar in
the ap
plicatio
n.
**)CB
FP tim
e settin
g: 15
0m
s or 1
00
ms.
50
BF (C
BFP
)**
Master Trip
Selective Trip
Nu
mb
er of u
nits A
pp
lied
Schem
es Ap
plied
Un
its Ap
plied
Nu
mb
er of O
ut. Fe
eders
Nu
mb
er of M
ain Fe
eders
Yes
Yes
Yes
2
SS2a
AQ
11
0P
2
Main
Feeder(s)
Yes
Yes
M*
SS1
AQ
10
1
M*
Ou
t. Feeders
4. M
ain Tie
Main
4.1
. M
ain Tie M
ain (A
Q1
01-SS1
)
Main
ben
efits
Fu
ll selective trip sch
eme w
ith fast en
gine
ering an
d sim
ple settin
g.
H
SO ch
ann
el 2m
s tripp
ing tim
e; Relay co
ntact ch
ann
el ≤7m
s tripp
ing tim
e.
C
om
mo
nly u
sed in
LV o
r MV
mu
ltiple u
tilit sou
rces or u
tility & b
ackup
Gen
set,
with
ship
pin
g splits in
min
d as w
ell as ATS sch
em
e if app
lied.
Fig
ure
4-2
Ma
in T
ie M
ain
(AQ
10
1-S
S1
).
15
Trip and I/O Description
AQ110P – SS2a: L> I> (ext.) I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1
IL, Io √ √
BI1 √
S1 √ √ √
S2 IL, Io
√ √ √ √ √
√ √
BI1 √
S3 IL, Io
√ √ √ √
√ √
BI1 √
S4 IL, Io
√ √ √ √
√ √
BI1
BI2 IL, Io
√ √ √ √
√ √
BI1
Table 4-4: Trip and I/O logic - AQ110P SS2a
AQ101 – SS1: L> I> (ext.) T1 T2 T3 T4 BO1
BI1
S1 BI1 √ √(CBFP) √ √ √(CBFP)
S2 BI1 √(CBFP) √(CBFP) √
S3 BI1 √(CBFP) √(CBFP) √
S4 BI1 √(CBFP) √(CBFP) √
BI2 √(MT) √(CBFP) √(MT) √(MT)
Table 4-5: Trip and I/O Logic - AQ101-SS1
16
*) M ≤ 2
0, m
ax. nu
mb
er of u
nits can
be u
sed p
er section
al bu
sbar in
the ap
plicatio
n.
**)CB
FP tim
e setting: 1
50
ms o
r 10
0m
s
50
BF (C
BFP
)**
Master Trip
Selective Trip
Nu
mb
er of u
nits A
pp
lied
Schem
es Ap
plied
Un
its Ap
plied
Nu
mb
er of O
ut. Fe
eders
Nu
mb
er of M
ain Fe
eders
Yes
Yes
Yes
2
SS2a
AQ
11
0P
2
Main
Feeder(s)
Yes
Yes
M*
SS4
AQ
10
1
M*
Ou
t. Feeders
Fig
ure
3-3
Ma
in T
ie M
ain
(AQ
10
1-S
S4
).
4.2
. M
ain Tie M
ain (A
Q1
01-SS4
)
Main
ben
efits
Fu
ll selective trip sch
eme w
ith fast en
gine
ering an
d sim
ple settin
g.
H
SO ch
ann
el 2m
s tripp
ing tim
e; Relay co
ntact ch
ann
el ≤7m
s tripp
ing tim
e.
C
om
mo
nly u
sed in
LV o
r MV
mu
ltiple u
tilit sou
rces or u
tility & b
ackup
Gen
set,
with
ship
pin
g splits in
min
d as w
ell as ATS sch
em
e if app
lied.
17
Trip and I/O Description
AQ110P – SS2a: L> I> (ext.) I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1
IL, Io √ √
BI1 √
S1 √ √ √
S2 IL, Io
√ √ √ √ √
√ √
BI1 √
S3 IL, Io
√ √ √ √
√ √
BI1 √
S4 IL, Io
√ √ √ √
√ √
BI1
BI2 IL, Io
√ √ √ √
√ √
BI1
Table 4-3: Trip and I/O logic - AQ110P SS2a
AQ101 – SS1: L> I> (ext.) T1 T2 T3 T4 BO1
BI1
S1 BI1 √ √(CBFP) √ √(CBFP)
S2 BI1 √ √(CBFP) √ √(CBFP)
S3 BI1 √ √ √
S4 BI1 √ √ √
BI2 √(MT) √(MT) √(MT) √(MT)
Table 4-4: Trip and I/O Logic - AQ101-SS4
18
*) M ≤ 2
0, m
ax. nu
mb
er of u
nits can
be u
sed p
er section
al bu
sbar in
the ap
plicatio
n.
**)CB
FP tim
e settin
g: 15
0m
s or 1
00
ms
50
BF (C
BFP
)**
Master Trip
Selective Trip
Nu
mb
er of u
nits A
pp
lied
Schem
es Ap
plied
Un
its Ap
plied
Nu
mb
er of O
ut. Fe
eders
Nu
mb
er of M
ain Fe
eders
Yes
Yes
Yes
2
SS2a
AQ
11
0P
2
Main
Feeder(s)
No
No
M*
SS0
AQ
10
1
M*
Ou
t. Feeders
Fig
ure
3-3
Ma
in T
ie M
ain
(AQ
10
1-S
S0
).
4.3
. M
ain Tie M
ain (A
Q1
01-SS0
)
Main
ben
efits
N
o feed
er trip sele
ctivity, on
ly Master Trip
from
inco
mer.
H
SO ch
ann
el 2m
s tripp
ing tim
e; Relay co
ntact ch
ann
el ≤7m
s tripp
ing tim
e.
C
om
mo
nly u
sed in
LV o
r MV
mu
ltiple u
tilit sou
rces or u
tility & b
ackup
Gen
set,
with
ship
pin
g splits in
min
d as w
ell as ATS sch
em
e if app
lied.
19
Trip and I/O Description
AQ110P – SS2a:
L> I> (ext.) I> (int.) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1
IL, Io √ √
BI1 √
S1 √ √ √
S2 IL, Io
√ √ √ √ √
√ √
BI1 √
S3 IL, Io
√ √ √ √
√ √
BI1 √
S4 IL, Io
√ √ √ √
√ √
BI1
BI2 IL, Io
√ √ √ √
√ √
BI1
Table 4-6: Trip and I/O logic - AQ110P SS2a
*): HSO1 (I>) is not in use.
AQ101 – SS0:
L> T1 T2 T3 T4 BO1
S1 √ √ √ √ √
S2 √ √ √ √ √
S3 √ √ √ √ √
S4 √ √ √ √ √
BI2 √(MT) √(MT) √(MT) √(MT)
Table 4-7: Trip and I/O Logic - AQ101-SS0
20
*) M ≤ 2
0, m
ax. nu
mb
er of u
nits can
be u
sed p
er section
al bu
sbar in
the ap
plicatio
n.
**) N = 2
0-M
, nu
mb
er o
f AQ
11
0 u
nits can
be u
sed
in p
er section
al bu
sbar.
***)CB
FP tim
e setting: 1
50
ms o
r 10
0m
s
50
BF (C
BFP
)***
Master Trip
Selective Trip
Nu
mb
er of u
nits A
pp
lied
Schem
es Ap
plied
Un
its Ap
plied
Nu
mb
er of O
ut. Fe
eders
Nu
mb
er of M
ain Fe
eders
Yes
Yes
Yes
N**
SS2a
AQ
11
0P
N**
Main
Feeder(s)
Yes
Yes
M*
SS1
AQ
10
1
M*
Ou
t. Feeders
Fig
ure
5-1
. Mu
ltiple
ma
ins a
nd b
us tie
bre
ake
r (AQ
11
0P
-SS
7a
).
5. M
ultip
le M
ains an
d B
us Tie
Breake
r
5.1
. M
ultip
le main
s and
bu
s tie breaker (A
Q1
10P
- SS7a)
Main
ben
efits
Fu
ll selective trip sch
eme w
ith fast en
gine
ering an
d sim
ple settin
g.
H
SO ch
ann
el 2m
s tripp
ing tim
e; Relay co
ntact ch
ann
el ≤7m
s tripp
ing tim
e.
C
om
mo
nly u
sed in
LV o
r MV
mu
ltiple u
tilit sou
rces or u
tility & b
ackup
Gen
set,
with
ship
pin
g splits in
min
d as w
ell as ATS sch
em
e if app
lied.
21
Trip and I/O Description
AQ110P – SS2a (LHS):
L> I> (int.) I> (ext. LHS) I> (ext. RHS) T1 T2 T3 T4 HSO1 (I>) HSO2 (MT) BO1
IL, Io √ √
BI1 √
BI1 √
S1 √ √ √
S2
IL, Io √ √ √ √ √ √ √
BI1 √ √ √ √ √ √
BI1 √ √ √ √ √ √
S3
IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
BI1 √ √ √ √ √
S4
IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
BI1 √ √ √ √ √
BI2
IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
BI1 √ √ √ √ √
Table 5-8: Trip and I/O logic - AQ110P SS2a (LHS)
AQ110P – SS7a (LHS):
L> I> (ext. LHS) I> (int.) T1 T2 T3 T4 HSO1 (int. I>) HSO2 (ext. I>) BO1 (L>)
IL, Io √ √
BI1 √
S1 √ √ √
S2 IL, Io √ √ √ √ √ √ √
BI1 √ √ √ √ √ √
S3 IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
S4 IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
BI2 IL, Io √
(MT)
√ (MT)
√ (MT)
√ √
BI1 √
Table 5-9: Trip and I/O Logic - AQ110P SS7a (LHS)
22
AQ101-SS1 (LHS):
L> I> (ext.) T1 T2 T3 T4 BO1
BI1
S1 BI1 √ √(CBFP) √ √ √(CBFP)
S2 BI1 √(CBFP) √(CBFP) √
S3 BI1 √(CBFP) √(CBFP) √
S4 BI1 √(CBFP) √(CBFP) √
BI2 √(MT) √(CBFP) √(MT) √(MT)
Table 5-10: Trip and I/O Logic - AQ101-SS1 (LHS)
AQ110P – SS2a (RHS):
L> I> (int.) I> (ext. RHS) I> (ext. LHS) T1 T2 T3 T4 HSO1(I>) HSO2 (MT) BO1
IL, Io √ √
BI1 √
BI1 √
S1 √ √ √
S2
IL, Io √ √ √ √ √ √ √
BI1 √ √ √ √ √ √
BI1 √ √ √ √ √ √
S3
IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
BI1 √ √ √ √ √
S4
IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
BI1 √ √ √ √ √
BI2
IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
BI1 √ √ √ √ √
Table 5-11: Trip and I/O logic - AQ110P SS2a (RHS)
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AQ110P – SS7a (LHS):
L> I> (ext. RHS) I> (int.) T1 T2 T3 T4 HSO1 (int. I>) HSO2 (ext. I>) BO1 (L>)
IL, Io √ √
BI1 √
S1 √ √ √
S2 IL, Io √ √ √ √ √ √ √
BI1 √ √ √ √ √ √
S3 IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
S4 IL, Io √ √ √ √ √ √
BI1 √ √ √ √ √
BI2 IL, Io √
(MT)
√ (MT)
√ (MT)
√ √
BI1 √
Table 5-12: Trip and I/O Logic - AQ110P SS7a (RHS)
AQ101-SS1 (LHS):
L> I> (ext.) T1 T2 T3 T4 BO1
BI1
S1 BI1 √ √(CBFP) √ √ √(CBFP)
S2 BI1 √(CBFP) √(CBFP) √
S3 BI1 √(CBFP) √(CBFP) √
S4 BI1 √(CBFP) √(CBFP) √
BI2 √(MT) √(CBFP) √(MT) √(MT)
Table 5-13: Trip and I/O Logic - AQ101-SS1 (RHS)
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