analysis and design of active npc (anpc)

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012 519

Analysis and Design of Active NPC (ANPC)Inverters for Fault-Tolerant Operation of

High-Power Electrical DrivesJun Li, Student Member, IEEE, Alex Q. Huang, Fellow, IEEE, Zhigang Liang, Student Member, IEEE,

and Subhashish Bhattacharya, Member, IEEE

Abstract—Compared with neutral-point-clamped (NPC) invert-ers, active NPC (ANPC) inverters enable a substantially increasedoutput power and an improved performance at zero speed forhigh-power electrical drives. This paper analyzes the operation ofthree-level (3L) ANPC inverters under device failure conditions,and proposes the fault-tolerant strategies to enable continuous op-erating of the inverters and drive systems under single and multipledevice open- and short-failure conditions. Therefore, the reliabil-ity and robustness of the electrical drives are greatly improved.Moreover, the proposed solution adds no additional components tostandard 3L-ANPC inverters; thus, the cost for robust operation ofdrives is lower. Simulation and experiment results are provided forverification. Furthermore, a comprehensive comparison for the re-liability function of 3L-ANPC and 3L-NPC inverters is presented.The results show that 3L-ANPC inverters have higher reliabilitythan 3L-NPC inverters when a derating is allowed for the drivesystem under fault-tolerant operation. If a derated operation isnot allowed, the two inverters have similar reliability for deviceopen failure, while 3L-NPC inverters have higher reliability than3L-ANPC inverters for device short failure.

Index Terms—Active NPC (ANPC), electrical drives, fault toler-ant, high power, multilevel inverter, reliability.

I. INTRODUCTION

MULTILEVEL inverters have found successful applica-tions in medium-voltage high-power electrical drives,

such as mining, pumps, fans, and tractions [1]–[4]. Since mul-tilevel inverters have a large number of power devices, any de-vice failure may cause the abnormal operation of the electricaldrives, and require shutdown of the inverter and the whole sys-tem to avoid further serious damage. However, in some criticalindustrial processes with high standstill cost and safety-aspectconcern, a high reliability and survivability of the drive systemis very important [5], [6]. Therefore, fault-tolerant operation ofmultilevel inverters has drawn lots of interest in recent years, and

Manuscript received September 16, 2010; revised January 21, 2011 andMarch 2, 2011; accepted March 27, 2011. Date of current version January9, 2012. Recommended for publication by Associate Editor J. O. Ojo.

J. Li is with the ABB U.S. Corporate Research Center, Raleigh, NC 27606USA (e-mail: [email protected]).

A. Q. Huang, Z. Liang, and S. Bhattacharya are with the Departmentof Electrical and Computer Engineering and Future Renewable Electric En-ergy Delivery and Management Systems Center, North Carolina State Univer-sity, Raleigh, NC 27695 USA (e-mail: [email protected]; [email protected];[email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2011.2143430

several researchers have addressed the fault-tolerant issues forthe popular multilevel topologies, such as neutral-point-clamped(NPC) inverters [7]–[17], flying capacitor inverters [18]–[20],cascaded H-bridge inverters [21]–[23], and generalized invert-ers [24]. In most fault-tolerant solutions, additional components(such as power devices, fuses, or even phase legs) are requiredto be added to standard multilevel inverters for fault-tolerantoperation. This will increase the cost and may even reduce thereliability of the inverters and drive systems due to employingmore components. Moreover, both device open and short fail-ure may occur in the inverters, depending on the characteristicsand failure mechanism of power devices; thus, a comprehensivefault-tolerant scheme should consider both failure conditions.

Recently, three-level (3L) active NPC (ANPC) inverters wereproposed to overcome the unequal power loss distributionamong the semiconductor devices in 3L-NPC inverters, thus,enabling a substantially increased output power and an im-proved performance at zero speed for high-power electricaldrives [25], [26]. This paper analyzes the operation of 3L-ANPCinverters under device failure conditions and proposes the fault-tolerant strategies to enable continuous operation of the invertersand drive systems for both single device open and short failure.Further investigation shows that 3L-ANPC inverters can con-tinue operating when multiple devices fail simultaneously in oneor even multiple phases. Therefore, the reliability and robustnessof the inverters and electrical drives are greatly improved. More-over, since the proposed solution adds no additional componentsto standard 3L-ANPC inverters, the cost for robust operation ofdrives is lower. Simulation and experiment results are providedfor verification. Finally, a comprehensive comparison for thereliability function of 3L-ANPC and 3L-NPC inverters is pre-sented. The results show that 3L-ANPC inverters have higherreliability than 3L-NPC inverters when a derating is allowedfor the drive system under fault-tolerant operation. If a deratedoperation is not allowed, the two inverters have similar reliabil-ity for device open failure, while 3L-NPC inverters have higherreliability than 3L-ANPC inverters for device short failure.

II. FAULT-TOLERANT DESIGN OF 3L-ANPC INVERTERS

A. Operation Analysis of 3L-ANPC Inverters Under DeviceFailure Conditions

Fig. 1 shows the circuit of a 3L-ANPC inverter. The relationof switching states, switching sequence, and output voltage forphase A of the inverter is given in Table I. In normal operation

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520 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, FEBRUARY 2012

Fig. 1. Circuit of a 3L-ANPC inverter.

TABLE ISWITCHING STATES, SWITCHING SEQUENCE, AND OUTPUT VOLTAGE OF A

3L-ANPC INVERTER

(no device failure occurs), one of the four zero switching states(0U1/0U2/0L1/0L2) is selected to balance the power loss dis-tribution among the devices in the inverter [25]. Under devicefailure condition, due to the symmetrical structure of 3L-ANPCtopology, the failure of Sa 1 /Da 1 and Sa 4 /Da 4 has similar ef-fects on the inverter, and this is also valid for the other pairs:Sa 2 /Da 2 and Sa 3 /Da 3 , Sa 5 /Da 5 , and Sa 6 /Da 6 . Therefore, onlyone from each pair of the devices in phase A will be analyzedin the following fault analysis.

Fig. 2 shows the examples of the current flow path at dif-ferent output voltage levels under the open failure of Sa 1 /Da 1 ,Sa 2 /Da 2 , and Sa 5 /Da 5 , respectively. The positive current direc-tion is defined as flowing out of the phase. As seen, when Sa 1open failure occurs at “+” state, if Ia > 0, as shown in Fig. 2(a),then the phase output is connected to neutral-point (NP) of dc-link instead of positive dc bus. In Fig. 2(c), Sa 2 open failureoccurs at “0U2/0U1” state when Ia > 0, then the phase output isconnected to negative dc bus rather than NP of dc-link. Fig. 2(d)shows that Sa 5 open failure occurs at “0U2/0U1” state when Ia< 0, then the phase output is connected to positive dc bus insteadof NP of dc-link. Due to the incorrect output voltage, the outputcurrent will become unsymmetrical and the NP of dc-link willbe unbalanced. When Da 1 open fault occurs at “+” state andIa < 0, as shown in Fig. 2(b), the condition is even worse sincethe phase current Ia becomes discontinuous due to the cutoffof conduction path, then the induced voltage on load inductorand loop inductor may cause overvoltage on the inverter and

Fig. 2. Examples of current flow path under single device open failure in 3L-ANPC inverters: (a) Sa 1 open-fail, + state, Ia > 0. (b) Da 1 open-fail, + state,Ia < 0. (c) Sa 2 open-fail, 0U2/0U1 state, Ia > 0. (d) Sa 5 open-fail, 0U2/0U1state, Ia < 0.

Fig. 3. Examples of current flow path under single device short failure in 3L-ANPC inverters. (a) Sa 1 /Da 1 short-fail, 0U1/0U2/- state. (b) Sa 2 /Da 2 short-fail, – state. (c) Sa 2 /Da 2 short-fail, 0L1 state. (d) Sa 5 /Da 5 short-fail, +/0L1state.

cause damage. For other device failure cases, the circuit can beanalyzed in the similar way.

Device short failure can cause even more serious problemscompared to open failure. The reason is that under short-failurecondition, the dc-link capacitors may be discharged through ashort-current conduction path directly, and some devices maybreak down due to over current. Moreover, because the voltageof one dc-link capacitor will drop to zero quickly, other de-vices may have to withstand the full dc bus voltage and breakdown due to overvoltage. If we assume that the capacitors anddevices can survive in this condition, the inverter output cur-rents will become unbalanced. Fig. 3 shows the current flowpath under short failure of Sa 1 /Da 1 , Sa 2 /Da 2 , and Sa 5 /Da 5 ,

LI et al.: ANALYSIS AND DESIGN OF ACTIVE NPC (ANPC) INVERTERS FOR FAULT-TOLERANT OPERATION 521

TABLE IISOLUTION FOR SINGLE DEVICE OPEN FAILURE OF A 3L-ANPC INVERTER

respectively. When Sa 1 /Da 1 short failure occurs, if the switch-ing state commutates to “0U1/0U2/−,” as shown in Fig. 3(a),the upper capacitor C1 will be shorted by Sa 1 /Da 1 and Sa 5 .Fig. 3(b) and (c) shows that if Sa 2 /Da 2 short failure occurs, “−”state forms a short-current path for lower capacitor C2 , while“0L1” state provides a short-current path for upper capacitorC1 . If Sa 5 /Da 5 short failure occurs at “+/0L1” state, as shownin Fig. 3(d), the condition is the same as Fig. 3(a).

B. Proposed Fault-Tolerant Strategies of 3L-ANPC Inverters

1) Single Device Open Failure of 3L-ANPC Inverters: Be-sides the power loss balancing function, the ANPC switchesSa 5 and Sa 6 can also provide a fault-tolerant ability for the in-verter. The modified switching states and switching sequencesfor the fault-tolerant operation under single device open fail-ure are given in Table II. After device open failure is detected,the 3L-ANPC inverter transits from normal operation into fault-tolerant operation. Knowing the position of the failed device, anew switching sequence is selected to generate certain switchingstate according to Table II.

As seen, if Sa 5 /Da 5 or Sa 6 /Da 6 fails open, the 3L-ANPC in-verter is derived into a similar configuration as the conventional3L-NPC inverter. The faulty phase is still able to output threevoltage levels, and the maximum modulation index and the out-put voltage waveform quality are the same as normal operation.Moreover, the device power loss balancing function can still beimplemented to some extent during fault-tolerant operation. Forexample, if only Sa 5 fails, while Da 5 is healthy, then besides the“0L1” and “0L2” switching states, the faulty phase can still gen-erate “0U1” and “0U2” switching states when the phase currentis positive, which can be used for power loss balancing.

If any single device open failure occurs among Sa 1 /Da 1through Sa 4 /Da 4 , the output terminal of the faulty phase needsto be connected to the NP of dc-link. The modulation signalsalso need to be modified in order to maintain the balanced three-

phase line-to-line voltages. In carrier-based SPWM modulationof 3L-ANPC inverters, the references of the phase voltages innormal operation are expressed by (1). In this paper, we assumethe maximum modulation index is 1 for linear modulation undernormal operation. It is worth to mention that if zero-sequencecomponent injection is used for SPWM modulation, the maxi-mum modulation index can reach 1.15 under normal operation.However, since zero-sequence component injection is not thefocus of this paper, we do not discuss this aspect in the follow-ing sections. When the faulty phase can only output “0” voltagelevel, instead of using the balanced phase voltages as the ref-erence signals, we must modify the reference signals to ensurethat the line-to-line voltages are balanced in 3L-ANPC invert-ers. Therefore, a new set of phase voltage references is providedin (2). As seen, to avoid over modulation, the maximum modu-lation index is limited to 0.577 during fault-tolerant operation,which is 1/

√3 of that in normal operation. Moreover, the free-

dom degree of zero-sequence component injection is also lostfor the SPWM modulation:

⎧⎪⎪⎪⎨

⎪⎪⎪⎩

Va = m sin (wt)

Vb = m sin(

wt − 2π

3

)

Vc = m sin(

wt +2π

3

) (1)

⎧⎪⎪⎨

⎪⎪⎩

Va = 0Vb = −

√3m sin

(wt +

π

6

)

Vc =√

3m sin(

wt +2π

3+

π

6

) (2)

where m is modulation index, Va , Vb , and Vc are phase voltagereferences, and ω is fundamental frequency.

2) Single Device Short Failure of 3L-ANPC Inverters: Fordevice short failure, we need to avoid using the switching statesand switching sequences that can construct short-current pathfor the dc-link capacitors. Two solutions are proposed here.

In solution I, the modified switching states and switching se-quences are given in Table III. In this scheme, when Sa 1 /Da 1 orSa 4 /Da 4 has short failure, the faulty phase can still output threevoltage levels by choosing proper switching sequence; thus, theoutput voltage and current of the inverter are almost the sameas those in normal operation. For the other device short-failurecases, we can use the similar method as that for device openfailure to connect the faulty phase to the NP of dc-link, andmodify the reference signals as (2). Accordingly, the maximummodulation index will be reduced to 0.577. However, the draw-back of solution I is that certain devices have to withstand thefull dc bus voltage under Sa 1 /Da 1 or Sa 4 /Da 4 short-failure con-dition. For example, when Sa 1 /Da 1 fails short, overvoltage willappear across Sa 2 /Da 2 at “−” state according to Table III. Simi-larly, when Sa 4 /Da 4 fails short, the voltage across Sa 3 /Da 3 willbe full DC bus voltage at “+” state. For a standard 3L-ANPCinverter, the voltage rating of the employed power devices islower than the dc bus voltage (theoretically, equal to half of thedc bus voltage). For example, a 3L-ANPC inverter with 5-kV dcbus voltage usually employs 4.5-kV power devices. Therefore,


TABLE IIISOLUTION I FOR SINGLE DEVICE SHORT FAILURE OF A 3L-ANPC INVERTER

TABLE IVSOLUTION II FOR SINGLE DEVICE SHORT FAILURE OF A 3L-ANPC INVERTER

some devices may take the risk to break down due to overvoltageduring fault-tolerant operation with solution I.

To overcome the drawback of the first solution, solution II isproposed, as shown in Table IV. In this scheme, no matter whichdevice fails in short, the faulty phase is always connected to theNP of dc-link, and the reference signals are modified accordingto (2). By doing so, the maximum modulation index will bereduced to 0.577 and the output power rating of the 3L-ANPCinverter will be reduced. However, overvoltage will not appearon any device, and it can be applied for any standard 3L-ANPCinverter without special requirement on the voltage rating of theinner devices. In this paper, we only focus on solution II.

C. Simulation and Experiment Verification

To verify the proposed fault-tolerant strategies, simulation isimplemented in MATLAB/Simulink. The simulation parame-ters are: dc bus voltage Vdc = 200 V, dc-link capacitors C1 =C2 = 6.6 mF, carrier-based SPWM modulation, switching fre-quency fsw = 1.5 kHz, modulation index = 0.8, fundamentalfrequency f = 60 Hz, and inductive load (R = 2 Ω and L = 4mH). In simulation, we assume the fault occurs and is detectedat 0.05 s.

Figs. 4–6 show the NP voltage of dc-link and the load currentwaveforms without and with the proposed control for singledevice open failure on Sa 1 /Da 1 , Sa 2 /Da 2 , and Sa 5 /Da 5 , respec-

Fig. 4. NP voltage and load current waveforms under Sa 1 /Da 1 open failure.(a) Without proposed control. (b) With proposed control.

tively. Figs. 7 and 8 show the NP voltage of dc-link and load cur-rent waveforms without and with the proposed control for singledevice short failure on Sa 1 /Da 1 and Sa 2 /Da 2 , respectively.

The proposed fault-tolerant control strategies are verified ona 5-kW 3L-ANPC inverter prototype. The power devices are



Powerex CM75DY-24 H IGBT modules. The controllers are TITMS320F2812 DSP and Altera FLEX10 KA FPGA. The mainexperiment parameters are: dc bus voltage Vdc = 70 V, dc-linkcapacitors C1 = C2 = 12 mF, carrier-based SPWM modulation,switching frequency fsw = 2 kHz, modulation index = 0.8,


fundamental frequency f = 50 Hz, and inductive load (R = 4 Ωand L = 2.5 mH).

Figs. 9–11 show the NP voltage, output currents, faulty phasevoltage, and line-to-line voltage waveforms (from top to bottom)without and with the proposed control for single device open


Fig. 7. NP voltage and load current waveforms under Sa 1 /Da 1 short failure.(a) Without proposed control. (b) With proposed control.

failure on Sa 1 /Da 1 , Sa 2 /Da 2 , and Sa 5 /Da 5 , respectively. Figs. 12and 13 show the NP voltage, output current, faulty phase voltage,and line-to-line voltage waveforms (from top to bottom) withthe proposed control for single device short failure on Sa 1 /Da 1and Sa 2 /Da 2 , respectively.

The simulation and experiment results show that with theproposed control strategies, under Sa 5 /Da 5 open-failure condi-tion, 3L-ANPC inverters can still output three voltage levels.

Fig. 8. NP voltage and load current waveforms under Sa 2 /Da 2 short failure.(a) Without proposed control. (b) With proposed control.

Therefore, the faulty phase voltage, the line-to-line voltage, andthe output currents are almost the same as those in normal op-eration. The NP voltage of dc-link is still balanced. When thedevice failure occurs in Sa 1 /Da 1 or Sa 2 /Da 2 regardless of open


Fig. 9. Waveforms under Sa 1 /Da 1 open failure. (a) Without proposed control.(b) With proposed control.

or short failure, the output currents are still stable and continuousby using the proposed control. However, the current amplitudeis reduced, which is limited by the maximum modulation in-dex. The NP voltage ripple becomes slightly larger comparedto normal operation because the current of the faulty phase isalways connected to the NP of dc-link. However, the voltageand current waveforms show that this NP voltage ripple will notimpact the proper operation of the 3L-ANPC inverters.

Fig. 10. Waveforms under Sa 2 /Da 2 open failure. (a) Without proposed con-trol. (b) With proposed control.

III. ANALYSIS FOR MULTIPLE DEVICE FAILURE OF 3L-ANPCINVERTERS

In this section, we analyze the fault-tolerant ability of 3L-ANPC inverters under multiple device open and short failure inone or even multiple phases simultaneously.


Fig. 11. Waveforms under Sa 5 /Da 5 open failure. (a) Without proposed con-trol. (b) With proposed control.

A. Multiple Device Open Failure of 3L-ANPC Inverters

Table V summarizes the status of the devices and their impacton the status of the faulty phase of 3L-ANPC inverters undermultiple device open-failure conditions. To describe the faultyphase status, “healthy” means no device fails in the phase. “Noreduction fault” (NRF) means the faulty phase can still gener-ate “+”, “0” and “−” levels. “NRF-2L” means the faulty phase

Fig. 12. Waveforms under Sa 1 /Da 1 short failure with proposed control.

Fig. 13. Waveforms under Sa 2 /Da 2 short failure with proposed control.

can only generate “+” and “−” levels. “Reduction fault” (RF)means the faulty phase can only generate “0” level. For exam-ple, if Sa 1 /Da 1 through Sa 4 /Da4 are all healthy, then even if Sa 5and Sa 6 fail simultaneously, the faulty phase still has “NRF”status. In another example, if Sa 2 /Da 2 and Sa 5 /Da 5 are healthy,the faulty phase still has “RF” status even if all the other de-vices in the phase fail together. According to the phase statusshown in Table V, we can summarize the possible fault-tolerant


TABLE VOPERATION UNDER MULTIPLE DEVICE OPEN FAILURE (IN ONE PHASE) IN A

3L-ANPC INVERTER

TABLE VIFAULT TOLERANT CAPABILITY OF A 3L-ANPC INVERTER UNDER MULTIPLE

DEVICE OPEN-FAILURE CONDITIONS

operations for a three-phase 3L-ANPC inverter under multipledevice open-failure conditions, as given in Table VI. Dependingon the phase status, the fault-tolerant operation can be classifiedinto three modes. For modes 1 and 2, they have the same max-imum modulation index as normal operation. For mode 3, themaximum modulation index is reduced to 0.577. Moreover, onlymode 1 allows the same waveform quality as normal operation.To understand these operations, the analysis based on voltagevector diagram of a 3L-ANPC inverter is used for explanation.

If the status of all three phases are either “healthy” or “NRF,”then each phase still generates three output voltage levels “+”,“0,” and “−.” In the voltage vector diagram shown in Fig. 14(a),all the voltage vectors are available; therefore, the 3L-ANPCinverter can operate like normal operation. If “NRF-2L” existsin the phase status, then considering the worst case, in which thestatus of all three phases are “NRF-2L,” there are still six criticalvoltage vectors available on the external limit of the vector dia-gram, as shown in Fig. 14(b). Therefore, the inverter can operatelike a two-level inverter. The waveform quality is reduced butthe maximum modulation index is the same compared to thenormal operation.

When the status of one phase (e.g. phase A) is “RF,” then ifthe status of the other two phases are “healthy” or “NRF,” theavailable voltage vectors are shown in Fig. 14(c). As seen, thesix critical voltage vectors on the perimeter of the inner hexagonare still available. Therefore, the fault-tolerant operation can be

obtained, while the maximum modulation index is limited to0.577. Now, we consider an even worse case compared to theaforementioned cases: if the status of the other two phases is“NRF-2L,” then Fig. 14(d) shows the available four voltagevectors under this condition. In fact, the equivalent circuit of the3L-ANPC inverter under this operation mode is topologicallyidentical to the four-switch three-phase inverter, which has beenpresented to achieve the fault-tolerant operation of a two-levelinverter in [6]. Therefore, the 3L-ANPC inverter is still able tooperate under this condition, while the maximum modulationindex is reduced to 0.577.

If the status of two phases (e.g. phases A and B) are “RF,” theneven if the third phase is “healthy,” only three voltage vectorsare available, which are (0 0 −), (0 0 0), and (0 0 +). In thiscase, the 3L-ANPC inverter cannot continue operating.

We notice that, in [8], another possible fault-tolerant oper-ation was proposed for 3L-NPC inverters, which also appliesfor 3L-ANPC inverters. This solution uses only one dc-link ca-pacitor to generate a two-level voltage waveform. For example,if Sa 1 /Da 1 , Sb1 /Db1 , and Sc1 /Dc1 fail together, then the faultyphases can only generate “0” and “−” output voltage levelsusing the lower dc-link capacitor. Fig. 15 shows the availablevoltage vectors. In this condition, the 3L-ANPC inverter can op-erate like a two-level inverter, while the maximum modulationindex is reduced to 0.577. Similarly, instead of using the lowerdc-link capacitor, we can also use the upper dc-link capacitorto achieve fault-tolerant operation of 3L-ANPC inverters whenSa 4 /Da 4 , Sb4 /Db4 , and Sc 4 /Dc4 fail together.

B. Multiple Device Short Failure of 3L-ANPC Inverters

Table VII summarizes the status of the devices and theirimpact on the status of the faulty phase of 3L-ANPC invert-ers under multiple device short-failure conditions. As seen, thefaulty phase can only generate “0” output voltage level underany device short-failure condition, classifying the phase statusto be “RF.” For example, if Sa 1 /Da 1 and Sa 4 /Da 4 are healthy,then even if all the other devices in the phase fail simultaneously,the faulty phase still has the “RF” status. In another example,as long as Sa 2 /Da 2 , Sa 4 /Da 4 , and Sa 5 /Da 5 are all healthy, thefaulty phase still has the “RF” status even if all the other devicesin the phase fail together. According to the proposed controlstrategies, Table VIII summarizes the fault-tolerant capabilityof 3L-ANPC inverters under multiple device short-failure con-ditions. It shows that only one phase status can be “RF,” whilethe status of the other two phases must be “healthy.” The in-verter will operate like a two-level inverter, while the maximummodulation index is reduced to 0.577.

IV. RELIABILITY COMPARISON FOR 3L-NPCAND 3L-ANPC INVERTERS

The circuit of a 3L-NPC inverter is similar to Fig. 1, exceptthat the NPC switches S5 and S6 in each phase are removed. Themain components and their count for reliability calculation of thetwo inverters are listed in Table IX. It is usually considered thatadding more devices will reduce the reliability of the inverter.


Fig. 14. Vector diagram of 3L-ANPC inverters under multiple device open failure conditions.

Fig. 15. Vector diagram of 3L-ANPC inverters using lower dc-link capacitorfor fault tolerant operation.

TABLE VIIOPERATION UNDER MULTIPLE DEVICE SHORT FAILURE (IN ONE PHASE) IN A

3L-ANPC INVERTER

TABLE VIIIFAULT TOLERANT CAPABILITY OF A 3L-ANPC INVERTER UNDER MULTIPLE

DEVICE SHORT-FAILURE CONDITIONS

In this section, we will carry out a comprehensive reliabilitycomparison for 3L-NPC and 3L-ANPC inverters.

A. Fault-Tolerant Operation of 3L-NPC Inverters

First, using the similar analysis approach for 3L-ANPC in-verters, we summarize the fault-tolerant operation of 3L-NPCinverters in the following.

1) For single device open failure, the phase status is: “NRF-2L” for D5 or D6 failure, and “RF” for S1 /D1 , D2 , D3 , andS4 /D4 failure. S2 and S3 must be healthy for fault-tolerantoperation.

TABLE IXCOMPONENTS AND THEIR COUNT OF 3L-NPC AND 3L-ANPC INVERTERS FOR

RELIABILITY CALCULATION

TABLE XOPERATION UNDER MULTIPLE DEVICE OPEN FAILURE (IN ONE PHASE) IN A

3L-NPC INVERTER

TABLE XIOPERATION UNDER MULTIPLE DEVICE SHORT FAILURE (IN ONE PHASE) IN A

3L-NPC INVERTER

2) For single device short failure, S1 /D1 and S4 /D4 must behealthy for fault-tolerant operation. For any other devicefailure, the phase status is “RF.”

3) Tables X and XI summarize the status of the devices andtheir impact on the status of the faulty phase of 3L-NPCinverters under multiple device open and short-failure con-ditions, respectively.

4) Tables VI and VIII are still valid for 3L-NPC inverters.

B. Reliability Analysis Techniques

According to the MIL-HDBK-217F military standard [27],the failure density function of a component is given by (3).The reliability function of a component gives the probability of


TABLE XIICOMPONENT FAILURE RATES FOR RELIABILITY CALCULATION

survival until time t, given by (4)

f(t) = λe−λ·t (t > 0) (3)

R(t) = 1 −∫ t

0f(t)dt = 1 − (1 − e−λ·t) = e−λ·t (4)

where failure rate λ is the frequency at which a system or com-ponent fails. It is usually given in failure in time (FIT), where 1FIT is equal to one failure within 109 operating hours.

To evaluate the reliability function of an inverter consistingof a number of components, depending on the complexity andredundancy characteristics of the inverter, different computa-tion methods can be used, such as series-connected system andk-out-of-n: G system [28], [29]. However, due to the complicatedfault-tolerant operation of 3L-NPC and 3L-ANPC inverters, ourapproach is to aggregate the component and device failure ratesto evaluate the inverter overall reliability function, which meansthe inverter reliability function should be derived from the sumof all the possible fault tolerant operations. In this paper, theinverter reliability is analyzed for a general purpose rather thanan accurate reliability engineering calculation. Some factors,such as stress factor and temperature factor, are not consid-ered. The components included for the reliability analysis areswitches and their gate drivers, antiparallel diodes, NPC diodes,snubber/clamp circuit, and dc-link capacitors. The failure ratesof these components are listed in Table XII [30], [31]. Sincefor any fault tolerant operation, the dc-link capacitors and thesnubber/clamp circuits must be healthy, they can be viewed as awhole part, and its reliability function is given by the following:

Q = (e−λ4 t)2(e−λ5 t)2 . (5)

The reliability function for 3L-ANPC and 3L-ANPC invertersare derived in the following.

1) Reliability Function of 3L-NPC Inverters: First, we de-fine that Tx|x=a,b,c is the probability that all the devices in phasex are healthy, as given by the following:

Ta,b,c = (e−λ1 t)4(e−λ2 t)2(e−λ3 t)2 . (6)

1) For single device short failure:

Sx1 /Dx1 and Sx4 /Dx4 in all three phases must be healthy toensure the continuous operating of 3L-NPC inverters. We defineXx|x=a,b,c as the probability that only one device from Sx2 , Dx2 ,Sx3 , Dx3 , Dx5 , and Dx6 in phase x fails, as given by (7). Then,

the inverter reliability function is derived by (8)

Xa,b,c = 2(1 − e−λ1 t)(e−λ1 t)2(e−λ2 t)4(e−λ3 t)2

+ 2(1 − e−λ2 t)(e−λ1 t)4(e−λ2 t)3(e−λ3 t)2

+ 2(1 − e−λ3 t)(e−λ1 t)4(e−λ2 t)4(e−λ3 t) (7)

R = (TaTbXc + TbTcXa

+ TaTcXb + TaTbTc)Q. (8)

If output voltage reduction is not allowed during the fault-tolerant operation, which means the maximum modulation indexis the same as normal operation, then all the devices in the in-verter must be healthy. Therefore, the reliability function of theinverter is derived by the following:

R = TaTbTcQ. (9)

2) For multiple device short failure:

For multiple device short-failure conditions, the failure canonly occur in one phase, while the other two phases must be“healthy.” Therefore, we define Xx|x=a,b,c as the probabilitythat the status of phase x is “RF” in this case, as given by thefollowing:

Xa,b,c = T̄1T2T4D5D̄6 + T1 [T̄4T3

× D6D̄5 + T4(1 − T2T3D5D6)] (10)

where Tm |m= 1−4 is the probability that both devices in thepair are healthy. For example, T1 represents the probability thatboth Sx1 and Dx1 are healthy. T̄m = 1 − Tm represents theprobability that one or both devices in the pair fail. Dm |m= 1−6is the probability that diode Dm is healthy. D̄m = 1 − Dm isthe probability that diode Dm fails.

Therefore, (10) can be expressed by the following:

Xa,b,c =(1 − (e−λ1 t)(e−λ2 t)

)(e−λ1 t)2(e−λ2 t)2

× (e−λ3 t)(1 − e−λ3 t)

+(1 − (e−λ1 t)(e−λ2 t)

)(e−λ1 t)2(e−λ2 t)2

× (e−λ3 t)(1 − e−λ3 t)

+ (e−λ1 t)2(e−λ2 t)2(1 − (e−λ1 t)2(e−λ2 t)2(e−λ3 t)2

).

(11)

Then, the inverter reliability function is the same as (8) bysubstituting equation (11).

If output voltage reduction is not allowed during fault-tolerantoperation, the reliability function of the inverter is the same as(9).

3) For single device open failure:

Sx2 and Sx3 in all three phases must be healthy for the suc-cessful operation. We define Xx|x=a,b,c as the probability thatone device from Sx1 , Sx4 , and Dx1 through Dx6 in phase x fails,


as given by the following:


+ 4(1 − e−λ2 t)(e−λ1 t)4(e−λ2 t)3(e−λ3 t)2

+ 2(1 − e−λ3 t)(e−λ1 t)4(e−λ2 t)4(e−λ3 t). (12)

Then, the inverter reliability function is the same as (8) bysubstituting equation (12).

If output voltage reduction is not allowed during the fault-tolerant operation, then Dx5 or Dx6 in phase x is allowed to fail,while Sx1 , Sx4 , Dx1 through Dx4 in phase x must be healthy.Accordingly, we need to modify (12) into the following:

Xa,b,c = 2(1 − e−λ3 t)(e−λ1 t)4(e−λ2 t)4(e−λ3 t). (13)

Then inverter reliability function is the same as (8) by substitut-ing equation (13).

4) For multiple device open failure:

For multiple device open-failure conditions, it allows at mostone faulty phase to have “RF” status, while the status of theother two phases can be “healthy” or “NRF-2L.” We defineX1|x=A,B ,C as the probability that all of Sx1 , Sx4 , Dx1 , and Dx4

in phase x are healthy equaling to (e−λ1 t)2(e−λ2 t)2 , X2|x=A,B ,C

is the probability that all of Sx2 , Sx3 , Dx5 , and Dx6 in phasex are healthy equaling to (e−λ1 t)2(e−λ3 t)2 , and X3|x=A,B ,C isthe probability that both Dx2 and Dx3 in phase x are healthyequaling to (e−λ2 t)2 . Tx|x=a,b,c is defined as the probabilitythat all of the devices Sx1 /Dx1 through Sx4 /Dx4 in phase x arehealthy, as given by the following:

Ta,b,c = (e−λ1 t)4(e−λ2 t)4 . (14)

Then, the inverter reliability function is shown in the followingby substituting equation (14):

R = [(1 − A1A3)A2TbTc + (1 − B1B3)B2

× TaTc + (1 − C1C3)C2TaTb + TaTbTc ]Q. (15)

However, (15) does not consider the fault tolerant operation,in which only one dc-link capacitor is used to generate a two-level waveform, as shown in Fig. 15. Therefore, we also need tocalculate the reliability function under this operating condition,and exclude the common part from the reliability function in (15)in order to avoid double counting. We define T as the probabilitythat all the Sx4 , Dx4 , and Dx3 in the three phases are healthyequaling to (e−λ1 t)3(e−λ2 t)6 . Px|x=a,b,c is the probability thatall the devices Sx1 , Dx1 , and Dx2 in phase x are healthy equalingto (e−λ1 t)(e−λ2 t)2 . P̄ x|x = a, b, c is the probability that one ormore failure occur in Sx1 , Dx1 , and Dx2 in phase x equaling to1 − (e−λ1 t)(e−λ2 t)2 . Then, the inverter reliability function canbe express by the following:

R = 2A2B2C2T (P̄a P̄bPc

+ P̄b P̄cPa + P̄a P̄cPb + P̄a P̄b P̄c)Q. (16)

TABLE XIIIPOSSIBLE OPERATING CONDITIONS OF A 3L-ANPC INVERTER FOR MULTIPLE

DEVICE OPEN FAILURE

Therefore, the final reliability function of the 3L-NPC inverterunder multiple device open-failure conditions should be the sumof the results in (15) and (16).

If output voltage reduction is not allowed during the faulttolerant operation, then the status of faulty phases cannot be“RF.” This means all the devices Sx1 /Dx1 through Sx4 /Dx4 inphase x must be healthy. Therefore, the reliability function ofthe inverter is the same as (9) by substituting (14).

2) Reliability Function of 3L-ANPC Inverters: First, we de-fine Tx|x=a,b,c as the probability that all the devices in phase xare healthy, as given by the following:

Ta,b,c = (e−λ1 t)6(e−λ2 t)4(e−λ3 t)2 . (17)

1) For single device short failure:

3L-ANPC inverters can continue operating under any singledevice short-failure condition with a reduced maximum modula-tion index equal to 0.577. We define Xx|x=a,b,c as the probabilitythat one device fails in phase x, as given by the following:


+ 4(1 − e−λ2 t)(e−λ1 t)6(e−λ2 t)3(e−λ3 t)2

+ 2(1 − e−λ3 t)(e−λ1 t)6(e−λ2 t)4(e−λ3 t). (18)

Then, the inverter reliability function is the same as (8) bysubstituting (17) and (18).

If output voltage reduction is not allowed during the faulttolerant operation, all the devices in the inverter must be healthy.Therefore, the reliability function of the inverter is the same as(9) by substituting (17).

2) For multiple device short failure:

For multiple device short failure, at least two phases musthave the “healthy” status, while the status of the other phase canbe “RF.” We define Xx|x=a,b,c as the probability that the status ofphase x is “RF” under multiple device short-failure conditions,as given by (19). Then, the inverter reliability function is thesame as (8) by substituting (17) and (19)

Xa,b,c = T̄1T2T4T5 + T1 [T̄4T3T6+T4 (1 − T2T3T5T6)].

(19)

If output voltage reduction is not allowed during the fault tol-erant operation, then all devices in the inverter must be healthy.


Fig. 16. Reliability function comparison for 3L-NPC and 3L-ANPC inverters for case 1. (a) ssf. (b) sof. (c) msf. (d) mof.

Fig. 17. Reliability function comparison for 3L-NPC and 3L-ANPC inverters for case 2. (a) ssf. (b) sof. (c) msf. (d) mof.

In this case, the reliability function of the inverter is the same as(9) by substituting (17).

3) For single device open failure:

3L-ANPC inverters can continue operating under any singledevice open-failure condition. Therefore, the reliability functionis the same as that for single device short-failure condition. Ifoutput voltage reduction is not allowed during the fault tolerantoperation, then the status of the faulty phase must be “NRF,”whose probability is given by the following:

Xa,b,c = 2(1 − e−λ1 t

)(e−λ1 t)5(e−λ2 t)4(e−λ3 t)2

+ 2(1 − e−λ3 t

)(e−λ1 t)6(e−λ2 t)4(e−λ3 t). (20)

Then, the inverter reliability function is the same as (8) bysubstituting (17) and (20).

4) For multiple device open failure:

For multiple device open failure, according to Tables V andVI, the possible combinations of the three-phase status forthe successful operation of 3L-ANPC inverters are shown inTable XIII. The phase status “ 3L output” means the phase cangenerate all three voltage levels. “2L output” means the phasecan only generate ±Vdc /2. “0” means the phase can generatezero level, but not all three voltage levels.

We define T as the probability that Sx1 /Dx1 through Sx4 /Dx4are all healthy in phase x, as given by the following:

T = S1S2S3S4D1D2D3D4 = (e−λ1 t)4(e−λ2 t)4 (21)

where Sm |m =1−6 is the probability that device Sm is healthy,and S̄m = 1 − Sm is the probability that device Sm fails.

The probability that the phase status is “ 3L output,” “2Loutput” and “0” are given by (22)–(24)

P3L = (D̄5S6 S̄5D6 + D̄5S6S5

+ D5 S̄5D6 + D5S5)T (22)

P2L = (D̄5 S̄6 + D̄5S6D̄6 S̄5 + D5D̄6 S̄5)T (23)

P0 = S2D5 [D2S5 (1 − S1S3S4D1D3D4) + D̄2S3D6

+ D2 S̄5S3D6 (1 − S1S4D1D3D4)] + S̄2S6D3

× [1 − (1 − D2S5) (1 − S3D6)]

+ S2D̄5S6D3(S̄3S5D2 + S3 [D̄2D6

+ D2(1 − D̄6 S̄5

)(1 − S1S4D1D4)]). (24)

Then, the inverter reliability function is expressed by the fol-lowing:

R =(3P0(P2L + P3L )2 + (P2L + P3L )3

)Q. (25)

Similar to the reliability calculation of 3L-NPC inverters,we also need to calculate the reliability function under the


operating condition, as shown in Fig. 15, and exclude the com-mon part from the reliability function in (25). We define P0−as the probability that the faulty phase can only generate 0 and−Vdc /2 output voltage levels (the phase status is “P0−”), asgiven by (26). Then, for the fault tolerant operation, two phasescan have the “P0−” status and the remaining phase has “ 3Loutput” status. Or, the status of all three phases is “P0−.” There-fore, the inverter reliability function for this type of operation isgiven by (27)

P0− = S3S4D3D4{S2D5 [D2S5 (1 − S1D1)

+ D̄2D6 + D2 S̄5D6 (1 − S1D1)]

+ S̄2S6[1 − D̄6 (1 − D2S5)

]

+S2D̄5S6[D̄2D6 + D2

(1 − D̄6 S̄5

)(1 − S1D1)

]}

(26)

R = 2 ×(3 × P 2

0−P3L + P 30−

)Q. (27)

The final reliability function of the 3L-ANPC inverter undermultiple device open-failure conditions is the sum of the resultsin (25) and (27).

If output voltage reduction is not allowed during the faulttolerant operation, then all the three phases can have the statusof either “2L output” or “ 3L output.” Therefore, the reliabilityfunction is expressed by the following:

R = (P2L + P3L )3 Q. (28)

C. Reliability Comparison of 3L-NPC and 3L-ANPC Inverters

Based on the calculation results of 3L-NPC and 3L-ANPCinverters above, we plot and compare their reliability functionscalculated over a span of 20 years for single and multiple deviceopen- and short-failure conditions, respectively. Considering thedifferent requirement of electrical drive applications, the com-parison is studied for two cases as follows.

Case 1: The reliability function includes all the possible faulttolerant operations for 3L-NPC and 3L-ANPC inverters. Inthis case, the maximum modulation index can be either thesame or lower compared to that in normal operation. Thecomparison for the reliability of the two inverters is plottedfor single device short failure (ssf), single device open failure(sof), multiple device short failure (msf), and multiple deviceopen failure (mof) in Fig. 16(a)–(d), respectively.

Case 2: The reliability function only includes the fault tolerantoperations in which the maximum modulation index is thesame as that in normal operation. The comparison for thereliability of the two inverters are plotted for “ssf,” “sof,”“msf,” and “mof” in Fig. 17(a)–(d), respectively.

For electrical drives, a reduced maximum modulation indexcompared to normal operation is usually allowed during thefault tolerant operation so that the drive system can continueworking, but at a lower speed or a derated output power. Theresults of case 1 in Fig. 16 show that 3L-ANPC inverters havehigher reliability than 3L-NPC inverters for such applications.For example, considering over a span of 16 years, 3L-ANPCinverters have an increased reliability around 18%, 12.5%, 10%,

and 8.5% compared to 3L-NPC inverters for “mof,” “msf,” “ssf,”and “sof,” respectively. For certain electrical drives, which donot allow a reduced maximum modulation index during faulttolerant operation, the results of case 2 in Fig. 17 show thatthe two inverters have similar reliability for device open-failureconditions. However, for device short-failure conditions, 3L-NPC inverters have higher reliability than 3L-ANPC inverters.

V. CONCLUSION

Reliability and survivability of power electronics converter-based electrical drives are very important in terms of safety andeconomic cost. This paper analyzes the operation of 3L-ANPCinverters for high-power drives under device failure conditions,and proposes the fault tolerant strategies to enable continuousoperating of the 3L-ANPC inverters under both open- and short-failure conditions for single and multiple device failure. Theanalysis, simulation, and experiment results show that the re-liability and robustness of the inverters and electrical drivesare greatly improved by using the proposed solution. Moreover,since no additional components are added to standard 3L-ANPCinverters, the cost for robust operation of drives is lower. A com-prehensive comparison for reliability function of 3L-ANPC and3L-NPC inverters is investigated. The results show that 3L-ANPC inverters, even though employing more semiconductordevices, have higher reliability than 3L-NPC inverters when aderating is allowed for the drive systems under fault tolerant op-eration. If a derated operation is not allowed, the two invertershave similar reliability for device open failure, while 3L-NPCinverters have higher reliability than 3L-ANPC inverters fordevice short failure.

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Jun Li (S’07) was born in Liaoning, China, in 1981.He received the B.S. degree in automation from Tian-jin University, Tianjin, China, in 2004, the M.S. de-gree in power electronics from Zhejiang University,Hangzhou, China, in 2006, and the Ph.D. degree inpower electronics from North Carolina State Univer-sity, Raleigh, in 2010.

He is currently a Senior R&D Engineer in ABBU.S. Corporate Research Center, Raleigh. His re-search interests include topology and control ofhigh-power multilevel converters for medium volt-

age drives and renewable energy generation.

Alex Q. Huang (S’91–M’94–SM’96–F’05) receivedthe B.Sc. degree in electrical engineering fromZhejiang University, Hangzhou, China, in 1983, theM.Sc. degree in electrical engineering from ChengduInstitute of Radio Engineering, Chengdu, China, in1986, and the Ph.D. degree from Cambridge Univer-sity, Cambridge, U.K., in 1992.

From 1994 to 2004, he was a Professor with theCenter for Power Electronics Systems, Virginia Poly-technic Institute and State University, Blacksburg.Since 2004, he has been a Professor of Electrical

Engineering at the North Carolina State University, Raleigh, where he is alsothe Director of the Semiconductor Power Electronics Center and the ProgressEnergy Distinguished Professor and the Director of the new National ScienceFoundation’s Engineering Research Center for Future Renewable Electric En-ergy Delivery and Management Systems. His research interests include powermanagement, emerging applications of power electronics, and power semicon-ductor devices.

Zhigang Liang (S’10) was born in Sichuan, China,in 1981. He received the B.S. and M.S. degreesin electrical engineering from Zhejiang University,Hangzhou, China, in 2003 and 2006, respectively.He is currently working toward the Ph.D. degree atthe Future Renewable Electric Energy Delivery andManagement (FREEDM) Systems Center, North Car-olina State University, Raleigh.

From 2006 to 2007, he was a System Engineerwith Monolithic Power Systems, Inc., Hangzhou. Hisresearch interests include high-efficiency power con-

version, microinverters and module-integrated converters for photovoltaic ap-plications, and energy management in dc microgrid.

Subhashish Bhattacharya (M’85) received the B.E.(hons.) degree from the Indian Institute of Technol-ogy, Roorkee, India, in 1986, the M.E. degree in elec-trical engineering from the Indian Institute of Sci-ence, Bangalore, India, in 1988, and the Ph.D. degreein electrical engineering from the University of Wis-consin, Madison, in 2003.

From 1998 to 2005, he was with the Flexible ACTransmission Systems and Custom Power Group,Westinghouse Science and Technology Center,Pittsburgh, PA. Since August 2005, he has been an

Assistant Professor in the Department of Electrical Engineering, North Car-olina State University, Raleigh. He is a Faculty Member of the National ScienceFoundation’s Engineering Research Center for Future Renewable Electric En-ergy Delivery and Management Systems. His research interests include FACTS,utility applications of power electronics, active filters, high-power converters,converter control techniques, integration of energy storage to the grid, and ap-plication of new power semiconductor devices.

analysis and design of active npc (anpc)

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