analog devices : ad9204/ad9231/ad9251/ad9258/ad9268 … · output to high z sclk/dfs sdio/dcs ora...
TRANSCRIPT
1 10
<DRAWING_TITLE5><DRAWING_TITLE4><DRAWING_TITLE3><DRAWING_TITLE2><DRAWING_TITLE1><PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
<TESTER>C
--
9268CE01C<DRAWING_TITLE6>
<TEMPLATE_ENGINEER>
<HARDWARE_SERVICES>
<CHECKER>
<DESIGNER>
<COMPONENT_ENGINEER>
<PTD_ENGINEER>
<TEST_PROCESS>
<HARDWARE_RELEASE>
<TEST_ENGINEER>
<HARDWARE_SYSTEMS>
JP#USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTSOWNED OR CONTROLLED BY ANALOG DEVICES.
8
CONNECTORFUNCTIONCONTROL CODE DEVICE
2
2
6JUMPER TABLE
4
7
5
A
3
1DATE APPROVED
D
B
REVISIONSDESCRIPTION
3 2REV
4
OFFON
5
5
D
7
OEM PART# HANDLER
6
C
B
8SOCKET OEMBK/BD SPEC.P.O SPEC.
A
1
RELAY CONTROL CHART
3 14
* SEE ASSEMBLY INSTRUCTIONS
C
PURPOSE DETRIMENTAL TO THE INTERESTS OF ANALOG DEVICES.
NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR IN PART, ORTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IT IS
CHECKER
DESIGNER
PTD ENGINEER
TEST ENGINEER
DECIMALS
X.XXX +-0.005X.XX +-0.010
MASTER PROJECT TEMPLATE
TOLERANCES
+-1/32FRACTIONS
+-2SIZEDDDD
SCHEMATIC
DRAWING NO.
SCALE CODE ID NO.SHEET OF
REV.
DA AENV CL G
SEODATE
ANGLES
UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN INCHES
TESTER TEMPLATE
TEMPLATE ENGINEER
HARDWARE SERVICES
HARDWARE SYSTEMS
COMPONENT ENGINEER
TEST PROCESS
HARDWARE RELEASE
SWITCHINGSUPPLY
OPTIONAL
POWER SUPPLY INPUT
SUPPLY REGULATORSVARIABLE POWER SUPPLY INPUT
AVDD PINS 54 & 53
AVDD PINS 50 & 49
AVDD PINS 60 & 59
AVDD PINS 64 & 63
2 10
<DESIGN_VIEW>
<PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
-
C9268CE01C
<PTD_ENGINEER>
R127R126
R125R124
21
E118
21
E119
R123
R121
R122
R120
AC
CR10
1 CR102
C154
C153
C152
C151
C150
C149
21E117
21E116
C147C148
21E115
C145
C104
C105 C106
21E102
U102
21JP101
21JP104
21JP103
21JP102
R115
R114
C129
7
PAD
65
43
2
1
8
U105
C130
R110
C108
R105
R116
21
L101
C138 C139
C137
C142C141
C140
R117
L102
C113
C112R118
R106
C111
C110
R108
R109R107
C109R111
C107
R104
1615142526278
10
31
5
1718
2324
11
30
4
12
29
19202122 PAD
6
1
3
9
32
13
28
7
2
VR101
R113
R112
C127 C128
7
PAD
65
43
2
1
8
U104
21E108
21E106
21E104
C103
C102
R102
R103
C124
C125
U103
C126
C143 C144
C146
U106
7
PAD
65
43
2
1
8
U101
C121
C123
C119
C117
A C
CR10
5
A C
CR10
4
A C
CR10
6 654321
P103
654321
P10221
E101
C133
21E110
TP101 TP102
C118
C116
C120
C122
C135
C136
C132
C134
21E112
21E113
21E109
21E111
21E107
21E114
21E105
21E103
R101
A
C CR103
FL101F101
C101321
P101
2.2UH
100MHZ
DNI
DNI100PF
2200PF
1000
0PF
EN2VIN0
VIN EN1
DUT_AVDD
0
VOUT_1.8VB
TBD0603
ADP1708ARDZ-R7
1000
0PF
DNI
DNI
100K
VOUT_1.8VA
27K 4.75K
TBD06034.
7UF
4.7U
F
100MHZ
PJ-002AH-SMT
S2A-
TP
DNI
22UF
15K
18.7
K
4.7U
F
100MHZ
DNI100MHZ
DNI
100MHZ
4.7U
F
ADP1708ARDZ-R7
DNI
S2A-TPVIN
S2A-
TP
4.7U
F
ADP1706ARDZ-3.3-R7
4.7U
F
22UF
Z5.531.3625.0
Z5.531.3625.0
LNJ308G8TRA (GREEN)
4.7U
F
DUT_AVDD
DUT_AVDD
DUT_AVDD
DUT_AVDD DUT_AVDD
BLKBLK
15K
0.1UF
10
4.7U
F
0
100MHZ
22UF
0.1UF
0.1UF
10UF
10UF
100MHZ
100MHZ0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
100MHZ
10UF 0.1UF
10UF
10UF
10UF
3V_CLK
DVDD
DRVDD
DUT_AVDD
3V_AMPVDD
5V_AMPVDD
100MHZ
100MHZ
100MHZ
S2A-
TP
300
4.7U
F
1000
0PF
1000
0PF
1000
0PF
100MHZ
1000
0PF
1000
0PF
4.7U
F
4.7U
F
BNX016-01
100K
ADP1708ARDZ-R7
0
13K
5V_AMPVDD4.
7UF
28K
0.1UF
1000
0PF
VIN
22UF
15K
1.00
K
0
1.6A
1UF
TBD0603
100PF
2.2UH
SW_FREQ
EN1
10UF
ADP1706ARDZ-3.3-R7
S2A-
TP
100MHZ
ADP1706ARDZ-1.8-R7
100MHZDNI
15K
DRVDD
DVDD
3V_AMPVDD
3V_CLK
100M
HZ
100M
HZDN
I
DNI
0
100MHZ
VOUT_1.8VA
VOUTA
0DNI
0
VOUT_1.8VB
100MHZ
DNI
18.7
K
VOUTB
DNI
DNI
TBD0603
22UF 22UF
147K
1.00
K0DNI
DNI DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
10.5
K
ADP2114_PRELIM
VOUTA
EN2
VOUTB 1500PF
DNI 1000
0PF
DNI
0DNI
DNI
DNI
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PADSS
IN
GND1
SENSEOUT
EN
IN2 OUT2
GND
PADADJ
IN
GND1
SENSEOUT
EN
IN2 OUT2GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PGND
GNDGND
GND
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
VDD
PADPGND
4PG
ND3
PGND
2PG
ND1
GNDSS2FB2V2SET
SW4SW3
COMP2PGOOD2
SW2SW1
COMP1PGOOD1
EN2SS1FB1V1SETEN1OPCFGSYNC_CLKOUTFREQSCFG
GND
PADADJ
IN
GND1
SENSEOUT
EN
IN2 OUT2
PADSS
IN
GND1
SENSEOUT
EN
IN2 OUT2
GND
GND
PADSS
IN
GND1
SENSEOUT
EN
IN2 OUT2
GND
PADADJ
IN
GND1
SENSEOUT
EN
IN2 OUT2
GND
GND
GND
GND
GND
OUTPUT TO HIGH Z
SCLK/DFSSDIO/DCS
ORA
POWER DOWN
D11ADRVDD
D9A
CLK+
D10A
AVDD
AVDD
DCOB
D13B
D12B
D8B
D0BCSB
D7A
D2BD3B
VCM
VREF
VIN+
BVI
N-B
OEB
DCOA
D14A
D14B
ORB
CLK-
D12A
D1B
AVDD
AVDD
D8A
D15B
DRVD
D
D11BD10BD9B
D7B
D15AD4B
D13A
D5A
D3A
DRVDDD6B
D2A
D0A
D4A
D6A
RBIA
SAV
DD
SYNC
VIN-
AVI
N+A
AVDD
PDWN
PDWN
AVDD
AVDD
SYNC INPUT
D1A
D5B
EXTERNAL VREF
SENS
E
DRVD
D
VREF; 1,3,5SENSE; 2,4,6
AD9251
3 10
AD9268
<DESIGN_VIEW>
<PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
-
C9268CE01C
<PTD_ENGINEER>
3V_AMPVDD
10K
AD15
80AR
TZ
AD822BRZ
AD822BRZ
10K
10K
2K
0.1U
F
0.1U
F
0.1UF
0.1UF
CLK+CLK-
D0BD1BD2BD3BD4BD5B
D6BD7BD8BD9BD10BD11B
D12B
D13B
ORB
D0A
D1A
D2A
D3A
D4A
D5A
D6A
D7AD8AD9AD10A
D11AD12AD13AD14A
ORASDIO_DUTSCLK_DUTCSB_DUT
AINB-
DRVDD
DRVDD
LFCSP64-9X9-9PAD1_8X1_8
DRVDD
10K
AINB+
WHT
0.1UF
0.1UF57
.6DRVDD
DUT_AVDD
DUT_AVDD
DUT_AVDD
1UF
DRVDD
D14B
D15B
DCOB
1UF
3V_AMPVDD
0.1UF
0.1UF
DUT_AVDD
AINA-
AINA+
TBD0402
DNI
AD822BRZ
D15A
DCOA
EXT_REF
VCM_DUT
TBD0402
DUT_AVDD
EXT_REF
0
TSW-103-08-G-D
DNI
DNIDNI
DNI
DNI
DNI
DNI
DNI
DNI
R206
C211
R208 R209
C201R201
U2026
57
U2022
31
C202
R202
1
23
CR201 1
2
U2028
4
TP91
U201
1
10111213141516
17 18 19
2
20 21 22 23 24 25 26 27 28 29
3
30 31 32
33343536373839
4
404142434445464748
49
5
50515253545556575859
6
6061626364
65
66
67 68
69
7
70
717273
89
C207
C209
C208
J205
1234
R203
J2031
2 3 4 5
R207
C206
C204
R205R204
C203
C205
J201123456
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
GND
GND
GND
GND
GND
GND
V-
V+
CW
GND
GND
GND
GND
GND
GNDGND
GND
GND
GND
GND
GND
GND
GND
GND
SPI CIRCUITRY
2-3 DCS ENABLED/OPEN DCS DISABLED1-2 SPI MODE SDIO_DUT
5-6 DFS TWO'S COMP/OPEN OFFSET BINARY4-5 SPI MODE SCLK_DUT
8-9 SPI MODE CSB_DUT/OPEN PIN MODE
4 10
<DESIGN_VIEW>
<PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
-
C9268CE01C
<PTD_ENGINEER>
C302
C301
87654321
J301
R308
R304
R307
R306
R305
R303
R302
R301
4
6
5
2
3
1
U302
987654321
J302
R312
R314
R315
R3094
6
5
2
3
1
U301
R311
R310
R313
R317
R316
USB_SDI SDI0
USB_SCLK SCLK0
USB_SDO0
FPGA_SDI0
FPGA_SCLK SCLK0
FPGA_CSB CSB
FPGA_SDO SDO0
SDI
SDO
CSB
SCLK
CSB
SDI
USB_CSB0
SDO
TSW-104-08-T-D
DNI
0 DNI
DNI
DNI
0.1UF
100K
100K
100K
1.00K
1.00K
1.00K
NC7WZ07P6X
NC7WZ16P6X
0.1UF
10K
10K
10K
DVDDDVDD
CSB_DUT
SCLK_DUT
SDIO_DUT
SDO
SDI
SCLK
CSB
3V_CLK
DVDD
TSW-103-08-G-T
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
GND
GND
GND
Y2
Y1
A2
A1
GND
VCC
GND
GND
GND
GND
GNDGND
VCC
Y1A1
A2
GND
Y2
GND
THESE RLCS ARE PLACE HOLDERS... PLACE CORRECT VALUES & COMPONENTS...
THIS HEADERG IS USED TO SELECT THEGAIN OF THE AD8375.
CHANGE ALL 0 OHM RESISTORS TO 0402 FOOTPRINT
OPTIONAL ANALOG INPUT CHA
DEFAULT ANALOG INPUT CIRCUITRY CHA
SEE CHART
SEE CHART
SEE CHART
SEE CHART
AD9268
AD9251
C410
DNI
22PF
R408 & R409
66 OHM
33 OHM
L403 & L404
10 OHM @ 100MHZFERRITE BEAD
0 OHMSEE CHART
5 10
<DESIGN_VIEW>
<PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
-
C9268CE01C
<PTD_ENGINEER>
DNI100NHL405
5PF49.9C410
DNI
DNI
DNI
ADT1-1WT+
AINA-0
AINA+0
0
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNIDNI
DNIDNI
DNI
DNIDNI
DNI
DNI
DNI
DNI
DNI
DNI
INPUT_A+
57.6
0.1U
F
0.1UF
1.00K
PD_N_A
5V_AMPVDD
AD8375_A3
AD8375_A1AD8375_A0
0.1UF
0DN
I
0.1U
F10UF
0
0.1UF
MABA-007159-000000
VCMA
0.1UF
0.1UF
0
0
0
1200PF
1200PF
300
5PF
TSW-105-08-G-D
DNI
130
PD_N_A0
DNI
0.1UFDNI
0.1U
F
DNI5PF
DNI
5V_AMPVDD
AMPINA-
0
0
INPUT_A-
INPUT_A+
0.1UF
0.1UF
INPUT_A-AMPINA+
VCMA
0AD8375ACPZ
DNI
57.6
DNI
DNI
WHT
TC3-1T+
0
DNI
DNI
AD8375_A0
AD8375_A4
AD8375_A3
10K 10KDNI
10KDNI DNI
10KDNI
10K
0.1U
F
AMPINA-
JPR0402DNI
MABA-007159-000000
AD8375_A2
AD8375_A1
5V_AMPVDD
1UH
1UH
0.1UF
0.1UF
0.1UF
33
0
0.1UF
AD8375_A2
AD8375_A4
0
AMPINA+
DNI
JPR0402
VCMA
VCM_DUT
BLK
33
20PF2.7PF
270NH
270NH
270NH
270NH
DVDD
DNI
R402
C404
C409
C411
T401
254
6
3
1
C403
T402
R403 R404
C417
C419
C413
C412
L408
L409
C424
R401
L402
L401
TP402
TP401
1
C405
JP4021 2
JP4011 2
JP403
J4011
2 3 4 5
J4021
2 3 4 5
R407
R405
U401
87654
11 14 20 21 22 24 PAD
19
1
32
1618
1517
9 10 12 13 23
C420
T404
4
6
3
2
1C414
R410
R411
C415
C416C425
R413
L406
L407 C4
21
C422
C423
L410
L411
C418
J4041
10
23456789
R416
R415
R414
R412
R417 R418 R419 R420 R421
C426
C427
C406
C407
C401
C402
J40312
R422
R423
T403
51
3
2
4
6
R425
R424R408
C408
R409
L403
L404
R406
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
GND
SEC
PRI
-(NC
)-
(NC)
SECPRI
-(NC)-
GND
GND
GND
GND
GND
GND
GND
GND
GND
VPOS
VOUT_POS
VOUT_NEG
PADCOMMVCOMPWUPA4A3A2A1A0VIN_NEGVIN_POS
GND
GND
GND
GND
GND
GND
GND
GND
OPTIONAL ANALOG INPUT CHB
THESE RLCS ARE PLACE HOLDERS... PLACE CORRECT VALUES & COMPONENTS...
CHANGE ALL 0 OHM RESISTORS TO 0402 FOOTPRINT
DEFAULT ANALOG INPUT CIRCUITRY CHB
AD9268
AD9251
DNI
22PF
66 OHM
33 OHM
10 OHM @ 100MHZFERRITE BEAD
0 OHM
C510 L503 & L504R508 & R509
SEE CHART
SEE CHARTSEE CHART
SEE CHART
SEE CHART
SEE CHART
6 10
<DESIGN_VIEW>
<PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
-
C9268CE01C
<PTD_ENGINEER>
L504 R509
C510
R508L503
6
4
2
3
15
T503
R524
R526
R525
21
J503
R522
JP503
R521
R520
R519
C502
C501
L522
L521
C523
C522
C521
C518
C517
C520
C516
R510
R511
R512
R513
T505R515
R514
R516
R517
1110
12
43
9
8765
PAD16151413
12
U501
C507
C506
R507
R505
5432
1J502
5432
1J501
1
3
6
45 2
T501
21JP502
T502
21JP501
C505
C512
C513
C515
C514
R501
L501
C503
R503R5
02L502
C504
R518
L509
C519
L508 L510
L520
R504
R506 C508 L505
C511
C509
DNI
DNI
INPUT_B+
INPUT_B-
INPUT_B+
INPUT_B-AINB+
0
AINB-0
0
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNIDNI
PD_N_B
1.00K
3V_AMPVDD
MABA-007159-000000
40.2
0.1UF
VCM_DUT0
AMPINB+
ADL5562_PRELIM
10UF
100PF
DNI1000PF
VCMB
0.1U
F
DNI1.00K
15NH
0
00.
1UF
DNI
82NH
0.1UF
DNI
57.6
0
DNI
DNI
AMPINB-
100NHDNI
DNI
VCMBJPR0402
0
0
1000PF 15NHDNI
36NH
0
PD_N_B
DNI0.1UF
DNI
00
33
0.1UF
82NH
DNI
VCMBDNI
AMPINB+
39PFDNI
DNI36NH
AMPINB-
DNI5PF
DNI5PF57
.6
0
MABA-007159-000000
0
0
0.1UF
0.1UF
VCMB
0
33
DNI
0.1UF
DNI
DNI
DNI
MABA-007159-000000
JPR0402DNI
DNI
DNI
40.2
0
0.1UF
49.9 DNI
3V_AMPVDD
0.1UF
VCMB
0.1UF
0
0
ADT1-1WT+
DNI
DNIDNI
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
(NC)
GND
GND
GND
GND
GND
SECPRI
-(NC)-
GND
GND
PADGND
ENBL
VOPVON
VCOM
VCC
VIN2VIN1VIP1VIP2
GND
GND
GND
SECPRI
-(NC)-
GND
GND
SEC
PRI
-(NC
)-
GND
GND
GND
CLOCK INPUT
XFMR / BALUN CLK CIRCUITRY
OPTIONAL TERMINATION NEAR DUT
OPTIONAL CRYSTAL OSCIALLATOR CLOCK SOURCE
SEE CHART
SEE CHART
AD9251
AD9268
INSTALL DNI
DNI INSTALL
0 OHM
100PF DNI
0.1UF
C604T602T601 C610SEE CHART
CRYSTAL Y601 TO MATCH PRODUCT SPEED GRADE(X - AVAILABLE SPEED GRADE)
20MHZ 40MHZ 65MHZ 80MHZ 105MHZ 125MHZ
XXXX
XXXX
XXXX
XXX
X X X X
XXX
X
XXX
AD9268
AD6658
AD6659
AD9258
AD9269
AD9251
AD9231
AD9204
SEE CHART
SEE CHART
7 10
<DESIGN_VIEW>
<PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
-
C9268CE01C
<PTD_ENGINEER>
Y601
0DN
I
0.1UF
0.1UF
0
0
CLKIN-
CLKIN+
HSMS-2812BLK
3V_CLK
CLKIN-
0.1UF
XSTAL_IN
0.1UF
57.6
BLK DNI
0DNI
0
DNI
0
CLKIN+
DNI
XSTAL_IN
DNI 0
CLKOUT-
0
0.1UF
CLK-
DNI
100
CLKOUT+
CLK+
MABA-007159-000000
57.6
0
DNI0
0.1UF
1.00K
C606
C607
C603
C601
CR601
321
R601
R605
R611
R612
R606C602
R602
R609
R610
C609
TP601
C610
J6011
2 3 4 5
J6021
2 3 4 5
R603
R604
R608
R607
R613
R614
J60512
6
4
2
3
1
ADT1-1WT+
T601
T602
C604
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
GND
GND
GND
SECPRI
-(NC)-
GND
GND
GND
VCCTRISTATE CTRL
GNDOUT
GND
PECL/CML/LVDS CLK CIRCUITRY
CHARGE PUMP FILTER
8 10
<DESIGN_VIEW>
<PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
-
C9268CE01C
<PTD_ENGINEER>
C731
C730
C707
R741
R740
5 4 3 2
1J704
R739
C724
5 4 3 2
1J703
R738
C723
R736R734
R735 R737
1
TP705
1
TP704
5432
1J702
R733
C720
C721
C722
87654321
J701
R732
R731
C719
R729 R730A C
CR701
4
6
5
2
3
1
U703
R720R719
C704
C703
1615
14 713 8
1112
PAD21
U702
R704
R707R706R705
R708
R709
1TP703
1TP702
R711
1TP701
R710
R728
C709
C708
C706
C705 R725
R727
R726
R723
4021 454337363130252410 3
7
5
151613
44
17
1
4847
6
18
2829
2627
3332
3534
23222019383941428
2
PAD
14
46
4
1211
9
U701
C702
C701
C718
C717
C716
C715
C714
C713
C710
C712
C711
R721
R722
R715
R716
R714 DNI
DNI CLKOUT-ADCLK905BCPZ-WP
CLKOUT+
WHTAD9517_CSB
1.00K
.22UF
DNI
0.1U
F
0.1UF
3V_CLK
0.1UF0.
1UF
1800
PF
.033
UF
BYPASS_LDO
100
1500
PFDN
I
DNI
0.1U
F
BYPASS_LDO
3V_CLK
SML-LXT0805IW-TR200
SW_FREQ
AD9517-4BCPZ
4.12
K
100
CLKIN-
CLKIN+
SDI
3V_CLK
9517_CLK
CP
3V_CLK
82.5
0.1UF
WHT
TSW-104-08-T-D
3V_CLK
0.1UF
0.1UF
1.00K
0
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
WHT
WHT
LF
3V_CLK
0
WHT
33
0.1UF
0.1UF
BYPASS_LDO
0.1UF
57.6
200
0
9517_CLK
LF
CP 0 0
SDO
PECL_OUT1_NPECL_OUT1
1.00K1.00K 1.00K
3V_CLK
0.1UF
5.11
K
SCLK
200
0
49.9DNI
49.9
0 DNI
0.1UF
200
0.1UF
200
PECL_OUT1
PECL_OUT1_N
0.1UF
0.1U
F
200
DNI0
130 130
3V_CLK
0 DNI
0
82.5
0.1UF
NC7WZ16P6X
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Y2
Y1
A2
A1
GND
VCC
GND
GND
PAD
VTVREF
Q_NQ
VCC
VEE
D_ND
GND
GND
GND
GND
GND
OUT7_N_OUT7BOUT7_OUT7A
OUT6_N_OUT6BOUT6_OUT6A
OUT5_N_OUT5BOUT5_OUT5A
OUT4_N_OUT4BOUT4_OUT4A
OUT3_NOUT3
OUT2_NOUT2
OUT1_NOUT1
OUT0_NOUT0
STATUS
CP
LD
CPRSETREFMON
RSET
CS_N SDOSDIOSCLK
RESET_NSYNC_NPD_N
CLK_NCLK
LF
BYPASS
REFIN_N_REF2REFIN_REF1
REF_SEL
GND
VCPVSVS_LVPECL
220 OHM
RN804RN803RN802
22 OHM
220 OHM
22 OHM
220 OHM
22 OHM
RN801
22 OHM
220 OHMAD9251
AD9268
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SEE CHART
SERIES RESISTORS
OTR LED CIRCUIT
OUTPUT BUFFERS
CHANNEL B CHANNEL A
I18B
I17B
I13A
O_D0A
I11A
I9B
I7BI6BI5BI4BI3BI2B
0.1UF
I6A0.1UF
0.1UF0.1UF0.1UF
0.1UF0.1UF0.1UF0.1UF
74VCX162827MTDX
O_D8AO_D7AO_D6A
200
200
O_ORA
10K
10K
D7A
I15AI16A
I6A
I12A
I9B
I8B
I7B
I4B
D9A
SML-LXT0805IW-TR
SML-LXT0805IW-TR
I2BD0B
I3BD1B
D2B
I5BD3B
I0ADCOA
I3AD0A
I5AD2A
I4AD1A
I6BD4B
D5B
D7B
I10BD8B
I11BD9B
I12BD10B
D3A
I7AD4A
I8AD5A
I11AD8A
I10A
I9AD6A
I13BD11B
I14BD12B
I15BD13B
I16BD14B
D15B
ORB
I12A
D10A
I14AD11A
I15AD12A
I16AD13A
I17AD14A
I19BDCOB I19AORA
I18AD15A
D6B
I19BI18BI17BI16BI15BI14BI13BI12BI11BI10B
I8B
O_CLK_BO_ORBO_D15BO_D14BO_D13BO_D12BO_D11BO_D10BO_D9BO_D8BO_D7BO_D6BO_D5BO_D4BO_D3BO_D2BO_D1BO_D0B
I17A
I8AI7A
I0A
O_D5AO_D4AO_D3AO_D2AO_D1A
O_CLK_A
DVDD
DVDD
BLK74VCX162827MTDX
ORA
0O_D10A
0
3V_CLK
NC7WZ16P6XI14AI13A
I10A
O_D9A
I5A
O_D11AO_D12A
O_D15A
ORB
I4A
I9A
I18AI19A
O_D14AO_D13A
I3A
BLK
C801 C802 C803 C804
C806 C808C807C805
RN8071 8
RN8072 7
RN8073 6
RN8074 5
RN8021 8
RN8022 7
RN8024 5
RN8023 6
RN8063 6
RN8061 8
RN8062 7
RN8064 5
R801
R802
CR801
CA
CR802
CA
U803
1
3
2
5
6
4
R803
R804
R805
R806
C809
TP801
TP802
U801
4 11 18 25 32 39 46 53
5554
42414038373634333130
5251494847454443
23
15161719202123242627
568910121314
1562928
7223550
U802
4 11 18 25 32 39 46 53
5554
42414038373634333130
5251494847454443
23
15161719202123242627
568910121314
1562928
7223550
RN8031 8
RN8032 7
RN8033 6
RN8034 5
RN8014 5
RN8011 8
RN8012 7
RN8013 6
RN8083 6
RN8084 5
RN8081 8
RN8082 7
RN8093 6
RN8094 5
RN8051 8
RN8052 7
RN8053 6
RN8054 5
RN8091 8
RN8092 7
RN8042 7
RN8043 6
RN8044 5
RN8041 8
<PTD_ENGINEER>
9268CE01C C-
AD9268 / AD9251 CUSTOMER EVALAD9268 / AD9251<PRODUCT_1>
<DESIGN_VIEW>
109
GND
GND
OE1_N
OE4_NOE3_NOE2_N
VCC
GND
I19I18I17I16I15I14I13I12I11I10I9I8I7I6I5
I0
I4I3I2I1
O19O18O17O16O15O14O13O12O11O10O9O8O7O6O5O4O3O2O1O0
OE1_N
OE4_NOE3_NOE2_N
VCC
GND
I19I18I17I16I15I14I13I12I11I10I9I8I7I6I5
I0
I4I3I2I1
O19O18O17O16O15O14O13O12O11O10O9O8O7O6O5O4O3O2O1O0
GNDGND
GND
GND
GND
GND
Y2
Y1
A2
A1
GND
VCC
GNDGND
GND
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
FIFO 5 CONNECTIONS
10 10
<DESIGN_VIEW>
<PRODUCT_1>AD9268 / AD9251AD9268 / AD9251 CUSTOMER EVAL
-
C9268CE01C
<PTD_ENGINEER>
DG9DG8DG7DG6DG5DG4DG3DG2
DG10
DG1P903
D9D8D7D6D5D4D3D2
D10
D1P903
C9C8C7C6C5C4C3C2
C10
C1P903
BG9BG8BG7BG6BG5BG4BG3BG2
BG10
BG1P903
B9B8B7B6B5B4B3B2
B10
B1P903
A9A8A7A6A5A4A3A2
A10
A1P903
DG9DG8DG7DG6DG5DG4DG3DG2
DG10
DG1P902
D9D8D7D6D5D4D3D2
D10
D1P902
C9C8C7C6C5C4C3C2
C10
C1P902
BG9BG8BG7BG6BG5BG4BG3BG2
BG10
BG1P902
B9B8B7B6B5B4B3B2
B10
B1P902
A9A8A7A6A5A4A3A2
A10
A1P902
DG9DG8DG7DG6DG5DG4DG3DG2
DG10
DG1P901
D9D8D7D6D5D4D3D2
D10
D1P901
C9C8C7C6C5C4C3C2
C10
C1P901
BG9BG8BG7BG6BG5BG4BG3BG2
BG10
BG1P901
B9B8B7B6B5B4B3B2
B10
B1P901
A9A8A7A6A5A4A3A2
A10
A1P901
FPGA_SDO
USB_SCLK
6469169-1
O_D1BO_D3BO_D5B
O_ORA
6469169-1
O_D6A
O_D2AO_D0A
O_ORB
O_D14B
O_D7BO_D9B
O_D13B
O_CLK_BO_D15B
O_D1A
O_D5A
O_D9AO_D11AO_D13A
O_D10BO_D8B
6469169-1
6469169-1
6469169-1
6469169-1
6469169-1
6469169-1
6469169-1
O_D11B
O_D0BO_D2BO_D4BO_D6B
O_D12B
O_D3A
O_D7A
O_D15AO_CLK_A
O_D4A
O_D8AO_D10AO_D12AO_D14A
6469169-1
6469169-1
USB_SDOUSB_SDI
FPGA_CSB
6469169-1
AD8375_A3AD8375_A1
6469169-1
AD8375_A2AD8375_A4
AD8375_A0
FPGA_SDIFPGA_SCLK
6469169-16469169-16469169-1
6469169-1
6469169-1
USB_CSBAD9517_CSB
DTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALEDDD
SIZED
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
REV DATE APPROVED
B
6DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EA N
V
OF ANALOG DEVICES.
SCHEMATICS
PTD ENGINEER
DESIGN VIEW
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
GNDGND
GNDGND
GND
PLUG
HEAD
ER
GND
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER
PLUG
HEAD
ER