tsv: via lining & filling sami.franssila@aalto.fi

TSV: Via lining & filling

sami.franssila@aalto.fi

TSV degree of difficulty

www.yole.fr, 2010

Basic via structure

Benfield

Process flow

Benfield

Profile & filling options

Profile & step coverage

Dielectric requirements

IEEE 2009 3D system integration conference

Resistance

Thickness (um)

Radius (um)

Resistivity (uOhmcm)

Calculated resistance (mOhm)

Poly-Si 100 10 1000 (BCl3) 3200

W 100 3 5.4 191

Cu (full) 100 W_bot =30W=60

2.65 2.1

Cu (hollow)

100 W_bot =30W=60

2.65 3.8

Why is thinning needed?• Step coverage of sputter?

– Maximum aspect ratio ~ 5– Tapering makes sure the seed is continuous– W_bottom=20um, t=650um wafer -> w = 134um -> pitch ~ 200um

• Pitch < 100– > wafer has to be thinned down

Silicon vias

Silex

Silicon vias

Silex

Epoxy-lining

Filling with sacrificial support

Packaging with TSV cap wafer

Wire bonding via metal

Via electrical results

Nickel wire magnetic assembly

Fischer, Roxhed:

Ni wire process flow

Fischer, Roxhed:

Solder filling

Copper ball filling

TSV filled by CNTs

CNT growth