pa0 guide · 2020-05-17 · pa0 guide ece 3401 – spring 2020 course ta contact information:...

PA0Guide

ECE3401–Spring2020

CourseTAcontactinformation:MohsinShan

mohsin.shan@uconn.edu

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StartVivado

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SearchforVivado2018.3

CreateaNewProject

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ClickHereonNewProject(andletWizardcreateanewproject)

ProjectWizard

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•  Theprojectwizardwillopen.Giveanynametoyourproject(e.g.lab0)andleavetherestasis

Thenclicknext

YoucanworkfromyourPdrivewheredataissavedacrossmultiplemachinelogins

P://

ProjectWizard

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•  Theprojectwizardwillopen.Giveanynametoyourproject(e.g.lab0)andleavetherestasis

Thenclicknext

IfPdrivedoesnotletyousaveyourwork,thenworkinthemachine’sCdrive.Beforeloggingout,copytheprojectfolderinyourPdrive.OnthesubsequentlogincopytheprojectbacktoCdrivetoworkonit.Repeatthisprocessacrossmultiplemachinelogins

ProjectSettings

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•  SelectRTLProject,thenclicknext•  AndthenFinish

ChooseRTLProjectandclickNext

CreatingSourceFiles

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Createanewsourcefile

ChangetoVHDL

CreatingSourceFiles

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SelectVHDLandtypethename.ThenclickOK

CreatingSourceFiles

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ThenclickNext

CreatingSourceFiles

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LeavetheIPandConstraintspartsasisClickNext

PartSelection

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ChoosethedefaultFPGAxc7k70tfbv676-1ThenclicknextThenclickfinishTheprojectwillthenbecreated

PortDefinitions

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LeavethispartasisandclickOKYouwillbeaddingtheportdefinitionsintheVHDLcodelater

StartProgramming

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2.Copy&Pastethecodefromlab0.vhdhere(Itisa1-bitadderthatisdownloadablefromthecoursewebpage).Savelab0.vhdusingCtrl+S.TheleftpanelshouldnowsayBIT_ADDER–BHVunderDesignSources

1.Double-clickon‘lab0–Behavioral’forthelab0.vhdfiletoopenintherightpanel

AddingaTestBench

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2.SelectSimulationSourceshereandclickNext

1.Clickheretoaddanewfile

AddingaTestBench

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1.ClickCreateFile

2.AddthenameofthetestbenchandclickOK.ThenclickFinish

AddingaTestBench

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1.ClickOK2.ClickYestoignorethewarning.You’lladdtheportdefinitionslater

CopythetestbenchCode

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1.ClickSimulationSourcesthensim_1,andthendouble-clickon‘test0-Behavioral’forthetest0.vhdfiletoopenintherightpanel

2.Copy&Pastethecodefromtest0.vhdhere(Itisa1-bitadderthatisdownloadablefromthecoursewebpage).Savetest0.vhdusingCtrl+S.TheleftpanelshouldnowsayTEST_ADD–TESTunderSimulationSourcesandsim_1

RunningSimulation

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ClickonRunSimulation,andthenRunBehavioralSimulation

BehavioralSimulation

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•  AwaveformwindowshouldautomaticallyopenafteryouclickRunSimulation

•  Enablesonetovisualizewaveformsforthedigitaldesign– Runsforthetimespecifiedinthetestbench– Allowsonetovisualizeinterfaceaswellasinternalstateofthesimulateddesign

– Simulatesinputconfigurationsspecifiedinthetestbench

RunningtheSimulation

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ClicktoZoomFit

Theseinterfacesignalsshouldautomaticallyappear

CheckWaveform

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•  Youshouldstudylab0.vhdcodeandthenunderstandhowtest0.vhdsensitizesinputstocreateatestbenchtotestthe1-bitaddercircuit

•  TheSUMandCOUToutputscanbeverifiedbyvisuallyinspectingtheA,BandCINinputsatvarioustimestamps