cpu architecture - advancedcontents.kocw.net/kocw/document/2015/mokwon/choyongheui/7.pdf · basic...

CPU Architecture - Advanced

Yong Heui Cho @ Mokwon University

Basic Computer Design

5. Sequential Logic Circuit

6. CPU Architecture - Basic

7. CPU Architecture - Advanced

8. ARM CPU

Simplified Architecture

3 □ Courtesy to The CPU, slideshare.

IR

data

Control Unit (CU)

ALU

von Neumann Architecture

Features

• Data and instructions can be stored in the same memory.

• It uses a single processor for program control.

• Cycle: fetch-decode-execute-store

• Execution performs the instruction at a time in a linear sequence.

5 □ Courtesy to 3.3 Computer Architectures, slideshare, slideshare.

Machine Cycle

• Fetch-decode-execute-store

Example of Cycle

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CISC

• Complex Instruction Set Computer

• CISC has more complex instructions available to it thus it may be able to perform the task in just one cycle (by using one of its complex operations available)

– Large number of instructions available

8 □ Courtesy to 3.3 Computer Architectures, slideshare, slideshare.

CISC of Intel

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• PCs, servers → mobile devices

RISC

• Reduced Instruction Set Computer

• RISC only has a simple instruction set thus to perform a complex task it may take several ‘cycles’ of basic instructions.

– Limited number of instructions available

10 □ Courtesy to 3.3 Computer Architectures, slideshare, slideshare.

RISC of ARM

• Mobile devices → PCs, servers

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Example of CISC/RISC

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A RISC might have the operations:

• ADD

• SUB

• DIV

• etc

A CISC might have the operations:

• ADD

• SUB

• DIV

• AVR (average)

• etc

Task: find the average!

□ Courtesy to 3.3 Computer Architectures, slideshare, slideshare.

LED On/Off 언어 문법

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Arduino: LED On/Off 구현

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