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User's GuideSCAU049A–May 2012–Revised January 2013
CDCM6208 Evaluation Board
Contents1 Features ...................................................................................................................... 22 General Description ......................................................................................................... 33 Signal Path and Control .................................................................................................... 44 Software-Selectable Option ................................................................................................ 45 Installing the EVM Control Software and USB Driver .................................................................. 4
5.1 CDCM6208 Control User Interface .............................................................................. 46 Using the EVM Control Software ......................................................................................... 5
6.1 Primary and Secondary Reference Signal Type Selection ................................................... 56.2 Input Divider For Primary Reference ®) Selection ............................................................ 56.3 Input MUX Selection ............................................................................................... 66.4 Input Divider (M) For the PLL Selection ........................................................................ 66.5 Charge Pump Current Selection ................................................................................. 66.6 Loop Filter (3rd Pole only) Selection .............................................................................. 66.7 Feedback Divider Selection ....................................................................................... 66.8 Prescalar Dividers (PS_A and PS_B) Selection ............................................................... 66.9 VCO Frequency Selection ........................................................................................ 66.10 Output MUX Selection ............................................................................................. 66.11 Output Dividers ..................................................................................................... 66.12 Output Signal Type Selection .................................................................................... 76.13 Additional Features ................................................................................................ 7
7 Configuring the Board ...................................................................................................... 77.1 Selecting the Interface Connection .............................................................................. 77.2 Configuring the Power Supply .................................................................................... 77.3 Configuring the Reference Inputs ................................................................................ 87.4 Configuring the Control Pins ...................................................................................... 97.5 Selecting the Loop Filter ......................................................................................... 107.6 Configuring the Outputs ......................................................................................... 107.7 Using the MSP430 as a Bootloader ............................................................................ 10
8 A Step by Step Guide on Updating the TUSB3210 Firmware for I2C communication on the CDCM6208EVM ......................................................................................................................... 118.1 Required Software and Hardware .............................................................................. 118.2 Installing TI USB EEPROM Burner Software ................................................................. 118.3 Programming the CDCM6208 EVM’s TUSB3210 ............................................................ 11
9 CDCM6208V2 EVM Board Schematic ................................................................................. 14
List of Figures
1 CDCM6208 Evaluation Board ............................................................................................. 3
2 Initial GUI Screen .......................................................................................................... 5
3 Jumper Configuration For USB Power Supply .......................................................................... 8
4 EVM SW4 Location ....................................................................................................... 12
5 TUSB3210 EEPROM Burner Software ................................................................................. 13
6 CDCM6208V1/CDCM6208V2 EVM Control Modes .................................................................. 14
All trademarks are the property of their respective owners.
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Features www.ti.com
7 CDCM6208V1/CDCM6208V2 EVM Device Pins and Bypassing ................................................... 15
8 CDCM6208V1/CDCM6208V2 EVM Reference Inputs ............................................................... 16
9 CDCM6208V1/CDCM6208V2 EVM Outputs 0 to 3 ................................................................... 17
10 CDCM6208V1/CDCM6208V2 EVM Outputs 4 to 7 ................................................................... 18
11 CDCM6208V1/CDCM6208V2 EVM Power Supplies ................................................................. 19
12 Onboard MSP430G2001 ................................................................................................ 20
List of Tables
1 Input Selection Jumper Settings .......................................................................................... 9
2 Mode Selection Jumper Settings ......................................................................................... 9
3 STATUS1 Functional Description ....................................................................................... 10
4 Device Control Pin Functions ............................................................................................ 10
1 Features• Easy-to-use evaluation module generating low-phase noise clocks up to 800 MHz
• Easy device programming via host-powered USB port or control pins
• Rapid configuration with provided EVM Control Software
• Powered from the USB port, or by an external 3.3-, 2.5-, or 1.8-V power supply
• Single-ended or differential input; external crystal for use with on-chip oscillator
Words shown in bold italics in this document show the same name and label on the EVM board itself.
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Copyright © 2012–2013, Texas Instruments Incorporated
www.ti.com General Description
Figure 1. CDCM6208 Evaluation Board
2 General Description
The CDCM6208 is a highly-versatile, low-jitter, low-power frequency synthesizer generating up to eightclock outputs, selectable between LVPECL-like high-swing CML, normal-swing CML, LVDS-like low-powerCML, HCSL, or LVCMOS, from one of two inputs that can feature a low frequency crystal or CML,LVPECL, LVDS, or LVCMOS signals. It also features an innovative fractional divider architecture for fourof its outputs generating any frequency with better than 1 ppm frequency accuracy. The device is easilyconfigured through I2C or SPI programming interfaces. In the absence of serial interface, pin-programmingmode is available and can set the device in many distinct preprogrammed configurations using controlpins. Two versions are available, (CDCM62008V1 and CDCM6208V2) depending on the VCO frequencyranges.
The CDCM6208 is programmed through an SPI or I2C interface using the supplied EVM programminggraphical user interface (GUI).
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Signal Path and Control www.ti.com
The CDCM6208 evaluation module (EVM) demonstrates the electrical performance of the device. Thisfully-assembled, factory-tested evaluation board allows complete validation of all device functions. Foroptimum performance, the board is equipped with 50-Ω SMA connectors and well-controlled 50-Ωimpedance micro strip transmission lines.
3 Signal Path and Control
The CDCM6208 provides two selectable inputs – PRI_REF and SEC_REF. The PRI_REF and SEC_REFaccept either differential- (CML, LVDS) or single-ended LVCMOS signals, up to 250 MHz. Besides theexternal clocks, SEC_REF allows the use of an external crystal in the frequency range of 10 MHz to 50MHz. The EVM provides a PC-board footprint for mounting a 3.2 mm × 2.5 mm SMD crystal. If theSEC_REF is driven through the SMA connector, the on-board crystal and R72 and R73 must be removedand R87 must be populated with a 0-Ω resistor (R89 must also be populated with a 0-Ω resistor for adifferential input signal). The device does not have any internal termination or biasing, therefore, properbiasing and termination options are available on the EVM, if needed.
The CDCM6208 provides up to eight differential signals. Out of eight outputs, four differential outputs canconvert into eight singled LVCMOS signals. A maximum of eight differential or 4 differential and eightsingled LVCMOS clocks or any of the various combinations are possible.
The device operates as a jitter cleaner or as a frequency synthesizer. The CDCM6208 requires a partially-external loop filter. The EVM provides four loop filter options – two filters are for synthesizer mode and theother two for jitter-cleaning mode. The loop-filter selection affects the phase noise and loop stability of thePLL.
In pin mode, the device option is selected by five control pins. In programming mode, options are selectedby programming the on-chip registers. The CDCM6208 data sheet provides the detailed informationneeded for configuration and use of this device.
Four outputs (Y0-Y3) are configurable as an LVDS, CML, or LVPECL and another four outputs (Y4-Y7)are configurable as LVDS, HCSL, or LVCMOS. All outputs are connected to SMA with AC coupling. Y4-Y7outputs provide the options of 50 Ω to ground (for HCSL outputs).
The LVCMOS outputs can operate at frequencies up to 200 MHz. The HS-CML and NS-CML outputsoperate at up to 800 MHz. The LP-CML and HCSL outputs operate at up to 400 MHz.
4 Software-Selectable Option
The EVM control software communicates with the CDCM6208 through a USB interface and theCDCM6208 SPI or I2C port. The USB controller is normally powered over the USB cable. When theUSB/SPI or USB/I2C programming interface is available for use, the on-board LED, D3, is illuminated.
The CDCM6208 GUI can save device configurations into a configuration file (.INI), which are loaded at alater time restoring the saved settings.
5 Installing the EVM Control Software and USB Driver
Start the EVM software installation by double-clicking on the file named CDCM6208_Installer.exe. TheMicrosoft .NET Framework 4.0 is automatically downloaded and installed on the computer, if it is notalready installed. The installer attempts installation of the EVM hardware driver.
5.1 CDCM6208 Control User Interface
The following represents the initial screen of the GUI:
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Figure 2. Initial GUI Screen
6 Using the EVM Control Software
The graphical layout of the programming software is based on the functional structure of the CDCM6208.The following settings are changed with this tool:
• Input frequency
• Input divider
• Input type
• Input selection to the PLL
• Charge-pump current
• Internal loop filter components (3rd Pole)
• Pre-scalar and feedback divider
• Output MUX selection
• Output divider or frequency
• Output type
This software also sets input and output buffer supply voltage bits (1.8 V or 2.5/3.3 V)..
6.1 Primary and Secondary Reference Signal Type Selection
Using the pull-down menu, input clock type is selected or input buffer is disabled. The input signal type forPrimary clock and Secondary clock are set to either LVDS, CML, or LVCMOS. Additionally, crystal input isselectable for Secondary input.
6.2 Input Divider For Primary Reference ®) Selection
The primary reference has a 4-bit divider ®), therefore, up to 16 appropriate divider values are available.
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6.3 Input MUX Selection
The CDCM6208 employs a smart MUX selecting the input clock for the PLL. The input clock is eitherprimary reference only, secondary reference only, or in automatic selection mode. Toggling the connectionline, the proper reference input is selected. If the Auto box is selected, automatic input selection mode isactivated.
6.4 Input Divider (M) For the PLL Selection
The input (M) divider is a continuous 14-b counter (1–16384) that is present after the Smart Input MUX.The output of the M divider sets the PFD frequency to the PLL and must be in the range of 8 kHz to 100MHz.
6.5 Charge Pump Current Selection
The charge-pump current value is chosen from the pull-down menu. The allowable range of the charge-pump current is from 500 µA to 4 mA.
6.6 Loop Filter (3rd Pole only) Selection
C1, R2, and C2 are external loop filter components connected to the ELF pin, but the 3rd pole of the loopfilter is internal to the device with R3 and C3 register-selectable. Appropriate C3 and R3 values areselected using the pull-down menu.
6.7 Feedback Divider Selection
The feedback divider (N) is made up of a cascaded 8-b counter divider (1–256) and a 10-b counter divider(1–1024) present on the feedback path of the PLL. If the divider value is available, the softwareautomatically selects the proper combination from the two cascaded dividers. The output of the N dividersets the PFD frequency to the PLL and must be in the range of 8 kHz to 100 MHz.
6.8 Prescalar Dividers (PS_A and PS_B) Selection
The prescaler (PS) dividers are fed by the output of the VCO and are distributed to the output dividers(PS_A to the dividers for outputs Y0, Y1, Y4, and Y5. PS_B to the dividers for outputs Y2, Y3, Y6, andY7). PS_A also completes the PLL, driving the input of the feedback divider (N). Appropriate values areset for each prescalar using the pull-down menu.
6.9 VCO Frequency Selection
The VCO frequency value depends on the selection of reference input frequency and input dividers,prescalar (PS_A), and feedback dividers. The software automatically calculates the VCO frequency, basedon the selection, and provides the value. If the calculated VCO frequency is outside of the range, it flashsred.
6.10 Output MUX Selection
Both Y4 and Y5 outputs have multiplexers which select one of the three inputs (PRI_REF, SEC_REF, orPS_A) for the outputs. The proper input is selected for the outputs by dragging the connection line.
6.11 Output Dividers
Outputs Y0 and Y1 share one 8-bit continuous integer divider and outputs Y2 and Y3 share another 8-bitcontinuous integer divider; therefore, these pairs of outputs have the same frequency. Each of the outputsY4, Y5, Y6, and Y7 have 8-bit continuous integer dividers and in addition, 20-bit fractional dividers. Thesoftware automatically chooses the right divider values for Y4–Y7 outputs from the integer and fractionaldividers, if the expected output frequency in the desired output box is provided.
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www.ti.com Configuring the Board
6.12 Output Signal Type Selection
Outputs Y0–Y3 offer LP-CML (LVDS like), CML or HS-CML (LVPECL like) signaling types. Using the pull-down menu, one of the signal types is selected for each output or can disable the output channelcompletely. Outputs Y4–Y7 offer LP-CML (LVDS like), HCSL or LVCMOS signaling types. Using the pull-down menu, one of the signal types is selected for each output or can disable the output channelcompletely. If the LVCMOS signal type is selected, check Enable boxes, enabling the outputs individually.
6.13 Additional Features
The EVM software GUI comes with tools that are helpful in optimizing the device settings for bestperformance. These include a Frequency Planning Tool, the Loop Filter Simulator, and the Phase-NoiseSimulator. Each of these tools are described in detail in the Help documentation provided in the GUI.
7 Configuring the Board
The CDCM6208 is a programmable clock driver with many options. The EVM was designed withmaximum flexibility so engineers can configure the EVM for operation at its desired mode.
7.1 Selecting the Interface Connection
The CDCM6208 is configurable via the serial interface or control pins. Both SPI and I2C interface optionsare available for configuring the device. Switch SW1 is dedicated for the SPI interface and switch SW2 isfor the I2C interface. The selected interface switch must be turned on and the other switch must be turnedoff. Both switches must be turned off for Pin control mode.
Header JMP9 also connects an external host to SPI or I2C.
7.2 Configuring the Power Supply
The device is powered up with an external power supply or on-board regulators powered by an attachedUSB cable. The EVM has options for 1.8-, 2.5-, and 3.3-V power supplies. These supply voltages areexternal to, or internal from the regulators. It has five different rails – two for outputs, one for PLL, one fordigital logic, and one for reference input power supplies.
The banana jacks (P2, P3, and P4) are external 3.3 V, 2.5 V, and 1.8 V, respectively. Banana jack P1 isfor GND. Low-dropout regulators U6, U7, and U8, generate 3.3 V, 2.5 V, and 1.8 V, respectively. Thejumper on header JP_3_10 selects between an external or internal 3.3 V, the jumper on header JP_3_11selects between an external or internal 2.5 V, and the jumper on header JP_3_12 selects between anexternal or internal 1.8 V.
The jumpers on the header JMP5 select for the DVDD power rail, JMP1 selects for the PLL power rails,JMP3 selects for the output power rails (Y2, Y3, Y6, and Y7), JPM2 selects for the output power rails (Y0,Y1, Y4, and Y5) and JPM4 selects for the reference input power rails from 3.3-, 2.5-, and 1.8-V powersupplies. Mixed power supplies for this device are possible, using these headers.
NOTE: A USB cable must be connected for biasing voltage generation of 1.2 V and 0.9 V for thereference inputs. These biasing voltages are generated by the on-board regulators which relyon the USB supply. Figure 3 shows the jumper configuration for a USB power supply. TheEVM settings drive the device from the USB with 1.8-V and 3.3-V supplies. Jumpers for theheader JP_3_10 are set to 3.3-V regulator and for JP_3_3_12 header to 1.8-V regulator.DVDD (JMP5), VDD_PLL (JMP1), VDD_IN (JMP4), and VDD_OUTB (JMP3) supplies areset to 1.8 V and VDD_OUTA (JMP2) supply is set to 3.3 V. The entire device is running at1.8 V, except the Y0, Y1, Y4, and Y5 outputs which are running at 3.3 V.
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Figure 3. Jumper Configuration For USB Power Supply
7.3 Configuring the Reference Inputs
The CDCM62008 offers two inputs (PRI_REF and SEC_REF). SMA J18 and J19 are dedicated forPRI_REF (IN1p and IN1n) and SMA J20 and J21 are dedicated for SEC_REF (1N2p and 1N2n). Bothinputs in the EVM are AC-coupled, by default, using coupling capacitors (C25 and C26 for PRI_REF andC29 and C30 for SEC_REF). CDCM6208 does NOT have any internal termination or biasing; so, externalbiasing is required after AC coupling. Headers JMP10 and JPM11 provide the options for PRI_REF inputbiasing and SEC_REF input biasing, respectively. Depending on the input signaling level and powersupply selection, proper biasing must be selected, see Table 1.
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Table 1. Input Selection Jumper Settings
Input Signaling Level Input Supply Voltage JPM10 and JPM11 Selection
CML 1.8 V/2.5 V/3.3 V DVDD
LVDS 2.5 V/3.3 V 1P2V
LVDS 1.8 V 0P9V
LVCMOS 1.8 V/2.5 V/3.3 V GND (1)
Disabled N.A. None(1) This 50 Ω to GND is only required if a signal generator is used.
R83, R84, R85, and R86 resistors (49.9 Ω) provide the termination for 50-Ω trace.
Place 0-Ω resistors in R87 and R89 and remove R72 and R73 resistors for the external clock to SEC_REFconnection.
LVCMOS inputs are single ended and only the positive pins (IN1p for PRI_REF and IN2p for SEC_REF)of the inputs are used and DC terminations are recommended. Replace C25 with a 0-Ω resistor forPRI_REF and C29 with a 0-Ω resistor for SEC_REF.
SEC_REF accepts crystal input. SEC_REF input is configured for crystal input by default and a 25-MHzcrystal is placed in Y1. C27 and C28 provide the load capacitance options for the crystal.
7.4 Configuring the Control Pins
The device has multiple dedicated pins controlling and configuring the operation. These pins must be setas instructed for correct device operation.
Power Down Pin (PDN): This pin has an internal 50-kΩ pull-up resistor. For normal operation, the PDNpin should be left open or connect the jumper (header PDN) to DVDD. For power-down mode, connect thejumper to GND.
Synchronization Pin (SYNCN): This pin has an internal 50-kΩ pull-up resistor. For normal operation, theSYNCN pin should be left open or connect the jumper (header SYNC) to DVDD. An external signal usesthis header to synchronize the outputs. In addition to the header, button SW7 toggles the SYNCN pin.
Mode Selection Pins (SI_MODE0 and SI_MODE1): These two pins select the mode of deviceconfiguration. The SI_MODE1 pin has an internal pull-up resistor and the SI_MODE0 pin has an internalpull-down resistor. The jumpers on the header, SI_MODE0 and SI_MODE1, must be set as shown inTable 2.
Table 2. Mode Selection Jumper Settings
Jumper On SI_MODE1 Header Jumper On SI_MODE0 Header Mode of Configuration
GND Open or GND SPI mode
GND DVDD I2C mode
Open or DVDD Open or GND Pin mode
Reset or Supply Control Pin (RESETN_PWR): This pin has dual functions, depending on the modeselection. This pin acts as a RESETN pin in Interface-programming mode or controls the device core andoutput supply voltage setting. Button SW6 and RESET_PWR header are dedicated for this pin. This pinhas an internal 50-kΩ pull-up resistor. In Interface-programming mode, the header (RESET_PWR) is leftopen or connects the jumper to DVDD. Connecting the jumper to GND or pressing the button (SW6) putsthe device in reset mode. In Pin mode, set the jumper to GND for a 1.8-V power supply and to DVDD for a2.5-V/3.3-V power supply.
Reference Select Pin (REF_SEL): This pin has an internal 50-kΩ pull-up resistor. Connect the headerREF_SEL to GND for PRI_REF input and leave open or connect to DVDD for SEC_REF input selection.See Table 34 in the data sheet (CDCM6208) for a detailed description.
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Status Pin (STATUS1/PIN0): Depending on the operation mode, this is either an input or output pin. InInterface-programming mode, this pin (header STATUS1_PIN0) provides the indication of a particularreference clock selection to the PLL or PLL lock and/or unlock or loss of references depending onRegister 3 Bit 10-12 settings. See Table 3 for a full description:
Table 3. STATUS1 Functional Description
Status Signal Signal Type Register Bit DescriptionName
SEL_REF LVCMOS R3.12 Indicates reference selected for PLL:“0” → Primary“1” → Secondary
LOSS_REF LVCMOS R3.11 Loss of reference input observed at input, Smart MUX output in observationwindow for PLL:“0” → Reference input present“1” → Loss of reference inputs
PLL_UNLOCK LVCMOS R3.10 Indicates unlock status for PLL:“0” → PLL locked“1” → PLL unlocked
In pin mode, this becomes an input pin and the header pin, STATUS1_PIN0, is controlled by PIN0 whichconnects to GND or DVDD.
Device Control Pins (SDI/SDA/PIN1, SDO/AD0/PIN2, SCS/AD1/PIN3 and SCL/PIN4): These four pinshave multiple functions depending on the device’s programming interface (SPI or I2C) and pin-controlmodes. See the data sheet (CDCM6208) for detailed descriptions and see Table 4 for jumperconnections.
Table 4. Device Control Pin Functions
Programming Header Header Header Header RemarksMode SDI_SDA_PIN1 SDO_AD0_PIN2 SCS_ADI_PIN3 SCL_PIN4
SPI Open Open Open Open Jumpers must not be connected in this mode
Open GND (1) GND (1) Open Header SDO_ADO_PIN2 and SCS_ADI_PIN3I2Cprovide the I2C address option
Pin Mode DVDD or GND DVDD or GND DVDD or GND DVDD or GND The pin selections determine the predefined device’sfunctional condition
(1) The control software assumes the default address bit settings for AD[1:0] is 00.
7.5 Selecting the Loop Filter
The CDCM6208 includes an on-chip PLL with a partially-integrated loop filter. External loop components(C1, C2 and R2) are required to complete the PLL. The external loop filter is chosen by selecting one fromthe four available options on the CDCM6208EVM using the dip switch, SW5. Depending upon the device’soperation mode, synthesizer or jitter cleaning, selecting appropriate loop filter values is critical. Two loopfilters, 1 and 2, are for synthesizer mode and the other two filters, 3 and 4, are for jitter cleaning mode. Ifdifferent RC components are required based on the customer’s PLL configuration, these componentsmust be replaced by appropriate resistor and capacitors.
7.6 Configuring the Outputs
All eight outputs are connected to SMA through AC-coupling. Output Y4-Y7 can provide HCSL clocks.These outputs have 50 Ω-to-GND (not populated) and series-resistors (0-Ω populated) options. Placing50-Ω resistors and possibly adjusting the series resistor values (up to 33 Ω) improves ringing if the outputsare configured as HCSL.
7.7 Using the MSP430 as a Bootloader
The onboard MSP430G2001 is a bootloader for the CDCM6208. A separate application note describeshow to generate, debug, and load the needed software for the MSP430.
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www.ti.com A Step by Step Guide on Updating the TUSB3210 Firmware for I2C communication on the CDCM6208 EVM
SW1 and SW2 must be in the OFF position while SW3 must be in the ON position for communication withthe MSP430 (U10) via JTAG (P12) and for communication of the MSP430 with the CDCM6208. Also notethat the MSP430 requires a minimum of 1.8 V for nominal operation. Once the program is loaded to theMSP430, resetting power to the MSP430 makes the bootloader execute again – after this occurs, theMSP430 enters a low-power mode.
8 A Step by Step Guide on Updating the TUSB3210 Firmware for I2C communicationon the CDCM6208 EVM
Older EVM revisions might require to update the TUSB3210 firmware to enable the correct I2Ccommunication between CDCM6208 and TUSB3210. The following steps explain how to update thefirmware.
8.1 Required Software and Hardware
In order to update the TUSB3210 Firmware on the CDCM6208 EVM, the following items are required:
• TI USB EEPROM Burner Utility for the TUSB2136 and TUSB3210
• PC with Windows XP
• USB Cable (Male A to Male B)
• Latest version of TUSB3210 Firmware for the CDCM6208 EVM (SLAC550)
8.2 Installing TI USB EEPROM Burner Software
The TI USB EEPROM Burner software is available on TI’s product page for the TUSB3210 for free. Thisdownload is available at the following URL. The file is located under Software & Development Toolssection.http://www.ti.com/product/tusb3210
Once the .ZIP file is successfully downloaded and extracted, setup and installation can begin by openingthe “DISK1” directory and running the “setup.exe” program. The program will prompt the user uponsuccessful installation.
8.3 Programming the CDCM6208 EVM’s TUSB3210
Step 1 – Powering Up the EVM
The TUSB3210 chip is interfaced with an external EEPROM on the EVM. To ensure propercommunication between the Burner software and the TUSB3210, turn Switch 4 (SW4) to the OFF positionbefore connecting the USB cable to the EVM. SW4 is circled below and is shown in the ON position (seeFigure 4).
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Figure 4. EVM SW4 Location
NOTE: Once the board is powered up, turn SW4 back to the ON position to enable communicationbetween the EEPROM and the TUSB3210 chip. The board is now ready for programming.
Step 2 – Using the TI EEPROM Burner Software
To use the EEPROM Burner Software, simply boot up the program and appropriately fill out the pull downmenus. If the CDCM6208 EVM is recognized by the Burner software and driver, an option under the“Select the USB Device:” should appear named “TI TUSB3210 EEPROMBurner”. This indicates the driverhas successfully connected to the TUSB3210 on the CDCM6208 EVM.
The EVM features 512kbits of EEPROM, so select this option on the ”Select EEPROM Size:” drop downmenu. Finally, locate the location of the new firmware .BIN file. Use the Browse button near the “SelectEEPROM Image:” to locate the .BIN file location. A screenshot of the Burner software is provided inFigure 5.
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Figure 5. TUSB3210 EEPROM Burner Software
To begin the programming sequence, press the Program EEPROM button. The status of the process isshown below the progress bar. Once the programming is complete, a dialog box will appear reading“EEPROM Programmed Successfully!”. This completes upgrading the CDCM6208 EVM Firmware.
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MMBT4401
NPN Controller Power
SPI Solution
Device Communication
I2C Solution
CLK
MOSI
MISO
LE
SPI Mode
Level Translation
SWITCH ON TO UPLOAD
TUSB3210 FIRMWARE
Device Power
Control Pins
Group 1
Control Pins
Group 2 - Pin ModesNOTE: (Leave these pins open if setting
SW1, SW2, or SW3 to SPI or I2C Modes)
DEVICE RESET
PLL Lock
Retain option to use native I2C
from controller if needed.
1) Pin Control - Use Pin jumpers (Group 2)
2) SPI - Set SW1 to On position
3) I2C - Set SW2 to On position
4) Bootloader - Set SW3 to On position (page 7)
(Select only one control mode at a time - Turn switches
off or remove jumpers for non-selected modes)
CDCM6208 EVM Control Modes
1
2
3
PUR
S2
pull-up power
+3V3+5V+5V
+3V3 +3V3 +3V3
+3V3
+3V3
+3V3 +3V3
+3V3+3V3
+3V3
DVDD
+3V3
+3V3
DVDD
+3V3 DVDD
DVDDDVDD
DVDDDVDD
DVDD DVDD
+3V3 +3V3
DVDD DVDD
DVDD
+3V3
SDA SCLSDA SCL
DVDD
POR
POR SCL_PIN4 2
SCS_AD1_PIN3 2
SDI_SDA_PIN1 2
SDO_AD0_PIN2 2
SDI_SDA_PIN1 2
REF_SEL 2 PDN 2
SI_MODE0 2 SI_MODE1 2
STATUS1_PIN0 2
SDI_SDA_PIN1 2
SCL_PIN4 2
SDO_AD0_PIN2 2
SCL_PIN4 2
SDO_AD0_PIN2 2
SCS_AD1_PIN3 2
SCS_AD1_PIN3 2
RESET_PWR 2
STATUS0 2
R522kR522k
12
C43
1uF
C43
1uF
4.7k
R9
4.7k
1
4.7k
R13
4.7k
12
4.7k
R17
4.7k
1
R30 1.5kR30 1.5k
1 2
4.7k
R19
4.7k
12
4.7k
R11
4.7k
1
U1
TUSB3210
U1
TUSB3210
DM019 DP018
SDA11
X161
X260
GND224 GND15
SCL12
PUR17
TEST115 TEST014
GND342
RST13
GND459
VCC110
VCC239
P3.0/RxD/S058
P3.1/TxD/S157
P3.256
P3.4/T054
P0.043
P0.144
P0.245
P0.346
P0.447
P0.548
P0.649
P0.750
VCC362
SUSP16
P1.031
P1.132
P1.233
P1.334
P1.435
P1.536
P1.640
P1.741
P2.022
P2.123
P2.225
P2.326
P2.427
P2.528
P2.629
P2.730
VREN38
VDDOUT37
S28
S39
P3.3/INT1#55
P3.553
P3.652
P3.751
SELF/BUS21
TEST220
11
22
33
44
66
77
63
63
64
64
+5V
DM
DP
GND
J1
Type B USB-Shield
+5V
DM
DP
GND
J1
Type B USB-Shield
3
1
2
45
6R25301
1 2
JP
_3
_1
JP
_3
_1
13
2
-NPR44
-NP1 2
-NPR47
-NP1 2
R515k R515k12
C41
0.1uF
C40
0.1uF
R23
4.7k
C45
33pF
C45
33pF
12
SW10SW10
12
43
5
JP
_3
_3
JP
_3
_3
13
2
JP
_3
_1
3JP
_3
_1
31
3
2
-NPR48
-NP1 2
R79
10k
R79
10k
12
4.7k
R14
4.7k
1
R20 0R20 012
JP
_3
_6
JP
_3
_6
13
2
R28
10k
R28
10k
12
C550.1uF C550.1uF
4.7k
R71
4.7k
1
C42
0.1uF
SW1
TDA04H0SK1
SW1
TDA04H0SK1
1
2
8
7
3
4
6
5
R3410k
12
R532kR532k
12
4.7k
R15
4.7k
1
R22
4.7k
12
12MHZ1
SE3409-ND
12MHZ1
SE3409-ND
1 2
SW4 SDA01H0SBRSW4 SDA01H0SBR1 2
R2910kR2910k
12
R491.5kR491.5k
12
4.7k
R18
4.7k
12
D4LED GREEN
D4LED GREEN 2 1
R511.5kR511.5k
12
C70
10uF/6.3V
C70
10uF/6.3V
R2115K
R2115K
1 2
JP
_3
_2
JP
_3
_2
13
24.7k
R12
4.7k
1
R370.0
1 2
R24
4.7k
12
R50
1M
1 2
C47
0.1uF
D1
LED GREEN
D1
LED GREEN
2 1D2D2
MB
RS
20
40
LT
3
21
R41.5k R41.5k1 2
JP
_3
_7
JP
_3
_7
13
2
R80.0 R80.01 2
C46
1uF
C46
1uF
R45-NP
R45-NP1 2
R35 NP
12
SW2
TDA04H0SK1
SW2
TDA04H0SK1
1
2
8
7
3
4
6
5
-NPR42
-NP1 2
4.7k
R10
4.7k
1
U9
TXB0102
U9
TXB0102
VB+7
GND2
VA+3
A15
A24
OE6B2
1 B18
4.7k
R16
4.7k
12
R26301
1 2
R36301
1 2R733 R7331 2
R27301
1 2
JP
_3
_5
JP
_3
_5
13
2
R39DNIR39DNI
12
R633 R6331 2
JP
_3
_4
JP
_3
_4
13
2
D5LED GREEN
D5LED GREEN 2 1
R57-NP
R57-NP1 2
-NPR43
-NP1 2
U4
24LC512
U4
24LC512
Vcc8
SDA5
A01
A12
A33
Vss4 SCL
6WP7
U2
TPS77333DGK
U2
TPS77333DGK
EN#3
IN15
OUT17
SENSE1
OUT28
IN26
GND4
RESET#2
D3
LED GREEN
D3
LED GREEN
2 1
JMP9
Header 5x1
1
JMP9
Header 5x1
-NPR46
-NP1 2Q12N2222AQ12N2222A
3
1
2
JP
_3
_8
JP
_3
_8
13
C44
33pF
C44
33pF
12
R31 1.5kR31 1.5k1 2
R38DNIR38DNI
12
JP
_3
_9
JP
_3
_9
13
2
CDCM6208V2 EVM Board Schematic www.ti.com
9 CDCM6208V2 EVM Board Schematic
Figure 6. CDCM6208V1/CDCM6208V2 EVM Control Modes
14 CDCM6208 Evaluation Board SCAU049A–May 2012–Revised January 2013Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
Place 10uF close todevice pinto minimize seriesresistance.
Place 0.1uF caps as close aspossible to device pins.
Device Pins and Bypassing
SYNC_PULSEDEVICE RESET
CDCM6208 is a new part number
in our library. Need to attach package
information - including power-pad
dimensions.
VDD_OUTA
VDD_OUTB
VDD_IN
DVDD
VDD_PLL_A
VDD_OUTB
VD
D_O
UT
B
VD
D_O
UT
B
VD
D_O
UTA
VD
D_O
UTA
DV
DD
VD
D_P
LL
VDD_IN
VDD_IN
VDD_OUTB
VDD_OUTA
VDD_OUTA
REG_CAPR
EG
_C
AP
VDD_PLL
VD
D_
PL
L_
A
SYNCNRESET_PWR
SYNCN
YP7 5
YN7 5
YP6 5
YN6 5
YP5 5
YN5 5
YP4 5
YN4 5
REF_SEL1
SCL_PIN41
SCS_AD1_PIN31
SDO_AD0_PIN21
SDI_SDA_PIN11
SI_MODE01
PRI_REFP3
PRI_REFN3
SEC_REFP3
SEC_REFN3
YP
04
YN
04
YN
14
YP
14
YP
24
YN
24
YN
34
YP
34
EL
F3
SY
NC
N1
PD
N1
RE
SE
T_
PW
R1
STA
TU
S1
_P
IN0
1
STA
TU
S0
1
SI_
MO
DE
11
R2 1.5k
1 2
CDCM6208
U3
CDCM6208
U3
SI_MODE01
SDI/SDA/PIN12
SDO/AD0/PIN23
SCS/AD1/PIN34
SCL/PIN45
REF_SEL6
VDD_PRI_REF7
PRI_REFP8
PRI_REFN9
VDD_SEC_REF10
SEC_REFP11
SEC_REFN12
Y4_N25
Y4_P26
VDD_Y427
Y5_N28
Y5_P29
VDD_Y530
VDD_Y631
Y6_P32
Y6_N33
VDD_Y734
Y7_P35
Y7_N36
VD
D_P
LL1
37
VD
D_P
LL2
38
VD
D_V
CO
39
RE
G_C
AP
40
EL
F41
SY
NC
N42
PD
N43
RE
SE
TN
/PW
R44
STA
TU
S1
/PIN
045
STA
TU
S0
46
SI_
MO
DE
147
DV
DD
48
PO
WE
R_
PA
D49
VD
D1
_Y
0_
Y1
13
Y0
_P
14
Y0
_N
15
Y1
_N
16
Y1
_P
17
VD
D2
_Y
0_
Y1
18
VD
D1
_Y
2_
Y3
19
Y2
_P
20
Y2
_N
21
Y3
_N
22
Y3
_P
23
VD
D2
_Y
2_
Y3
24
0201 X7R
0.1uF
0201 X7RC280
0.1uF
1uF
C279
1uF
0201 X7R
0201 X7RC274
0.1uF
10uF
C281
10uF
0201 X7R
0201 X7RC207
0.1uF
L1BLM15HD102SN1D
L1BLM15HD102SN1D1 2
R1 1.5k
1 2
1uF
C291
1uF
DNI
C294
DNI JP_3_16JP_3_16
13
2SW6SW6
12
43
5
0201 X7R
DNI
0201 X7R C283
DNI
C82C82
10uF/6.3V
10uF
C275
10uF
1uF
C293
1uF
0201 X7R
0201 X7RC284
0.1uF
0201 X7R
0201 X7RC288
0.1uF
0201 X7R
0201 X7RC209
0.1uF 10uF
C276
10uF
0201 X7R
0201 X7RC287
0.1uF
0201 X7R
0201 X7RC285
0.01uF
10uF
C277
10uF
0201 X7R
0.1uF
0201 X7R C298
0.1uF
0201 X7R
0201 X7RC289
0.1uF
DNI
C295
DNI
0201 X7R
0201 X7RC286
0.1uF
1uF
C282
1uF
10uF
C278
10uF
0201 X7R
0201 X7RC290
0.1uF
0201 X7R
0201 X7RC211
0.1uF
SW7SW7
12
43
5
1uF
C292
1uF
www.ti.com CDCM6208V2 EVM Board Schematic
Figure 7. CDCM6208V1/CDCM6208V2 EVM Device Pins and Bypassing
15SCAU049A–May 2012–Revised January 2013 CDCM6208 Evaluation BoardSubmit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
PRIMARY REFERENCE INPUT
SECONDARY REFERENCE INPUT
FILTER 1
FILTER 2
FILTER 3
FILTER 4
LOOP FILTER
25MHz for V1 EVM
30.72MHz for V2 EVM
V1: C1=100pF, R2=500, C2=22nF (BW = 300kHz when
PFD=25MHZ, ICP=2.5mA,R3=100, C3=242.5pF)
V2: C1=470pF, R2=560, C2=100nF (BW = 300kHz when
PFD=30.72MHZ, ICP=2.5mA,R3=100, C3=242.5pF)
Input jumpers
Connect center pin to
* 0.9V for 1.8V LVDS
* 1.2V for LVDS
* GND for LVCMOS
* DVDD for CML - also replace
series caps with 0 ohms
V1: C1=1uF, R2=1.3k, C2=22uF (BW = 50Hz when
PFD=8kHZ, ICP=500uA,R3=4010, C3=562.5pF)
V2: C1=5uF, R2=100, C2=100uF (BW = 100Hz when
PFD=80kHZ, ICP=500uA,R3=4010, C3=562.5pF)
V1: C1=4.7uF, R2=145, C2=47uF (BW = 40Hz when
PFD=40kHZ, ICP=500uA,R3=4010, C3=562.5pF)
V2: C1=4.7uF, R2=10, C2=100uF (BW = 600Hz when
PFD=9.6MHZ, ICP=500uA,R3=4010, C3=562.5pF)
V1: C1=220pF, R2=400, C2=22nF (BW = 300kHz when
PFD=30.72MHZ, ICP=2.5mA,R3=100, C3=242.5pF)
V2: C1=200pF, R2=400, C2=22nF (BW = 300kHz when
PFD=25MHZ, ICP=2.5mA,R3=100, C3=242.5pF)
DVDD1p2V0p9V
DVDD1p2V0p9V
PRI_REFP 2
PRI_REFN 2
SEC_REFP 2
SEC_REFN 2
ELF2
R89
DNI1 2
R73
0.0
R73
0.01
2
C25
1uF
C25
1uF
R88
1.3k1 2
C27
10pF
C27
10pF
C30
1uF
C30
1uF
R72
0.0
R72
0.0
12
SW5SW5
TDA04H0SK1
1
2
8
7
3
4
6
5
220pFC20
220pFC26
1uF
C26
1uF
5
JMP10
Header T 5pin
JMP10
Header T 5pin
R83
49.91 2
22nFC19
22nF
C48 DNI
25MHz
Y1
25MHz
Y1
NX3225SA 25MHz
1
1GND1
2
3
3GND0
4
R87R87
DNI1 2
R75R75
4001 2
1uF
C297
1uF
C49DNIC49DNI
MS A
RVE
J18 MS A
RVE
J18 1
2,3,4,5
JMP11
Header T 5pin
5
JMP11
Header T 5pin
0R81 01 2
100pFC18
100pF
MS A
RVE
J20 MS A
RVE
J20 1
R85
49.91 2
MS A
RVE
J19 MS A
RVE
J19 1
C29
1uF
C29
1uF
R84
49.91 2
C22
4.7uF
22nFC17
22nF
R86
49.91 2
C21 47uF
C50 DNI
C28
10pF
C28
10pF
R74R74
5001 2
1uFC24
1uF
MS A
RVE
J21 MS A
RVE
J21 1
R76R76
1451 2
C23 22uF
1uF
C296
1uF
2,3,4,5
2,3,4,5
2,3,4,5
CDCM6208V2 EVM Board Schematic www.ti.com
Figure 8. CDCM6208V1/CDCM6208V2 EVM Reference Inputs
16 CDCM6208 Evaluation Board SCAU049A–May 2012–Revised January 2013Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
Outputs 0 to 3
Outputs 0 to 3 have option for LP_CML, CML, and HS_CML
YP02
YN02
YP12
YN12
YP22
YN22
YP32
YN32
C3
1uF
C3
1uF
MSA
R VE
MSA
R VE
J61
C7
1uF
C7
1uF
MSA
R VE
MSA
R VE
J21
2,3,4,5
MSA
R VE
MSA
R VE
J51
MSA
R VE
MSA
R VE
J81
C4
1uF
C4
1uF
MSA
R VE
MSA
R VE
J71
MSA
R VE
MSA
R VE
J91
C8
1uF
C8
1uF
C1
1uF
C1
1uF
MSA
R VE
MSA
R VE
J31
C5
1uF
C5
1uF
C2
1uF
C2
1uF
C6
1uF
C6
1uF
MSA
R VE
MSA
R VE
J41
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
www.ti.com CDCM6208V2 EVM Board Schematic
Figure 9. CDCM6208V1/CDCM6208V2 EVM Outputs 0 to 3
17SCAU049A–May 2012–Revised January 2013 CDCM6208 Evaluation BoardSubmit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
Outputs 4 to 7
Outputs 4 to 7 have option for HCSL, LVCMOS, LPCML
For HCSL, install 50 ohm termination resistors and adjust
series resistor between 0 and 33 ohms to improve ringing.
YP52
YN52
YP62
YN62
YP72
YN72
YP42
YN42
R61
DNI_49.9
R61
DNI_49.9
12
R67
DNI_49.9
R67
DNI_49.9
12
MSA
R VE
MSA
R VE
J161
C11
1uF
C11
1uF
C15
1uF
C15
1uF
R2260R2260
1 2
R2300R2300
1 2
R2280R2280
1 2
C10
1uF
C10
1uF
MSA
R VE
MSA
R VE
J111
MSA
R VE
MSA
R VE
J171
MSA
R VE
MSA
R VE
J141
R2320R2320
1 2
MSA
R VE
MSA
R VE
J121
R2290R2290
1 2
C14
1uF
C14
1uF
R2310R2310
1 2
R62
DNI_49.9
R62
DNI_49.9
12
C9
1uF
C9
1uF
R2250R2250
1 2
R64
DNI_49.9
R64
DNI_49.9
12
C13
1uF
C13
1uF
R2270R2270
1 2MSA
R VE
MSA
R VE
J151
MSA
R VE
MSA
R VE
J131
R63
DNI_49.9
R63
DNI_49.9
12
R65
DNI_49.9
R65
DNI_49.9
12
C12
1uF
C12
1uFR66
DNI_49.9
R66
DNI_49.9
12
R60
DNI_49.9
R60
DNI_49.91
2
C16
1uF
C16
1uF
MSA
R VE
J10MSA
R VE
1
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
2,3,4,5
CDCM6208V2 EVM Board Schematic www.ti.com
Figure 10. CDCM6208V1/CDCM6208V2 EVM Outputs 4 to 7
18 CDCM6208 Evaluation Board SCAU049A–May 2012–Revised January 2013Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
3.3V Power Supply
2.5V Power Supply
MANY VIAS with Heat Sink
1.8V Power Supply
MANY VIAS with Heat Sink
MANY VIAS with Heat Sink
1.2V and 0.9V LVDS
Common Mode Voltages
3p3V
2p5V
VDD_PLL
VDD_OUTA
VDD_OUTB
VDD_IN
3p3V2p5V
1p8V
3p3V2p5V
1p8V
3p3V2p5V
1p8V
3p3V2p5V
1p8V
DVDD
1p8V2p5V
3p3V
+5V
+5V
1p8V
+5V
1p2V
0p9V
R69R695.9k
12
TPS7A8001
U6
TPS7A8001
U6
OUT11
OUT22
FB3
GND4
EN5
NR6
IN27
IN18
GN
D_P
AD
9
R5910k
12
JP_3_12JP_3_12
13
2
C35
10uF/6.3V
P2
VDD 3.3V
C61750pFC61750pF
JP_3_10JP_3_10
13
2
C3910uF/6.3VC3910uF/6.3V
C650.01uFC650.01uF
TPS7A8001
U8
TPS7A8001
U8
OUT11
OUT22
FB3
GND4
EN5
NR6
IN27
IN18
GN
D_P
AD
9
R32
0
R32
0
R4110k
R4110k
12
C37510pFC37510pF
C620.01uFC620.01uF
R5410k
12
JMP2
Header T 4pin
1
4
Header T 4pin
R56
0
R56
0
R55
0
R55
0
R70R7017.8k
12
C31
10uF/6.3V
R68R6825.5k
12
P3
VDD 2.5V
R40R4030.9k
12
Header T 4pin
1
4
JMP5
Header T 4pin
C36
10uF/6.3V
TPS7A8001
U7
TPS7A8001
U7
OUT11
OUT22
FB3
GND4
EN5
NR6
IN27
IN18
GN
D_P
AD
9
C6610uF/6.3V
C380.01uFC380.01uF
JP_3_11JP_3_11
13
2
C641300pF
Header T 4pin
1
4
JMP3
Header T 4pin
C34
10uF/6.3V
P1
GND
P1
GND
C6310uF/6.3V
Header T 4pin
1
4
JMP1
Header T 4pin
VDD 1.8V
P4
R3321k
12
C32
10uF/6.3V
R5812.5k
12
Header T 4pin
1
4
JMP4
Header T 4pin
C33
10uF/6.3V
www.ti.com CDCM6208V2 EVM Board Schematic
Figure 11. CDCM6208V1/CDCM6208V2 EVM Power Supplies
19SCAU049A–May 2012–Revised January 2013 CDCM6208 Evaluation BoardSubmit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
SPI CLK
SPI data to 6208
SPI Enable
RESET to be held low until
SPI operations are complete
Microcontroller can be programmed to load device registers
at power up. RESETN is help low during SPI operations.
When register loading is complete, RESETN is set high and
MSP430 enters low-power mode. MSP430 supply needs to be at
least 1.8V for proper operation.
Optional Inputs for MSP430 Firmware
Use to select between different register preload options.
4
DVDD
DVDD
DVDD
DVDD
DVDD
P1p1
DVDD
P1p0
P1p0
P1p1
SCL_PIN4 2
SCS_AD1_PIN3 2
SDI_SDA_PIN1 2
RESETN 2
R77
4.7k
1
R3R347k
12
C672.2nF
P12
TSM-107-01-S-DV
FET Tool Connector
1 2468101214
3579
1113 0
201 X7R C68
0.1uF
JP
_3
_1
5JP
_3_15
13
2 R78
4.7k
1
MSP430G2001
U10
MSP430G2001
U10
RST / SBWTDIO10
TEST / SBWTCK11
XOUT12
XIN13
P1.02
P1.13
P1.24
P1.35
P1.46
P1.5 / SCLK7
P1.6 / SDO / SCL8
P1.7 / SDI / SDA9
VC
C1
VS
S14
JP
_3
_1
4JP
_3_14
13
2
SW3SW3
TDA04H0SK1
1
2
8
7
3
4
6
5
CDCM6208V2 EVM Board Schematic www.ti.com
Figure 12. Onboard MSP430G2001
20 CDCM6208 Evaluation Board SCAU049A–May 2012–Revised January 2013Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMSTexas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions:
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claimsarising from the handling or use of the goods.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days fromthe date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TOBUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OFMERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTHABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIALDAMAGES.
Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. Thisnotice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safetyprograms, please visit www.ti.com/esh or contact TI.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, orcombination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, andtherefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design,software performance, or infringement of patents or services described herein.
REGULATORY COMPLIANCE INFORMATIONAs noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the FederalCommunications Commission (FCC) and Industry Canada (IC) rules.
For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT,DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumeruse. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computingdevices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequencyinterference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense willbe required to take whatever measures may be required to correct this interference.
General Statement for EVMs including a radioUser Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency andpower limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with locallaws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate thisradio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited andunauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatoryauthorities, which is responsibility of user including its acceptable authorization.
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant
CautionThis device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not causeharmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate theequipment.
FCC Interference Statement for Class A EVM devicesThis equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercialenvironment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with theinstruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely tocause harmful interference in which case the user will be required to correct the interference at his own expense.
FCC Interference Statement for Class B EVM devicesThis equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules.These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipmentgenerates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may causeharmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. Ifthis equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off andon, the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.• Increase the separation between the equipment and receiver.• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.• Consult the dealer or an experienced radio/TV technician for help.
For EVMs annotated as IC – INDUSTRY CANADA Compliant
This Class A or B digital apparatus complies with Canadian ICES-003.
Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate theequipment.
Concerning EVMs including radio transmitters
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) thisdevice may not cause interference, and (2) this device must accept any interference, including interference that may cause undesiredoperation of the device.
Concerning EVMs including detachable antennasUnder Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gainapproved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain shouldbe so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication.
This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximumpermissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gaingreater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada.
Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité del'utilisateur pour actionner l'équipement.
Concernant les EVMs avec appareils radio
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation estautorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter toutbrouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gainmaximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique àl'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente(p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante.
Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manueld’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus danscette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur.
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【【Important Notice for Users of this Product in Japan】】This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan
If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product:
1. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs andCommunications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law ofJapan,
2. Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to thisproduct, or
3. Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan withrespect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please notethat if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan.
Texas Instruments Japan Limited(address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan
http://www.tij.co.jp
【ご使用にあたっての注】
本開発キットは技術基準適合証明を受けておりません。
本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。2. 実験局の免許を取得後ご使用いただく。3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
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EVALUATION BOARD/KIT/MODULE (EVM)WARNINGS, RESTRICTIONS AND DISCLAIMERS
For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finishedelectrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation inlaboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risksassociated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished endproduct.
Your Sole Responsibility and Risk. You acknowledge, represent and agree that:
1. You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and DrugAdministration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees,affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes.
2. You have full and exclusive responsibility to assure the safety and compliance of your products with all such laws and other applicableregulatory requirements, and also to assure the safety of any activities to be conducted by you and/or your employees, affiliates,contractors or designees, using the EVM. Further, you are responsible to assure that any interfaces (electronic and/or mechanical)between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents tominimize the risk of electrical shock hazard.
3. You will employ reasonable safeguards to ensure that your use of the EVM will not result in any property damage, injury or death, evenif the EVM should fail to perform as described or expected.
4. You will take care of proper disposal and recycling of the EVM’s electronic components and packing materials.
Certain Instructions. It is important to operate this EVM within TI’s recommended specifications and environmental considerations per theuser guidelines. Exceeding the specified EVM ratings (including but not limited to input and output voltage, current, power, andenvironmental ranges) may cause property damage, personal injury or death. If there are questions concerning these ratings please contacta TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of thespecified output range may result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/orinterface electronics. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to theload specification, please contact a TI field representative. During normal operation, some circuit components may have case temperaturesgreater than 60°C as long as the input and output are maintained at a normal ambient operating temperature. These components includebut are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors which can be identified using theEVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during normal operation, pleasebe aware that these devices may be very warm to the touch. As with all electronic evaluation tools, only qualified personnel knowledgeablein electronic measurement and diagnostics normally found in development environments should use these EVMs.
Agreement to Defend, Indemnify and Hold Harmless. You agree to defend, indemnify and hold TI, its licensors and their representativesharmless from and against any and all claims, damages, losses, expenses, costs and liabilities (collectively, "Claims") arising out of or inconnection with any use of the EVM that is not in accordance with the terms of the agreement. This obligation shall apply whether Claimsarise under law of tort or contract or any other legal theory, and even if the EVM fails to perform as described or expected.
Safety-Critical or Life-Critical Applications. If you intend to evaluate the components for possible use in safety critical applications (suchas life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, such as deviceswhich are classified as FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separateAssurance and Indemnity Agreement.
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