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    Digital Signal Processing: A Practical Guide

    By Michael Parker, Altera Corporation

    Series Part 2 of 7

    Re-Introduction

    This is a book intended for those who work in or provide components for industries which aremade possible by Digital Signal Processing, or DSP. Example industries are wireless mobile

    phone and infrastructure equipment, broadcast and cable video, DSL modems, satellite

    communications, medical imaging, audio, radar, sonar, surveillance, electrical motor control this list goes on. While the engineers who implement these systems must be very familiar

    with DSP, there are many others executive and mid-level management, marketing, technical

    sales and field engineers, business development and others who can benefit from a basic

    knowledge of the fundamental principals of DSP.

    That is the purpose of this book - to provide a basic tutorial on DSP. This is a topic which

    seems to have a dearth of easy to read and understand explanations. Unlike most technicalresources, this is a treatment where mathematics is minimized and intuitive understanding

    maximized. This book attempts to de-mystify many difficult concepts like sampling, aliasing,

    imaginary numbers, frequency response using easy to understand examples. In addition, thereis an overview of the DSP functions and implementation used in several DSP intensive fields

    or applications, from error correction to CDMA modems to radar systems.

    See Series Part #1 at: http://www.techonline.com/learning/techpaper/221900965

    Chapter 5. Finite Impulse Response (FIR) FiltersThis chapter focuses on the workhorse of DSP the FIR filter. Three main topics will be

    examined. First an overview of the structure of a FIR filter, how to build one, and some of its

    properties will be examined. Second, given the filter coefficients, computing the frequencyresponse of the filter in software will be examined. Last, a method to compute coefficients to

    meet a given frequency response will be examined. This last step is what is required of a DSP

    designer to find the number and value of filter coefficients needed for the required frequencyresponse of an application. Filter design is a process where compromise is necessary. In order

    to use software tools to design filters, an understanding of what the different trade-offs are

    and how they interact is necessary.

    FIR Filter Construction

    A FIR filter is built of multipliers and adders. It can be implemented in hardware or software,

    and run in a serial fashion, parallel fashion, or some combination. An overview of the parallelimplementation is offered.

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    FIR filters, and DSP in general, often use delay elements. A delay element is simply a clocked

    register, and a series of delay elements is simply a shift register. However, in DSP, a one

    sample delay element is often represented as a box with a z-1

    symbol. This comes from the

    mathematical properties of the z-transform that will not be covered. But the use of z-1

    represents a single clock or register delay, as it is prevalent in DSP diagrams and literatureused in the industry.

    A key property of a FIR filter is the number of taps, or multiplies required to compute each

    output. In a parallel implementation, the number of taps or coefficients equals the number ofmultipliers. In a serial implementation, one multiplier is used to do all the multipliessequentially for each output. Assuming single clock cycle multipliers, a parallel FIR filter can

    produce one output each clock cycle, and a serial FIR filter would require N clock cycles to

    produce each output, where N is the number of filter taps. Filters can sometimes have

    hundreds of taps.

    The inputs and outputs of the FIR filter are sampled data. For simplicity, we will assume that

    the inputs, outputs and filter coefficients Cm are all real numbers. The input data stream will

    be denoted as xk, and the output yk. The k subscript is used to identify the sequence of data.For defining a steady state response, assume that the data streams are infinitely long in time,

    or that k extends from to +. The coefficients are usually static (meaning they do notchange over time), and determine the filters frequency response.

    Figure 1. A small 5 Tap Parallel Filter

    The equation forms will be shown in the book.

    Another way to look at this is that the data stream ...xk+2, xk+1, xk, xk-1, xk-2.is sliding past a fixed array of coefficients. At each clock cycle, the data and coefficients are

    cross multiplied and the outputs of all multipliers for that clock cycle are summed, to form a

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    single output (this process is also known as dot product). Then on the next clock cycle, the

    data is shifted one place relative to the coefficients (which are fixed), and the processrepeated. This process is known as convolution. An example using actual numbers will be

    offered to illustrate this process.

    The FIR structure is very simple, yet is has the ability to create almost any frequency

    response, given sufficient number of taps. This is very powerful, but unfortunately not at allintuitive.

    Computing Frequency Response

    Thus far the mechanics of building the filter and how to compute the output data, with the

    given coefficients and input data has been covered. Its not obvious how this operation canallow some frequencies to pass through and block other frequencies. A bit of math will be

    needed to figure this out. This process will be fully covered in the book, starting by

    computing the frequency response of the filter from the coefficients.

    Computing Filter Coefficients

    The next question that arises is can the coefficients of a digital filter be found that matches theresponse based on a drawing of a frequency response? You are now designing a digital filter.

    A filter design program is used to do this, and it will be helpful to have some understanding of

    what the program is doing. Configuring the program options requires an understanding of the

    basics of filter design. Explaining a technique known as the Fourier design method requires alittle more math than has been used thus far. The ideas that are covered in detail in the book

    will be very helpful when using a digital filter design program. Following is a brief overview.

    The desired frequency response is designated asD(). This is frequency response is thedesign goal. As before,H() will represent the actual filter response based upon the numberand value of the coefficients. Now define the error, (), as the difference between what isdesired and what is realized from a particular filter.

    () =D() - H()

    All three of these functions are complex when evaluated, and will have a magnitude andphase. The primary concern is with the magnitude of the error, not its phase. One simple way

    to eliminate the phase in the () is to work with the magnitude squared of ().

    | () |2 = {Real part ()}2 + {Imag part ()}2 = () ()*

    where * is the complex conjugate operator (recall magnitude squared is a number multiplied

    by its conjugate, in the chapter on complex numbers). The squaring of the error functiondifferentially amplifies errors. It makes the error function much more responsive to largeerrors than smaller errors, usually considered a good thing.

    In order to get the cumulative error, evaluate the magnitude squared error function over the

    entire frequency response.

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    Error = = -

    | () |2 d

    The classic method to minimize a function is to evaluate the derivative with respect to the

    controlled parameter. In this case, try to evaluate the derivative of with respect to thecoefficients, Ci. This will lead to an expression that can be computed for the coefficients that

    result in the minimum error, or minimize the difference between the desired frequency

    response and the actual frequency response. The use of math has been minimized and theprecalculated derivation is located in Appendix A of the book. The result is what is important.

    Ci = (1/2) -D() e

    jid

    This provides a design equation to compute the filter coefficients which give a response best

    matching the desired filter response,D().

    An additional example whereD() is defined as a low pass filter with cutoff at = /2, basedon Figure 2. Give it a try on your own, but it will be fully explained in the book.

    Figure 2. An Ideal Low Pass Filter

    Effect of Number of Taps on Filter Response

    A picture is worth a thousand words and there are several shown in the book illustrating

    multiple plots of this filter with indicated number of coefficients.

    Filter plots are always given on a logarithmic amplitude scale that allows a visual inspection

    of the passband flatness, as well as see how much rejection, or attenuation, the filter provides

    to signals in its stopband. The examples in the book are filter and coefficient plots using a FIRFilter program. These filters can be easily implemented in FPGA or DSP processor.

    FIR filters will have a delay or latency associated with them. Usually, this delay is measuredby comparing an impulse input to the filter output. This again is illustrated in a series of plots

    in the book, where the output is started one clock after the impulse input. This output or filter

    impulse response spans the length of the filter, thus the delay from the impulse input to the

    largest part of the filter output can be measured. In most cases, this will be the middle orcenter tap. Since a FIR filter adds equal delay to all frequencies of the signal, it introduces no

    phase distortion, and this is has a property called linear phase.

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    This may not be a clear explanation (the book diagrams will help), but the essence is thatsince no phase distortion occurs when the signal passes though a FIR filter, the filter phase

    response in the design process need not be considered. This is one reason why FIR filters are

    preferred over other types of digital filters.

    The next chapter will cover with a topic called windowing, which is a method to optimizeFIR filter frequency response without increasing the number of coefficients.

    Chapter 6. WindowingIn the previous chapter, a technique was developed for calculating filter coefficients thatgenerates a desired frequency response. The desired filter response may generate an infinite

    number of coefficients, which leads to deciding how many coefficients to keep, and throw

    away or truncate the rest. As the number of coefficients grows larger, the transition regionfrom pass to stop band grows steeper, and the stopband rejection or attenuation increases.

    Frequency response =H() = i= - to Ci e-ji

    The smaller transition region, or steepness of the transition from pass to stop band, is due to

    higher frequency components in the frequency response. The higher indexes of i in thefrequency response correspond to higher frequency complex exponentials. So by using a large

    number of coefficients, a steep transition band can be achieved. As complex exponentials

    have a sinusoidal characteristic, in order to get a quick response, use higher frequency

    exponentials.

    The process of truncating the infinite number of coefficients in called windowing. Imagine

    Ci= - to , and multiplying it term by term with a window function, Wi = - to .This allows the weighting of coefficients to be tapered off in a controlled manner. Examples

    of the plots in the book from the previous chapter illustrate this theory.

    Window design and analysis involve a fair amount of mathematics. Many filter designers do

    not know the details of the various window functions offered by their filter design software,

    but work iteratively instead. That is, the designer will experiment with moving the frequencycutoff point slightly, and playing the allowable number of taps, the various window options,

    and sometimes the numerical precision (number of bits) of the input data and coefficients. By

    observing the computer generated frequency plots included in the book, the designer caniterate to find an optimum combination of these parameters that meet the application

    requirements.

    Often, the requirements will be a certain degree of filter rejection or attenuation at one or

    more specific frequency points, a maximum amount of ripple or variance in the passbandregion of the frequency response, and a specified region of the frequency response.

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    Figure 3. Typical Filter Performance Parameters

    The window coefficients will not be equal to 1 or 0 as in a rectangular window, but will

    gradually transition to from 1 to 0 in some fashion near the edges of the window. The form of

    this transition defines the window properties. In general, a window cannot increase the

    steepness of the transition region, but it can be used to reduce either the passband or stopbandripple in the frequency response. Most filter design programs offer several window options.

    There are four separate frequency responses with different windows for comparison included

    in the book, showing 61 tap band pass filter. The major tradeoff between the differentwindows is the width of the transition band and the amount of attenuation in the stopband

    region of the frequency response. These windows have a similar effect whether applied to low

    pass filters, high pass filters, or band pass filters.

    Chapter 7. Decimation and Interpolation

    Decimation is the process of reducing the sample rate Fs in a signal processing system, and

    interpolation is the opposite, increasing the sample rate Fs in a signal processing system. This

    process is very common in signal processing systems, and is nearly always performed using a

    FIR filter.

    Why are sampling rates changed? The most common reason is to make it easier the interfacedigital signals to the outside environment. Signals have a frequency representation, and this

    frequency representation must be less than the Nyquist Frequency, which is defined as Fs/2.

    This sets a lower bound on Fs. The amount of hardware or software processing resources is

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    normally proportional to Fs, so Fs is usually kept as small as practical. While there is no upper

    bound on Fs, it is usually less than 10x the frequency representation of the signal. A minimum

    Fs is needed to that ensure the highest frequency portion of the signal does not approach the

    FNyquist frequency.

    In some cases, there are advantages to highly oversampling a signal, where F s >> Fsignal. If Fs

    is high, then so is FNyquist. All signals represented below FNyquist in the sampled domain

    (assuming no aliasing has occurred) can be accurately represented. By making FNyquist large,

    any unwanted signals in that frequency space can be eliminated, or at least highly attenuated,

    by using a digital filter with its passband matching the desired frequency and with its

    stopband for the rest of frequency spectrum up to FNyquist. An analog filter is needed to filter

    out frequencies above FNyquist. By increasing Fs and therefore FNyquist, the requirements for

    analog filtering prior to the ADC can be simplified. Once these unwanted signals pass through

    both the analog and digital filters and are successfully filtered out, there is no further need of

    keeping the Fs >> Fsignal, and should consider lowering Fs to reduce resources required for

    subsequent processing.

    Decimation

    Decimation, also called down sampling, affects the frequency representation of the signal as

    well as the time domain. First the sampled signal is sampled at Fs and at Fs`, where Fs` = Fs/2

    (see Figure 4. The new sampling rate Fs` is the sampling rate after decimating by 2 (see

    Figure 5).

    Figure 4. Original Sampling Rate = Fs.

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    Figure 5. New Sampling Rate = Fs` = Fs/2.

    Figure 6 is the frequency domain perspective of decimation.

    Figure 6. Frequency Domain Representation of Decimation

    By examining the frequency plots, the signal has not changed, only the sampling ratefrequency and corresponding Nyquist rate frequency have. As long as the new Nyquist

    Frequency is larger than the signal frequency, no aliasing will occur.

    The signal images, which are periodic in Fs, and a natural consequence of sampling, are also

    shown. When decimating, the images become periodic in the new sample rate Fs`.

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    It could decimate by simply throwing away samples. In the example, by throwing away everyother sample, the sample rate will be reduced by a factor of , and result will be as shown in

    Figure 5.

    However, the decimation process usually has a low pass filter incorporated. The ADC

    example could be implemented using the block diagram shown in Figure 7. In this example,the analog low pass filter (LPF) is responsible for removing all unwanted signals above

    FNyquist, which would otherwise alias into the frequency region where the signal is. With this

    analog LPF prior to the ADC, any signals below FNyquist are legitimate signals, and not

    aliased versions of some higher frequency unwanted signal or noise. A LPF prior to the

    decimator must be provided to remove any frequency components between F Nyquist and Fs`,

    else any frequency components in this frequency band will alias, or fold back, into the

    frequency band below our new Nyquist Frequency F Nyquist . The approximate frequency

    response of the analog and digital LPF is depicted in the frequency domain diagram in

    Figure 6.

    Figure 7. Decimation Application Example Data Acquisition

    Why compute samples at rate Fs in the digital LPF if they are going to discard of them inthe decimator? This is a waste of processing resources. Instead, build a digital filter that only

    computes every other sample, and therefore accomplishes the function of the decimatorshown separately in Figure 8. And in the process, there is only a need for one half of the

    multiplier rate to implement the digital LPF.

    To see how we might do this, we will reconsider the FIR block diagram.

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    Figure 8. A Typical Block Diagram of a 5 Tap Decimate by-2 FIR Filter

    In the normal case, at each clock cycle, the xkdata advance into the shift register of the filter

    structure, and an output ykis produced. As was done earlier, a sequence of inputs can be built

    while computing the sequence of outputs. The filter equation and further detailed information

    is covered in the book.

    The output sequence is the decimated, filtered sequence { y0, y2, y4.} only the shift

    registers operate at the higher input rate. The rest of the circuitry can be clocked at the output

    clock rate. If implemented in software, or in the hardware filter design, fewer multipliers can

    be used and they run at the slower output speed. This is beyond the scope of the book, but ingeneral, whether implementing DSP algorithms in hardware (FPGA or ASIC) or in software

    (DSP processor), the multipliers can be multiplexed such that it does not matter whether thereare a few very fast multipliers or a large number of slow multipliers or anything in between,

    so long as the cumulative multiply-accumulate capacity is sufficient for the DSP algorithmrequirement. A more detailed description of decimation is offered in the book.

    Interpolation

    As was just covered, decreasing the sample rate Fsby an integer value can be accomplished

    by a decimation FIR filter. Similarly, the sample rate Fs can be increased by an integer value

    using a type of FIR filter called an interpolation filter. This is called upsampling, and is the

    opposite of decimation. As long as the signal frequency content is below the Nyquist

    frequency at the decimated sampling frequency, one can decimate a signal and then turnaround and interpolate it, and recover the same signal.

    Interpolation requires that the sample rate be increased by some integer factor. New samples

    need to be created, and inserted between the existing samples. Following is a very simpleexample of interpolation using the sine wave example and interpolating it by a factor of two

    (see Figures 9 and 10).

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    Figure 9. Original Sampled Signal

    Shown is the original signal at sample rate Fs. Blue arrows indicate approximately where

    new samples must be created to interpolate up to sample rate Fs` = 2 Fs. There are no

    aliasing issues, because both the sample frequency and Nyquist Frequency are increasing, in

    this case doubling.

    The simplest and most intuitive way to interpolate is called linear interpolation. In linear

    interpolation, one simply draws a straight line between the original samples, and calculates

    the new samples along this line. In this case, if it is interpolated by 2, then the point located

    mid-way along the line between the original points is needed. Linear interpolation, whether byfactor of 2, 3, 4. is equivalent to drawing a line between all the original points. It looks

    something like Figure 10.

    Figure 10. Shows the Signal at Fs` = 2 Fs with Linear Interpolation

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    Although not oversimplified here, building an interpolation filter is covered thoroughly in the

    book. An interpolation filter is actually several filters running in parallel, each with the same

    data input xk. Each filter computes a different intermediate sample. One filter has a single tap

    = 1, which provides the original signal at the output (this could just be a shift register to

    provide correct delay). Each of the other filters calculates one of the new samples between theoriginal samples. When interpolating by N, there will be N of these filters, including the

    trivial filter that generates the original samples.

    Interpolating polyphase filters can be abit tricky and what happens in the time or sample

    domain is covered in the book.

    Resampling by Non-Integer Value

    Suppose alignment is required for the sample rates between sets of digital circuitry running at

    different sampling rates. For example, the sampling rate of the first circuit is 3 MSPS, and thesecond circuit has a sampling rate of 2 MSPS. You will need to decimate, or downsample, by

    2/3. This can be done by a combination of interpolating and decimating, where interpolating

    by 2 and then decimate by 3 is carried out. This procedure is fully explained and annotated in

    the book.

    Chapter 8. Infinite Impulse Response (IIR) FiltersThis chapter discusses IIR filters. The IIR filter is much more complex topic than the FIR

    filter, and due to its non-linear behavior, it is very difficult to analyze. For this reason, IIR is

    used much less than FIR filters. On the plus side, since it is not commonly used,

    understanding IIR filters is not essential to the fundamental concepts of DSP. The IIR filterdesign technique is usually considered a bit of a specialty in the DSP world, so the subject

    will be covered in detail in the book.

    Also, if the math proves to be abit much, note that the discussion here is not necessary to

    continue on to the other topics in the remainder of this book.

    Most digital IIR filter designs are derived from analog filter designs. As analog filters were

    around long before digital filters existed, this provides for many types of filters.

    The basic design procedure will be to take an analog filter design, and convert it to a digital

    IIR filter implementation.

    An IIR filter is basically a FIR filter with feedback added. The FIR filter takes a stream of

    input data and multiplies it by a series of coefficients to produce each output. The IIR filteralso does this, but in addition, it feeds the output data stream back through another series of

    multipliers and coefficients as shown in Figure 11.

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    Figure 11. Recursive (IIR) Filter

    This feedback eliminates many of the linear properties of the FIR filter, and makes the IIP

    filter much more difficult to analyze. It can also create some undesired behavior, dependingon the choice of coefficients, where the impulse response may have an infinite duration or

    even an infinite magnitude.

    IIR and FIR Filter Characteristic Comparison

    A summary of advantages and disadvantages of IIR and FIR digital filters follows:

    FIR filters have linear phase, meaning that no phase distortion of the signal occurs(remember the signal is generally complex, with magnitude and phase). IIR filters

    will always cause some phase distortion*, so the phase as well as magnitude

    response needs to be considered by the filter designer.

    FIR filters are always stable, and has a finite length impulse response. IIR filtersgenerally have an infinite length impulse response, and may have infinite magnitude

    output (become unstable) under some conditions.

    FIR filters can be designed with a specified amount of quantization noise (rememberquantization from Numerical Representation chapter), which can be made as small

    as necessary. This is not the case with IIR filters.

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    FIR filters can be implemented efficiently in multi-rate systems, or systems whichhave decimation or interpolation steps.

    IIR filters are very sensitive to coefficient values and numerical precision in designswhich require a sharp cutoff frequency response.

    An IIR filter can provide a much sharper cutoff frequency response compared to thesame order FIR filter. In other words, for sharp response in a FIR filter, more

    resources (multipliers and adders) are required than in IIR filter.

    *Phase distortion happens when the phase response of the filter changes in non-linearly across

    the filters passband frequency response. Recall that filters are complex; they can affect both the

    magnitude and phase of the signal.

    Based upon these advantages and disadvantages, it may be asked why anyone would want touse IIR filters. Aside from the last bullet, which lists a key advantage of IIR filters, the reason

    is that IIR filters can best approximate the performance of many analog filter responses.

    Sometimes when a system with analog filtering is being upgraded to digital implementation, itis important to preserve its performance characteristics, especially in the phase domain.

    Even a basic understanding of IIR filters requires some mathematics, because analog filters

    are characterized by something called the Laplace transform. Digital filters arecharacterized by something called the z-transform. Because of their simplicity, we managed

    to avoid the z-transform when discussing FIR filters, but we will not have that option here.

    Bilinear Transform

    The normal design procedure for IIR filters is to specify the filter response and design an

    analog filter using analog filter techniques (using Laplace transform). Alternately, you mightbe given an analog filter design, and be asked to convert it to a digital implementation. The

    analog filter design is based upon the location of poles and zeros in the s plane. A digital

    filter response can be characterized by using z-transform. The equivalent pole and zerodomain for digital filters is called the z plane. The idea is to map the s plane poles and

    zeros to the z plane, The mapping technique most often used between the s and z

    domains is called the bi-linear transform. There are other techniques, but those will not cover

    these here. Only a rudimentary coverage is attempted in the book, as the topics involved arefairly mathematical.

    Note that both the Laplace and z-transforms are reviewed in appendices at the end of thisbook. If you havent looked at these recently, spend a little time going through the Laplace

    and Z-transform appendices.

    Frequency Pre-Warping

    One final point to consider in this technique is to take the poll and zero locations (in the s-

    plane) of an analog filter, and to map them to pole and zero locations (in the z-plane) of an

    IIR digital filter.

    As this relationship is not linear and fairly detailed, rely on the overview in the book to

    explain this relationship. Suffice to say that this non-linear mapping will cause filter response

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    distortion, particularly at higher frequencies. A method to mitigate this is to pre-warp the

    analog filter explained fully in the book.

    For those without much analog filter design experience, you may be wondering how to

    modify the analog filter, in order to find pre-warped analog poles and zeros which will then bemapped to the digital domain. This is a valid question, but well beyond the scope of this

    chapter. The focus is on how to learn the basics of converting an analog filter to a digital IIRfilter. Since analog filter design a complex and mathematical subject, there are softwareprograms that can be used to perform analog filter design, and even convert these to a digital

    IIR design.

    **************************************************************************

    Chapters 9 12 ofDigital Signal Processing: A Practical Guide covering Complex Modulation and

    Demodulation, Discrete and Fast Fourier Transforms (DFT, FET), Digital Up and Down Conversion

    and Error Correcting Coding will be covered in the next installment of this book summary here in DSP

    DesignLine in early January 2010 or sign up for the RSS Feed on DSP DesignLine.

    Digital Signal Processing: A Practical Guideis being published by Elsevier Science & TechnologyBooks - Newnes Press and will be available for purchase at ESC Silicon Valley, being held at the San

    Jose Convention Center on April 26 - 29, 2010.

    Order on line at: www.elsevierdirect.com/9781856179218

    You can also save 20% when pre-ordering this book by entering the following promotional code at

    checkout- 97521.