advanced computer architecture laboratory eecs 598-1 fall 2001 quantum logic circuits john p. hayes...

Advanced Computer Architecture Laboratory

EECS 598-1 Fall 2001

Quantum Logic Circuits

John P. Hayes

EECS DepartmentUniversity of Michigan,

Ann Arbor, MI 48109, USA

October 2001


Outline

• Classical vs. Quantum Circuits

• Reversible Circuits

• Quantum Gates

• Quantum Circuits

• Physical Implementation


• Goal: Fast, low-cost implementation of useful algorithms using standard components (gates) and design techniques

• Classical Logic Circuits> Circuit behavior is governed implicitly by classical physics> Signal states are simple bit vectors, e.g. X = 01010111> Operations are defined by Boolean Algebra> No restrictions exist on copying or measuring signals> Small well-defined sets of universal gate types, e.g. {NAND},

{AND,OR,NOT}, {AND,NOT}, etc.> Well developed CAD methodologies exist> Circuits are easily implemented in fast, scalable and macroscopic

technologies such as CMOS

Classical vs. Quantum Circuits


• Quantum Logic Circuits> Circuit behavior is governed explicitly by quantum mechanics> Signal states are vectors interpreted as a superposition of binary

“qubit” vectors with complex-number coefficients

> Operations are defined by linear algebra over Hilbert Space and can be represented by unitary matrices with complex elements

> Severe restrictions exist on copying and measuring signals> Many universal gate sets exist but the best types are not obvious> Circuits must use microscopic technologies that are slow, fragile,

and not yet scalable, e.g., NMR


ci in 1in 1i0i 0

2n 1


• Unitary Operations> Gates and circuits must be reversible (information-lossless)

- Number of output signal lines = Number of input signal lines

- The circuit function must be a bijection, implying that output vectors are a permutation of the input vectors

> Classical logic behavior can be represented by permutation matrices

> Non-classical logic behavior can be represented including state sign (phase) and entanglement

Quantum Circuit Characteristics


• Quantum Measurement> Measurement yields only one state X of the superposed states > Measurement also makes X the new state and so interferes

with computational processes> X is determined with some probability ≤ 1, implying

uncertainty in the result> States cannot be copied (“cloned”), implying that signal

fanout is not permitted> Environmental interference can cause a measurement-like

state collapse (decoherence)

Quantum Circuit Characteristics



Classical adder

cn–1

s0

s1

s2

s3

cn

a0

b0

a1

b1

a3

b3

a2

b2

Sum

Carry



Quantum adder


Outline



• Quantum Gates




Reversible Circuits

• Reversibility was studied around 1980 motivated by power minimization considerations

• Bennett, Toffoli et al. showed that any classical logic circuit C can be made reversible with modest overhead

……

n inputs

GenericBooleanCircuit

m outputs

f(i)i …

Reversible BooleanCircuit

…

f(i)

…

…

“Junk”i

“Junk”


• How to make a given f reversible> Suppose f :i f(i) has n inputs m outputs

> Introduce n extra outputs and m extra inputs

> Replace f by frev: i, j i, f(i) j where is XOR

• Example 1: f(a,b) = AND(a,b)

• This is the well-known Toffoli gate, which realizes AND when c = 0, and NAND when c = 1.

Reversible Circuits

ReversibleANDgate

a

b

f = ab c

a

b

c

a b c a b f0 0 0 0 0 00 0 1 0 0 10 1 0 0 1 00 1 1 0 1 11 0 0 1 0 01 0 1 1 0 11 1 0 1 1 11 1 1 1 1 0


• Reversible gate family [Toffoli 1980]

Reversible Circuits

(Toffoli gate)

• Every Boolean function has a reversible implementation using Toffoli gates.

• There is no universal reversible gate with fewer thanthree inputs


Outline



• Quantum Gates




Quantum Gates

• One-Input gate: NOT> Input state: c0 + c1

> Output state: c1 + c0

> Pure states are mapped thus: and > Gate operator (matrix) is

> As expected:0 1

1 0

0 1

1 0

1 0

0 1

NOT

NOTNOT

0 1

1 0

0

1

0

1

0

1


Quantum Gates

• One-Input gate: “Square root of NOT”> Some matrix elements are imaginary

> Gate operator (matrix):

> We find:

so with probability |i/√2|2 = 1/2

and with probability |1/√2|2 = 1/2

Similarly, this gate randomizes input

> But concatenation of two gates eliminates the randomness!

i / 1/ 2 1/ 1/ 2

1/ 1/ 2 i / 1/ 2

1

2

i 1

1 i

1

2

i 1

1 i

1

0

1

2

i

1

1

2

i 1

1 i

i 1

1 i

0 i

i 0

NOTNOT


Quantum Gates

• One-Input gate: Hadamard

> Maps 1/√2 + 1/√2 and 1/√2 – 1/√2 . Ignoring the normalization factor 1/√2, we can write xx (-1)xx xx – ––xx

• One-Input gate: Phase shift

1

2

1 1

1 1

H

1 0

0 e i


Universal One-Input Gate Sets• Requirement:

• Hadamard and phase-shift gates form a universal gate set

• Example: The following circuit generates = cos 0 + ei sin 1 up to a global factor

Quantum Gates

U Any state

2H H2


• Two-Input Gate: Controlled NOT (CNOT)

Quantum Gates

x

y

x

x y CNOT

1 0 0 0

0 1 0 0

0 0 0 1

0 0 1 0

> CNOT maps x xxand x xNOT x x xx looks like cloning, but it’s not. These

mappings are valid only for the pure states and > Serves as a “non-demolition” measurement gate

x

y

x

x y


• 3-Input gate: Controlled CNOT (C2NOT or Toffoli gate)

Quantum Gates

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0

0 0 0 1 0 0 0 0

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0

0 0 0 0 0 0 0 1

0 0 0 0 0 0 1 0

b

c

b

ab c

a a


• General controlled gates that control some 1-qubit unitary operation U are useful

Quantum Gates

U

u00 u01

u10 u11

C(U)

U

C2(U)

U

U

etc.


Universal Gate Sets

• To implement any unitary operation on n qubits exactly requires an infinite number of gate types

• The (infinite) set of all 2-input gates is universal

> Any n-qubit unitary operation can be implemented using (n34n) gates [Reck et al. 1994]

• CNOT and the (infinite) set of all 1-qubit gates is universal

Quantum Gates


Discrete Universal Gate Sets• The error on implementing U by V is defined as

• If U can be implemented by K gates, we can simulate U with a total error less than with a gate overhead that is polynomial in log(K/)

• A discrete set of gate types G is universal, if we can approximate any U to within any > 0 using a sequence of gates from G

Quantum Gates

E(U,V ) max

(U V )


Discrete Universal Gate Set• Example 1: Four-member “standard” gate set

Quantum Gates

1 0 0 0

0 1 0 0

0 0 0 1

0 0 1 0

1

2

1 1

1 1

H

1 0

0 i

S /8

1 0

0 e i / 4

CNOT Hadamard Phase /8 (T) gate

• Example 2: {CNOT, Hadamard, Phase, Toffoli}


Outline



• Quantum Gates




• A quantum (combinational) circuit is a sequence of quantum gates, linked by “wires”

• The circuit has fixed “width” corresponding to the number of qubits being processed

• Logic design (classical and quantum) attempts to find circuit structures for needed operations that are> Functionally correct

> Independent of physical technology

> Low-cost, e.g., use the minimum number of qubits or gates

• Quantum logic design is not well developed!

Quantum Circuits


• Ad hoc designs known for many specific functions and gates• Example 1 illustrating a theorem by [Barenco et al. 1995]: Any C2(U) gate can be

built from CNOTs, C(V), and C(V†) gates, where V2 = U

Quantum Circuits

V V† V

=

U


Example 1: Simulation

Quantum Circuits

|0

|1

|x

|0

|1

|x

|0

|1

|xV V† V

=

U

|0

|1

V|x

|0

|1

|0

|1

|x

|0

|1

|0

|1

|x

?


Quantum Circuits

|1

|1

|x

|1

|1

|x

|1

|1

U|xV V† V

=

U

|1

|1

V|x

|1

|0

|1

|0

V|x

|1

|1

|1

|1

U|x

Example 1: Simulation (contd.)

?

• Exercise: Simulate the two remaining cases


Quantum Circuits

Example 1: Algebraic analysis

U4U2 U3U1 U5U0

V V† V

=

U

?x1

x2

x3

• Is U0(x1, x2, x3) = U5U4U3U2U1(x1, x2, x3)

= (x1, x2, x1x2 U (x3) ) ?


Quantum Circuits

Example 1 (contd);

U1 I1 C(V)

1 0

0 1

1 0 0 0

0 1 0 0

0 0 v00 v01

0 0 v10 v11

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 v00 v01 0 0 0 0

0 0 v10 v11 0 0 0 0

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0

0 0 0 0 0 0 v00 v01

0 0 0 0 0 0 v10 v11


Quantum Circuits

Example 1 (contd);

U2 U4 CNOT(x1, x2 ) I1

1 0 0 0

0 1 0 0

0 0 0 1

0 0 1 0

1 0

0 1

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0

0 0 0 1 0 0 0 0

0 0 0 0 0 0 1 0

0 0 0 0 0 0 0 1

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0


Quantum Circuits

Example 1 (contd);> U5 is the same as U1 but has x1and x2 permuted (tricky!)> It remains to evaluate the product of five 8 x 8 matrices

U5U4U3U2U1 using the fact that VV† = I and VV = U

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0

0 0 0 1 0 0 0 0

0 0 0 0 v00 v01 0 0

0 0 0 0 v10 v11 0 0

0 0 0 0 0 0 v00 v01

0 0 0 0 0 0 v10 v11

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0

0 0 0 1 0 0 0 0

0 0 0 0 0 0 1 0

0 0 0 0 0 0 0 1

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 v00 v10 0 0 0 0

0 0 v01 v11 0 0 0 0

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0

0 0 0 0 0 0 v00 v10

0 0 0 0 0 0 v01 v11

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0

0 0 0 1 0 0 0 0

0 0 0 0 0 0 1 0

0 0 0 0 0 0 0 1

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 v00 v01 0 0 0 0

0 0 v10 v11 0 0 0 0

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0

0 0 0 0 0 0 v00 v01

0 0 0 0 0 0 v10 v11

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0

0 0 0 1 0 0 0 0

0 0 0 0 1 0 0 0

0 0 0 0 0 1 0 0

0 0 0 0 0 0 v00v00 v10v10 v00v01 v10v11

0 0 0 0 0 0 v 01̀ v00 v11v10 v01v01 v11v11

U0


Quantum Circuits

• Implementing a Half Adder> Problem: Implement the classical functions sum = x1 x0 and carry = x1x0

• Generic design:

|x1

Uadd|x0|y1|y0

|x1|x0|y1 carry|y0 sum


Quantum Circuits

• Half Adder: Generic design (contd.)

UADD

1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0

0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0

0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0

0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0

0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0


Quantum Circuits

• Half Adder: Specific (reduced) design

|x1

|x0

|y

|x1

|y carry

sum C2NOT (Toffoli)

CNOT


Quantum Circuits

Implementing Deutsch’s Algorithm• Problem: Determine whether a given Boolean function f(x) is

constant, i.e. f(0) = f(1), or balanced, i.e. f(0) ≠ f(1). • Classical algorithms require two evaluations of f. • This algorithm uses just one quantum evaluation by, in effect,

computing f(0) and f(1) simultaneously

• The Circuit:

MH

H

H

y f(x)y

x xUf


Quantum Circuits

M

y f(x)y

x x

Uf

|0

|1|0 |1 |2 |3

1 0 1

2

0 1

2

2 1 f (0) 0 1 f (1) 1

2

0 1

2

0 1

2

0 1

2

0 12

0 12

H

H

H

3 0 0 1

2

1 0 12

if f(0) = f(1) if f(0) ≠ f(1)

if f(0) = f(1) if f(0) ≠ f(1)

0 0 1


Quantum Circuits

Deutsch-Josza Algorithm

• Generalization of Deutsch’s algorithm

Hn = H H … H

Hn x 1

z xzz

2n

3 1 x z f (x ) z

2nx

z

0 1

2

H

Hn

y f(x)y

x xUf

Hnn|0

|1|0 |3


Quantum Circuits

Deutsch-Josza Algorithm (contd)

• This algorithm distinguishes constant from balanced functions in one evaluation of f, versus 2n–1 + 1 evaluations for classical deterministic algorithms

• Balanced functions have many interesting and some useful properties> K. Chakrabarty and J.P. Hayes, “Balanced Boolean functions,” IEE

Proc: Digital Techniques, vol. 145, pp 52 - 62, Jan. 1998.


Quantum Circuits

Quantum Fourier Transform Circuit

y 1

2n / 2 ei22 n

yx

x x


Quantum Circuits

Quantum Error-Correction Circuit• Problem: State | = a|0 + b |1 is degraded by noise

• Solution Encode in a suitable EC code such as the 5-bit code:|0 = |00000 + |11000 + |01100 + |00110 + |00011 + |10001

– |10100 – |01010 – |00000 – |10010 – |01001 – |11110 – |01111 – |10111 – |11011 – |11101

|1 = |11111 + |00111 + |10011 + …


Outline



• Quantum Gates




Physical Implementation

Quantum Technology Requirements [Di Vicenzo ‘01]

• Scalable with well-characterized qubits

• Initializable to a pure state such as 00…0• Relatively long decoherence time

• “Universal” set of quantum gates

• Qubit-specific measurement capability

and

• Ability to faithfully communicate qubits


Physical Implementation

Main Contenders• NMR (nuclear magnetic resonance)• Ion traps• Optical lattices• Quantum dots• Electrons on liquid helium

etc.Main Deficiency• Poor scalability


Physical Implementation: NMR

• Many atoms have a nucleus with quantum “spin” like a tiny bar magnet. Spin up/down = 0/1.

• Several atoms’ spins can be coupled chemically in a molecule but remain selectively addressable due to different resonant frequencies

• An RF pulse can rotate an atom’s spin in a manner proportional to the amplitude and duration of the applied pulse

• A computation such as a gate/circuit operation consists of a sequence of carefully sized and separated RF pulses

• Many molecules (e..g, 1018)can be combined in liquid solution to form a same-state ensemble of macroscopic and manageable size

• All of Di Vicenzo’s criteria can be met, except that scalability seems to be limited to 20–30 qubits?

0

1



• Five-qubit NMR computer [Steffen et al. 2001]



• Five-qubit computer (contd.)> Molecule with 5 flourine atoms

whose spins implement the qubits

> Experimental 5-qubit circuit to find the order of a permutation


Summary

• Quantum circuits can implement several important algorithms with fewer operations than any classical algorithm

• A few generic quantum gate and circuit types have been identified and their properties studied

• Small quantum circuits have been successfully demonstrated in the lab using several physical technologies, notably NMR

• Current technologies are slow, fragile, and appear to be limited to tens of qubits and hundreds of gates

• Huge gaps remain in our understanding of quantum circuit design and implementation techniques

advanced computer architecture laboratory eecs 598-1 fall 2001 quantum logic circuits john p. hayes...

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