ads127l01 evaluation module user's guide (rev. b) · the ads127l01evm is an evaluation module...

1SBAU261B–May 2016–Revised April 2017Submit Documentation Feedback

Copyright © 2016–2017, Texas Instruments Incorporated

ADS127L01EVM

Microsoft, Windows are registered trademarks of Microsoft Corporation.All other trademarks are the property of their respective owners.

User's GuideSBAU261B–May 2016–Revised April 2017

ADS127L01EVM

Figure 1. ADS127L01EVM

The ADS127L01EVM is an evaluation module that provides hardware and software support for evaluationof the ADS127L01 delta-sigma ADC. The EVM utilizes the TM4C1294NCPDT processor to communicatewith the ADC via SPI and provide communication with a PC over USB interface. The EVM also includes asoftware application that runs on a PC to allow for register manipulation and data collection from the ADC.

Table 1. Related Documentation

Device Literature NumberADS127L01 SBAS607

http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SBAU261B

http://www.ti.com/product/TM4C1294NCPDT

http://www.ti.com/product/ads127l01

http://www.ti.com/lit/pdf/sbas607

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ADS127L01EVM

Contents1 EVM Overview ............................................................................................................... 3

1.1 Description........................................................................................................... 31.2 Requirements ....................................................................................................... 31.3 Software Reference ................................................................................................ 31.4 Supported Functionality ............................................................................................ 3

2 Quick Start .................................................................................................................... 52.1 Default Jumper and Switch Configuration ....................................................................... 52.2 Power Connection .................................................................................................. 62.3 Startup................................................................................................................ 6

3 Hardware Reference ........................................................................................................ 73.1 Jumper and Switch Configuration Reference ................................................................... 73.2 Headers, Connectors, and Test Points .......................................................................... 8

4 ADS127L01EVM Software ................................................................................................ 104.1 Installing the Software ............................................................................................ 104.2 Connecting to the EVM Hardware .............................................................................. 114.3 Using the Software With the ADS127L01EVM ................................................................ 12

5 ADS127L01EVM Hardware ............................................................................................... 155.1 Analog Inputs ...................................................................................................... 155.2 Hardware Mode Pins ............................................................................................. 165.3 ADC Reference .................................................................................................... 175.4 Power-Down Mode................................................................................................ 175.5 Digital Inputs ....................................................................................................... 175.6 Clock Inputs ........................................................................................................ 18

6 Power Supply Connections ............................................................................................... 196.1 Powering the EVM ................................................................................................ 196.2 ADC Power Supplies ............................................................................................. 19

7 ADS127L01EVM Bill of Materials, PCB Layout, and Schematic..................................................... 207.1 Bill of Materials .................................................................................................... 207.2 PCB Layout ........................................................................................................ 267.3 Schematic .......................................................................................................... 30

List of Figures

1 ADS127L01EVM ............................................................................................................. 12 ADS127L01EVM Default Jumper and Switch Configuration........................................................... 53 Delta-Sigma ADC EvaluaTIon Software Installation Instructions .................................................... 104 ADS127L01 Device Package Installation Instructions ................................................................ 115 ADS127L01 Device Tab and Register Map ............................................................................ 126 Register Controls for the ADS127L01 ................................................................................... 137 Hardware Controls for the ADS127L01 Mode Pins.................................................................... 138 Analog Input Connections (Schematic) ................................................................................. 159 Analog Input Connections (PCB)......................................................................................... 1510 Modifications to Bypass Driver Stage ................................................................................... 1511 Hardware Mode Input Controls (Schematic)............................................................................ 1612 Hardware Mode Input Controls (PCB)................................................................................... 1613 Reference Input Selection................................................................................................. 1714 Debug Header for Logic Analyzer (Schematic) ........................................................................ 1715 Debug Header for Logic Analyzer (PCB) ............................................................................... 1716 Clock Tree (Schematic) ................................................................................................... 1817 Clock Tree (PCB) .......................................................................................................... 1818 Top Silkscreen.............................................................................................................. 2619 Top Layer (Positive) ....................................................................................................... 26

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ADS127L01EVM

20 Ground (Negative) ......................................................................................................... 2721 Power (Negative)........................................................................................................... 2722 Bottom Layer (Positive).................................................................................................... 2823 Bottom Silkscreen .......................................................................................................... 2824 Bottom Silkscreen (Mirrored) ............................................................................................. 2925 TM4C Main Schematic .................................................................................................... 3026 TM4C Miscellaneous and Power Schematic ........................................................................... 3127 ADS127L01EVM Digital Header Schematic ............................................................................ 3228 ADS127L01EVM USB Power Schematic ............................................................................... 3329 ADS127L01EVM External Power Schematic........................................................................... 3430 ADS127L01EVM Clock Tree Schematic ................................................................................ 3531 ADS127L01EVM ADC Main Schematic................................................................................. 3632 ADS127L01EVM ADC Input Driver Schematic......................................................................... 3733 ADS127L01EVM ADC Reference Schematic .......................................................................... 3834 ADS127L01EVM ADC Power Schematic ............................................................................... 39

1 EVM Overview

1.1 DescriptionThis user guide describes the operation and use of the ADS127L01 evaluation module (ADS127L01EVM).The ADS127L01 is a 24-Bit, high-speed, wide-bandwidth delta-sigma analog-to-digital converter (ADC) forprecision industrial applications. This platform is intended for evaluating the ADS127L01 performance andfunctionality. The ADS127L01EVM kit includes the ADS127L01EVM, USB mini cable, and supportingsoftware (SW).

This document includes a detailed description of the hardware (HW) and software, bill of materials, andschematic for the ADS127L01EVM.

Throughout this document, the terms ADS127L01EVM, demonstration kit, evaluation module, and EVMare synonymous with the ADS127L01EVM. Also, the term GUI is synonymous with Delta-Sigma ADCEvaluaTIon Software, core application, and EVM software, and Tiva is synonymous with theTM4C1294NCPDT.

1.2 Requirements

1.2.1 Software RequirementsPC with Microsoft® Windows® 7 or higher operating system.

1.2.2 Hardware RequirementsPC with available USB connection.

1.3 Software ReferenceSee the Delta-Sigma ADC EvaluaTIon Software User Manual (SBAU260) for the core softwaredocumentation or navigate to File -> About from within the GUI.

1.4 Supported Functionality

1.4.1 Supported Hardware Functionality• Unipolar 3-V analog supply (AVDD)• Unipolar 1.8-V and 3.3-V digital supply (DVDD)• External LVDD supply

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ADS127L01EVM

• Fully-differential or single-ended input driver• Hardware control over device mode pins:

– High-resolution (HR), low-power (LP), and very-low-power (VLP) mode– All OSR [1:0] and FILTER[1:0] settings

• SPI and frame-sync interface (frame-sync mode requires external processor)• Digital header for debug or connection to external processor• On-board ADC clock options (CLK): 16 MHz, 8 MHz, 4 MHz• On-board or external ADC reference voltage (REFN always shorted to GND)• Power-down mode

1.4.2 Supported Software Functionality• Software control over device mode pins:

– High-resolution (HR), low-power (LP), and very-low-power (VLP) mode– All OSR [1:0] and FILTER[1:0] settings

• SPI mode only• SPI serial interface commands:

– RESET– START– STOP– RDATA– RREG– WREG

• Does not support:– Frame-sync master mode or frame-sync slave mode– STATUS word readback

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ADS127L01EVM

2 Quick StartThis section provides a guide to quickly begin using the EVM.

2.1 Default Jumper and Switch ConfigurationThe EVM should come configured with the settings listed in Table 2 and illustrated in Figure 2.

(1) Ignored when FORMAT = 0

Table 2. Default Settings

Jumper Default Position CommentJP1 Uninstalled Use on-board processorJP2 Uninstalled USB-derived supplies enabledJP3 1-2 AVDD and DVDD derived from regulated USB supplyJP4 N/A Not populatedJP5 Uninstalled Enable on-board crystal oscillator (Y1)JP6 1-2 CLK = 16 MHzJP7 Uninstalled ADS127L01 powered-onJP8 1-2 REXT = 60.4 kΩJP9 Installed Internal LDO used for LVDD supplyJP10 Uninstalled Input amplifier enabled (U30)JP11 1-2 DVDD = 1.8 V

Switch Default Position CommentS1 Open GPIO input pulled highS2 Open Tiva RST pulled highS3 HR = 1

FORMAT = 0OSR [1:0] = 00FSMODE = 0 (1)

FILTER [1:0] = 01

High-resolution modeSPI modeOSR = 32Frame-sync slave mode (1)

Wideband 2 filter (transition: 0.4 FDATA to 0.5 FDATA)

Figure 2. ADS127L01EVM Default Jumper and Switch Configuration

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ADS127L01EVM

2.2 Power ConnectionThe EVM is powered via the USB interface with the PC. Connect the EVM to an available USB port topower the board.

2.3 StartupUse the following steps at startup:1. Install the core application onto your PC.2. Install the ADS127L01 device package onto your PC.3. Ensure all jumpers and switches are configured in the default configuration per Table 2 and Figure 2.4. Connect the EVM to your PC using a USB cable.5. If prompted, install any required drivers.6. Start the software on your PC.

NOTE: The EVM has powered on correctly if D4 turns on.

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ADS127L01EVM

3 Hardware Reference

3.1 Jumper and Switch Configuration ReferenceTable 3 provides all jumper and switch configuration settings for the EVM.

Table 3. Hardware Item Descriptions

Jumper Position DescriptionJP1 Select on-board vs. external controller (U1 RST)

Installed Hold on-board Tiva in reset and disable level shifters to allow external digital interfaceUninstalled Normal operation with on-board Tiva

JP2 Enable USB-derived power supplies (U11 EN)Installed USB-derived power supplies disabledUninstalled USB-derived power supplies enabled

JP3 Select 5-V supply to derive AVDD_5V and DVDD_3.3V1-2 AVDD_5V and DVDD_3.3V derived from regulated USB supply (U12)2-3 Not used

JP4 Power-down external supplies (U16 EN)Installed External supplies disabledUninstalled External supplies enabled

JP5 Disable on-board crystal oscillator Y1 (CLKEN)Installed Y1 output is disabledUninstalled Y1 output is enabled

JP6 Select ADS127L01 CLK frequency (CLKSEL)1-2 16 MHz3-4 8 MHz5-6 4 MHz

JP7 Place ADS127L01 in Power-Down Mode (RESET/PWDN)Installed ADS127L01 held in Power-Down ModeUninstalled Normal operation

JP8 Select REXT pull-down resistor (U26 REXT)1-2 60.4 kΩ (HR and LP Mode)2-3 120 kΩ (VLP Mode)

JP9 Select source for ADS127L01 LVDD supply (U26 INTLDO)Installed Internal LDO enabled (LVDD sourced from AVDD)Uninstalled Internal LDO disabled (LVDD sourced from external supply connected to TP17)

JP10 Power-down input driver amplifier (U26 PD)Installed Amplifier held in power-downUninstalled Normal operation

JP11 Select DVDD supply for ADS127L01 (U26 DVDD)1-2 DVDD = 1.8 V2-3 DVDD = 3.3 V

Switch Position DescriptionS1 BSL Mode for Device Firmware Update (DFU)

Closed (on RESET) Total Tiva FLASH erasure (Tiva enumerates as a DFU device on release)Open (on RESET) Normal operation

S2 Reset on-board Tiva controller (U1 RST)Closed Tiva held in RESETOpen Normal operation

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ADS127L01EVM

Table 3. Hardware Item Descriptions (continued)Switch Position DescriptionS3 Hardware Mode inputs

Open Logic ‘1’Closed Logic ‘0’

3.2 Headers, Connectors, and Test PointsThis section provides details for all of the headers, connectors, and test points on the EVM.

3.2.1 JTAG Header (not installed)The J2 header is provided for programming the on-board processor with firmware updates or userfirmware. Exercise care when using the JTAG since it is possible to erase the EVM firmware and losecommunication with the EVM software. Table 4 describes the J2 header functions.

Table 4. JTAG Header, J2

Function Signal Name PinProcessor RESET Signal RESET 1JTAG test data out signal TDO 2JTAG test data in signal TDI 3JTAG test mode select signal TMS 4JTAG test clock signal TCK 5Debug UART receive signal RX 6Debug UART transmit signal TX 7

3.2.2 Analog InputsAnalog input signals can be connected through the SMA connectors (J7 and J9) or through the terminalblock (J8). Table 5 lists the analog input connections.

Table 5. Analog Inputs, J7–J9

Function SMA Connector Terminal BlockAnalog input to AINN J7 J8[1]Analog input to AINP J9 J8[2]

3.2.3 Test PointsThe test points listed in Table 6 may be used to probe on-board voltage supplies or to connect externalvoltage supplies. See the ADS127L01EVM Hardware section for any required hardware modificationswhen connecting an external supply.

Table 6. Test Points, TP17 – TP24

Function Signal Name Test Point Input RestrictionsADC Modulator Supply LVDD TP17 1.7 V ≤ LVDD ≤ 1.9 VInput Common-Mode Voltage VOCM TP18 0.55 V ≤ VOCM ≤ 1.8 VADC Reference Voltage REFP TP19 0.5 V ≤ VREF ≤ 3.0 VADC Analog Supply AVDD TP20 2.7 V ≤ AVDD ≤ 3.6 VADC Digital Supply DVDD TP21 1.7 V ≤ DVDD ≤ 3.6 VSystem Ground GND TP6-10, TP22-24 Connect to external source ground

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ADS127L01EVM

3.2.4 Digital Interface HeaderTable 7 lists the functions and pin numbers for all signals used on the digital interface header.

(1) Odd numbered pins not included are connected to Tiva inputs whose functionality is not used for this EVM. See Figure 27 for connectiondetails.

(2) Even numbered pins not included are not connected to the ADS127L01.

Table 7. Digital Interface Header, J3

Function Processor Side ADC SideSignal Name Pin Number (1) Pin Number (2) Signal Name

GPIO Inputs for ADCHardware Mode Pins

I2C0_SDA 1 2 FILTER1I2C0_SCL 3 4 FILTER0TIVA_16MHz_LT 5 6 TIVA_16MHzGPIO_4 7 8 FSMODEGPIO_3 9 10 OSR1GPIO_2 11 12 OSR0GPIO_1 13 14 FORMATGPIO_0 15 16 HR

IOVDD Supply for LevelTranslator (U5)

DIG_VOLT2 17 18 DVDD

GPIO I2C1_SDA 19 20 DRDYSPI Port SPI1_MISO/DATA1 27 28 MISO

SPI1_MOSI/DATA0 29 30 MOSISPI1_FS 31 32 CSSPI1_SCLK 33 34 SCLK

IOVDD Supply for LevelTranslator (U7)

DIG_VOLT3 35 36 DVDD

3.2.5 Debug HeaderThe debug header (J6) information is presented in Table 8.

(1) Pins 2 – 10 (even) are tied to GND.

Table 8. Debug Header, J6

Function Signal Name Pin Number (1)

Digital Signals for Logic Analyzer or External Processor CS 1SCLK 3DIN 5

DOUT 7DRDY 9

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ADS127L01EVM

4 ADS127L01EVM Software

4.1 Installing the Software

4.1.1 Delta-Sigma ADC EvaluaTIon SoftwareDownload the Delta-Sigma EvaluaTIon Software installer from the ADS127L01EVM tool page and save toa known folder. Run the installer and follow the on-screen prompts. Note that future software versions mayshow slightly different screens.

Figure 3. Delta-Sigma ADC EvaluaTIon Software Installation Instructions

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ADS127L01EVM

4.1.2 ADS127L01 Device PackageDownload the ADS127L01 Device Package installer from the ADS127L01EVM tool page and save to aknown folder. Run the installer and follow the on-screen prompts. Note that future software versions mayshow slightly different screens.

Figure 4. ADS127L01 Device Package Installation Instructions

4.2 Connecting to the EVM HardwareAfter the Delta-Sigma ADC EvaluaTIon Software and the ADS127L01 Device Package are installed,ensure that all jumpers and switches are in their default positions per Table 2, and then connect thehardware with the provided USB mini cable. Start the Delta-Sigma ADC EvaluaTIon Software. The GUIautomatically detects the connected hardware and displays the device register map under the Main tab asshown in Figure 5.

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ADS127L01EVM

4.3 Using the Software With the ADS127L01EVMThis section covers the functionality of the ADS127L01 device package only. For more information aboutthe core application, see the Delta-Sigma ADC EvaluaTIon Software User Manual (SBAU260) for the coresoftware documentation or navigate to File -> Options from within the GUI.

Upon startup, the GUI scans for the connected hardware. Once the ADS127L01EVM is plugged in, thewelcome screen will refresh to show the ADS127L01 Register Map under the main Device tab as shownin Figure 5. The Device tab also grants user control over register settings with read/write access (R/W) aswell as the ADS127L01 hardware mode pins. Click the Refresh/Sync button to read back the current valuein all registers and update the register map. Selecting a single register will provide a detailed descriptionfor the current values in the Register Decode Information panel below the register map (see lower half ofFigure 5).

Figure 5. ADS127L01 Device Tab and Register Map

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ADS127L01EVM

4.3.1 Register ControlsIn the Register Control section are drop-down menu options that can be used to configure the ADS127L01registers with R/W access. These menus correspond to each configurable bit or group of bits in thatregister and are highlighted upon selection. In this way, the bit segments of the register can be identifiedfor the menu items affecting the changes. It should be noted that some of the register contents cannot bechanged, such as the ID register. Figure 6 shows an example of the CONFIG register control menus.

Figure 6. Register Controls for the ADS127L01

4.3.2 Hardware ControlsThe EVM software provides an alternate way to configure the ADS127L01 hardware mode pins whenS3[1] is open (that is, in the '1' position). These controls can be found underneath the Register Controls onthe Device tab. Only the SPI interface is supported with the EVM software, so FORMAT and FSMODEhave been omitted from the Hardware Mode Controls and are held low by Tiva GPIO pins. HR, OSR[1:0],and FILTER[1:0] can be configured using the drop-down menus as shown in Figure 7.

Figure 7. Hardware Controls for the ADS127L01 Mode Pins

4.3.3 Data CollectionData is collected by clicking the Data Analysis button from the ribbon menu or by entering the COLLECT<n> command in the entry field under the Console tab. The Analysis Engine launches in a separatewindow and can be used to collect, analyze, and save data from the EVM. For more information about theAnalysis Engine, see the Delta-Sigma ADC EvaluaTIon Software User Manual (SBAU260).

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ADS127L01EVM

4.3.4 SPI CommandsThe ADS127L01EVM commands listed in Table 9 are one of three types:• Basic GUI Commands: commands used by the Delta-Sigma ADC EvaluaTIon Software• Device Firmware Commands: SPI opcodes recognized by the ADS127L01• EVM Firmware Commands: commands created specifically for use with the ADS127L01EVM

All commands are available for use within the Scripts and the Console tabs. For more information aboutusing scripts, see the Delta-Sigma ADC EvaluaTIon Software User Manual (SBAU260).

(1) START and STOP commands are only used when the START pin is tied low. See Figure 31 before modifying the EVMhardware.

(2) SCLK is configured for 200 kHz when this command is invoked through the EVM software. Configure the data rate (fDATA ) to beless than 14.4 kSPS when CS_ENB = 0 or less than 11.2kSPS when CS_ENB = 1.

Table 9. ADS127L01EVM Software Commands

Command Name Command Syntax Argument Details DescriptionBasic GUI CommandsID ID Send EVM identificationREGMAP REGMAP Return the current contents of the ADC register

mapCOLLECT COLLECT <n> n: 0 to 64,000 Collect n samplesCOLLECTSTOP COLLECTSTOP Stop data collection in progressCOMMANDLIST COMMANDLIST Return the complete list of available commandsDevice Firmware CommandsRESET RESET Reset the device to power-on valuesSTART (1) START Start/restart (synchronize) conversionsSTOP (1) STOP Stop conversionsRDATA (2) RDATA Read data by commandRREG RREG <rr> <nn> rr: 00h to 07h Read (nn + 1) registers starting at address rr

nn: 00h to 07hWREG WREG <rr> <nn> <value

0> ... <value nn>rr: 00h to 07h Write (nn + 1) registers starting at address rrnn: 00h to 07hvalue: 00h to FFh

EVM Firmware CommandsHR HR <x> value: 0b, 1b Configure the High-Resolution Setting where x

corresponds to the HR pinOSR OSR <xx> value: 00b, 01b, 10b,

11bConfigure the OSR Setting where xx correspondsto the OSR[1:0] pins

FILTER FILTER <xx> value: 00b, 01b, 10b Configure the Filter Setting where xx correspondsto the FILTER[1:0] pins

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10.0

R77

10.0

R82AINP

AINN

0.022 µF

C90

TB20

R83

0

R73TB1

Install Uninstall

R73, R83 R74, R77, R79,

R82

Modifications to Bypass Driver Stage

Option to bypass

drivers:

100pF

C91

GND

Copyright © 2017, Texas Instruments Incorporated


AINN

AINP

GND

GND

J8

TB2

TB1

1

2 3 4 5

J9 AINP

1

2 3 4 5

J7 AINN

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ADS127L01EVM

5 ADS127L01EVM Hardware

5.1 Analog InputsAnalog input signals can be connected through the SMA connectors (J7 and J9) or through the terminalblock (J8).

By default, the EVM is configured for a fully-differential analog input signal. To configure the input driveramplifier (U30) for a signal-ended input, J7 and J8[1] can be tied to GND by installing R72. Use either J9or J8[2] to connect a single-ended analog input.

The default input driver circuit uses the THS4541, fully-differential amplifier in a unity-gain configurationwith a single-pole R-C filter at the output. Multiple passive components around the amplifier areintentionally left uninstalled to give users the flexibility to customize the input drive circuit for their specificapplication. In addition, the table shown in Figure 32 lists alternative driver amplifiers with variousbandwidth, noise, and power specifications that can also be used to drive the ADS127L01 depending onthe performance criteria of an application.

Figure 8. Analog Input Connections (Schematic) Figure 9. Analog Input Connections (PCB)

The on-board input driver may be bypassed to evaluate other driver solutions or to test the ADCperformance directly. To bypass U30, uninstall R74, R77, R79, and R82. Install R73 and R83 with 0-Ωresistors. J7 and J8[1] will connect directly to AINN, and J9 and J8[2] will connect directly to AINP on theADS127L01. Ensure that the analog inputs are within the input voltage limits of the ADS127L01.

Figure 10. Modifications to Bypass Driver Stage

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1OE1

1A12

2B43

1A24

2B35

1A36

2B27

1A48

2B19

GND10

2A111

1B412

2A213

1B314

2A315

1B216

2A417

1B118

2OE19

VCC20

U28

SN74CBT3244PW

GND

1OE1

1A12

2B43

1A24

2B35

1A36

2B27

1A48

2B19

GND10

2A111

1B412

2A213

1B314

2A315

1B216

2A417

1B118

2OE19

VCC20

U27

SN74CBT3244PW

GND

NC

1

2

3

4

5

U29

AVDD_5V

AVDD_5V

AVDD_5V 1 2 3 4 5 6

13

14

15

16

7

12

89

10

11

S3

GND

DVDD

HR

FORMAT

FILTER1

OSR1

FSMODE

FILTER0

OSR0

Hardware Mode Inputs

HWEN Input Control

0 Hardware (S3)

EVM Software1

Mode Input Selection

FORMAT

100k

1 2 3 4 5 6 7 89

10

11

12

13

14

15

16

R69

HR

GND

GND

GND

HWEN

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ADS127L01EVM

U31 provides an option to buffer an input signal from a source with an unknown output impedance.Components are suggested on the EVM schematic but are not installed by default. In addition, U31requires bipolar supplies, which can be generated on-board with additional components (seeSection 6.1.2).

5.2 Hardware Mode PinsThe ADS127L01 uses hardware mode pins to select the operating mode, interface mode, digital filterresponse, and oversampling ratio (OSR). These mode selections are reflected in register 07h. The registerbit settings are controlled by externally pulling the respective pins to a logic high or low level.

S3[1] must be closed (that is, in the '0' position) to configure the hardware mode pins with the EVMhardware. Each hardware mode pin is tied to DVDD through a switch on S3 and a 100-kΩ, pull-up resistor(R69). Placing the switches on S3 in the '1' position will pull up the respective mode pins to DVDD.Placing the switches in the '0' position will pull down the respective mode pins to GND. FORMAT mustalways be low to use the EVM with the provided software.

Figure 11. Hardware Mode Input Controls (Schematic)

Figure 12. Hardware Mode Input Controls (PCB)

Placing S3[1] in the '1' position allows the EVM software to set the hardware mode pins. Only the HR,OSR[1:0], and FILTER[1:0] pins can be controlled using the provided EVM software. FORMAT andFSMODE will be held low by Tiva GPIOs.

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Logic Analyzer Debug Header

GND

DRDY

MISO

MOSI

CS

SCLK

1 2

3 4

5 6

7 8

9 10

J6

DEBUG


REFP

0R90

Source Install

REF6025 R90

REF5025+OPA320

Reference Selection

Uninstall

R92

External (TP19) R90, R92

R92 R90

R91

TP19REFP

0R91

0R92


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ADS127L01EVM

5.3 ADC ReferenceThe reference voltage on the ADS127L01 is the voltage difference between REFP and REFN. REFN istied directly to GND on the EVM.

The default reference driver on the EVM is the REF6025. This driver provides a precision 2.5-V referencevoltage and includes an integrated buffer to drive the ADS127L01 reference inputs directly. The output ofthe REF6025 is connected to REFP through R90.

A footprint for an alternate reference driver is located on the bottom of the EVM. Suggested componentsare shown in the EVM schematic, including the REF5025 and the OPA320 (see Figure 33). Beforepopulating this alternate reference driver circuit, be sure to uninstall R90 and install R92 with a 0-Ωresistor.

The reference voltage (REFP) may be probed at TP19. TP19 may also be used to connect an externalreference voltage source to the ADS127L01; however, both R90 and R92 must be uninstalled.Performance may not be optimal when connecting a reference voltage in this manner. Ensure that theexternal reference voltage is within the limits provided in Table 6.

Figure 13. Reference Input Selection

5.4 Power-Down ModeThe ADS127L01 can be placed in Power-Down Mode by installing JP7. When evaluating the device inPower-Down Mode, R59, R64, and R65 must be populated with 1-MΩ resistors.

5.5 Digital InputsAccess the digital signals of the device via the debug header (J6). This header allows for the connectionto a logic analyzer or to another processor when the Tiva microcontroller is not used. Each digital signal ispaired with a header pin connected to GND (pins 2-10, even), see Table 8.

Figure 14. Debug Header for Logic Analyzer (Schematic) Figure 15. Debug Header for Logic Analyzer (PCB)

The START pin on the ADS127L01 is tied to DVDD through a 100-kΩ pullup resistor (R67) by default. Thelow side of R67 can be soldered to a GND connection with a jumper wire to allow for external control ofthe ADS127L01 conversions via the START and STOP SPI commands.

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VDD4

STANDBY1

GND2

OUT3

16MHz

Y1

GND

DVDD_3.3V

GND

JP5100kR57

0.1µF

C68

GND

GND1

OE2

VDDO11

VDD3

CLK_EN4

CLK5

nCLK6

CLK_SEL7

LVCMOS_CLK8

GND9

Q310

Q212

GND13

VDDO15

Q114

Q016

U23

LMK00804BPW

GND

GND

GND

GND

JP6 Frequency (MHz)

16

8

ADS127L01 CLK Selection

[1-2]

[3-4]

4[5-6]

D1

CLK2

GND3

Q4

VCC5

U25

SN74AUP1G80DCKRGND

D1

CLK2

GND3

Q4

VCC5

U24

SN74AUP1G80DCKRGND

43.2

R56

ADC_8MHz

ADC_4MHz

ADC_16MHz

0.1µFC61

GND

DVDD_3.3V

DVDD_3.3V

43.2

R55 TIVA_16MHz

1 2

3 4

5 6

JP6

CLKSEL

ADC_16MHzADC_8MHzADC_4MHz

ADS127L01_DIGITAL.CLK

10µFC60

600 ohm

L4

DVDD

GND

0.1µFC64

1µFC63

0.1µF

C65

GND

VDDO

VDDO

VDDO

0.1µF

C67

GND

DVDD0.1µF

C66

GND

DVDD

10µFC62


ADS127L01EVM Hardware www.ti.com



ADS127L01EVM

5.6 Clock InputsThe on-board oscillator (Y1) provides a 16-MHz, low-jitter clock for the ADS127L01EVM. This clocksource is buffered and fanned out to both the ADS127L01 and the Tiva microprocessor. The EVMfirmware can only run with a 16-MHz input clock frequency for the Tiva microcontroller.

Two D flip-flops (U24 and U25) are cascaded to divide the buffered Y1 output into 8- and 4-MHzfrequencies that can be connected to the ADS127L01 CLK pin as shown in Figure 16. All on-board clockfrequencies are available on JP6 (see Table 3).

It is possible to connect an external clock source to JP6[1, 3, 5] for finer control over the ADS127L01 inputCLK frequency; however, note that any clock source which is not synchronous to Y1 will produceintermodulation harmonics. These harmonics may appear in the output data frequency spectrum anddegrade the system noise performance. When connecting an external microcontroller, it is recommendedto power-down Y1 by installing JP5 and provide a clock source which is synchronous to themicrocontroller.

Figure 16. Clock Tree (Schematic)

Figure 17. Clock Tree (PCB)

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ADS127L01EVM

6 Power Supply Connections

6.1 Powering the EVMThe EVM has two different power options: USB or external power.

6.1.1 USB PowerBy default, the EVM is configured to use the regulated USB power supply (USB_REG) to generate allother supplies. To power the EVM via the regulated USB supply, connect the EVM to a PC via the USBcable and set JP3 to the [1-2] position.

6.1.2 External PowerTo power the EVM from an external supply, connect 5 V to JP3[2]. Be sure to share the external supplyground with the EVM ground using one of the GND test points.

To generate the additional ±12-V, bipolar supplies for U31, install all components on the External Powerschematic page. Connect an external 5- to 12-V DC wall supply to J4 or J5 and uninstall JP4.

6.2 ADC Power SuppliesThe ADS127L01 supplies are provided by connections to AVDD, LVDD, and DVDD. The ADC is designedto be operated by unipolar analog and digital supplies only. This system uses a single ground plane suchthat AVSS = DGND.

6.2.1 Analog SuppliesOne TPS7A4901 (U35) is used to generate a 3-V analog supply from the AVDD_5V rail. This 3-V supplyis used to power the analog front-end circuitry (LDO_3V) and connects to AVDD through R98 (1 Ω).Measure the voltage across R98 or insert an ammeter in series to measure the AVDD supply current. Touse an external AVDD supply, uninstall R98 and connect the supply source to TP20. Ensure that theexternal AVDD supply is within the limits provided in Table 6. Also, be sure to share the external supplyground with the EVM ground using one of the GND test points.

When JP9 is installed, the LVDD supply is derived from AVDD using an internal LDO in the ADS127L01.To drive an external LVDD supply, uninstall JP9 and connect the external supply voltage to TP17. Ensurethat the external LVDD supply is within the limits provided in Table 6. Also, be sure to share the externalsupply ground with the EVM ground using one of the GND test points.

6.2.2 Digital SuppliesA second TPS7A4901 (U36) is used to generate a 1.8-V digital supply (DVDD_1.8V) from the DVDD_3.3Vrail. The ADC digital supply is selected by setting JP11 to either [1-2] = 1.8 V or [2-3] = 3.3 V. Measure thevoltage across R102 (1 Ω) or insert an ammeter in series to measure the DVDD supply current. To use anexternal DVDD supply, uninstall JP11 and connect the supply source to TP21. Ensure that the externalDVDD supply is within the limits provided in Table 6. Also, be sure to share the external supply groundwith the EVM ground using one of the GND test points.

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ADS127L01EVM Bill of Materials, PCB Layout, and Schematic www.ti.com



ADS127L01EVM

7 ADS127L01EVM Bill of Materials, PCB Layout, and Schematic

7.1 Bill of MaterialsTable 10 lists the EVM bill of materials.

(1) Unless otherwise noted in the Alternate Part Number or Alternate Manufacturer columns, all parts may be substituted with equivalents.

Table 10. ADS127L01 Bill of Materials (1)

Designator Qty Value Description PackageReference

Part Number Manufacturer Alternate Part Number AlternateManufacturer

!PCB1 1 Printed Circuit Board PA012 Any

C1, C14 2 2.2uF CAP, CERM, 2.2 µF, 16 V, +/- 10%, X7R, 0603 0603 GRM188Z71C225KE43 Murata

C2, C3, C4, C5, C6, C8, C9, C10,C11, C12, C13, C16, C17, C18, C19,C20, C21, C22, C27, C61, C64, C65,C66, C67, C68, C69, C71, C73, C80,C84

30 0.1uF CAP, CERM, 0.1 µF, 25 V, +/- 5%, X7R, 0603 0603 06033C104JAT2A AVX

C7, C25, C28, C60, C62, C70, C72,C74, C85, C96, C106, C107, C110,C111

14 10uF CAP, CERM, 10 µF, 25 V, +/- 20%, X5R, 0603 0603 GRM188R61E106MA73D Murata

C15, C30, C31, C33, C34, C63, C75,C77, C78, C81, C82, C97

12 1uF CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 0603 0603 UMK107AB7105KA-T Taiyo Yuden

C24 1 22uF CAP, CERM, 22 µF, 16 V, +/- 20%, X7R, 1210 1210 C3225X7R1C226M TDK

C26 1 100pF CAP, CERM, 100 pF, 25 V, +/- 10%, X7R, 0603 0603 06033C101KAT2A AVX

C29, C32, C35 3 1000pF CAP, CERM, 1000 pF, 100 V, +/- 5%, X7R, 0603 0603 06031C102JAT2A AVX

C76 1 10pF CAP, CERM, 10 pF, 100 V, +/- 5%, C0G/NP0, 0603 0603 GRM1885C2A100JA01D Murata

C83, C87 2 0.22uF CAP, CERM, 0.22 µF, 25 V, +/- 10%, X7R, 0603 0603 GRM188R71E224KA88D Murata

C90 1 0.022uF CAP, CERM, 0.022 µF, 50 V, +/- 5%, C0G/NP0, 0805 0805 GRM21B5C1H223JA01L Murata

C95 1 22uF CAP, CERM, 22 µF, 25 V, +/- 10%, X7R, 1210 1210 GRM32ER71E226KE15L Murata

C105, C108, C109, C112 4 0.01uF CAP, CERM, 0.01 µF, 25 V, +/- 5%, C0G/NP0, 0603 0603 C1608C0G1E103J TDK

D1, D2, D4 3 Green LED, Green, SMD LED_0603 LTST-C191TGKT Lite-On

D3 1 Red LED, Red, SMD LED_0603 LTST-C191KRKT Lite-On

H1, H2, H3, H4 4 Bumpon, Cylindrical, 0.312 X 0.200, Black Black Bumpon SJ61A1 3M

J1 1 Connector, Receptacle, Micro-USB Type B, R/A, BottomMount SMT

7.5x2.45x5mm 0473460001 Molex

J3 1 Header, 100mil, 18x2, Gold, TH 18x2 Header TSW-118-07-G-D Samtec

J6 1 Header, 2.54mm, 5x2, Gold, SMT Header, 2.54mm,5x2, SMT

TSM-105-01-L-DV Samtec

J7, J9 2 SMA Straight Jack, Gold, 50 Ohm, TH SMA StraightJack, TH

901-144-8RFX Amphenol RF

J8 1 Terminal Block, 2.54mm, 2x1, Brass, TH Terminal Block,2.54mm, 2-pole,Brass, TH

OSTVN02A150 On-ShoreTechnology

JP1, JP2, JP5, JP7, JP9, JP10 6 Header, 100mil, 2x1, Gold, TH 2x1 Header TSW-102-07-G-S Samtec

JP3, JP8, JP11 3 Header, 100mil, 3x1, Gold, TH 3x1 Header TSW-103-07-G-S Samtec

JP6 1 Header, 2.54mm, 3x2, Gold, SMT Header, 2.54mm,3x2, SMT

TSM-103-01-L-DV Samtec

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www.ti.com ADS127L01EVM Bill of Materials, PCB Layout, and Schematic



ADS127L01EVM

Table 10. ADS127L01 Bill of Materials (1) (continued)Designator Qty Value Description Package

ReferencePart Number Manufacturer Alternate Part Number Alternate

Manufacturer

L1 1 1uH Inductor, Wirewound, Ferrite, 1 µH, 2.05 A, 0.045 ohm,SMD

1210 LQH32PN1R0NN0 Murata

L4 1 600 ohm Ferrite Bead, 600 ohm @ 100 MHz, 0.3 A, 0603 0603 HZ0603C601R-10 Laird-SignalIntegrity Products

R1, R4, R5, R8, R18, R24 6 10.0k RES, 10.0 k, 1%, 0.1 W, 0603 0603 CRCW060310K0FKEA Vishay-Dale

R2, R38 2 1.00k RES, 1.00 k, 1%, 0.1 W, 0603 0603 CRCW06031K00FKEA Vishay-Dale

R3 1 8.06k RES, 8.06 k, 1%, 0.1 W, 0603 0603 CRCW06038K06FKEA Vishay-Dale

R6, R10 2 100 RES, 100, 1%, 0.1 W, 0603 0603 CRCW0603100RFKEA Vishay-Dale

R7, R12, R31, R34 4 0 RES, 0, 5%, 0.1 W, 0603 0603 CRCW06030000Z0EA Vishay-Dale

R9 1 1.00Meg RES, 1.00 M, 1%, 0.1 W, 0603 0603 CRCW06031M00FKEA Vishay-Dale


R13 1 51 RES, 51, 5%, 0.1 W, 0603 0603 CRCW060351R0JNEA Vishay-Dale

R14, R15, R16, R17, R19, R75, R78,R80, R90, R91

10 0 RES, 0, 5%, 0.125 W, 0603 0603 MCT06030Z0000ZP500 Vishay/Beyschlag

R20, R25, R30, R57, R58, R62, R67,R68

8 100k RES, 100 k, 1%, 0.1 W, 0603 0603 CRCW0603100KFKEA Vishay-Dale

R21, R22, R23 3 681 RES, 681, 1%, 0.1 W, 0603 0603 CRCW0603681RFKEA Vishay-Dale

R26, R37, R39 3 0.1 RES, 0.1, 1%, 0.1 W, 0603 0603 ERJ-L03KF10CV Panasonic

R27 1 768k RES, 768 k, 1%, 0.1 W, 0603 0603 RC0603FR-07768KL Yageo America

R28 1 20.0k RES, 20.0 k, 1%, 0.1 W, 0603 0603 RC0603FR-0720KL Yageo America

R29 1 215k RES, 215 k, 1%, 0.1 W, 0603 0603 RC0603FR-07215KL Yageo America

R55, R56 2 43.2 RES, 43.2, 0.1%, 0.1 W, 0603 0603 RT0603BRD0743R2L Yageo America

R60, R77, R82 3 10.0 RES, 10.0, 0.1%, 0.1 W, 0603 0603 CRT0603-BY-10R0ELF Bourns

R61, R98, R102 3 1.00 RES, 1.00, 0.5%, 0.1 W, 0603 0603 RT0603DRE071RL Yageo America

R63 1 60.4k RES, 60.4 k, 0.5%, 0.1 W, 0603 0603 RT0603DRE0760K4L Yageo America

R66, R89 2 120k RES, 120 k, 0.5%, 0.1 W, 0603 0603 RT0603DRE07120KL Yageo America

R69 1 100k RES, 100 k, 5%, 0.0625 W, AEC-Q200 Grade 1, ResistorArray - 8x1

Resistor Array -8x1

EXB-2HV104JV Panasonic


R71, R74, R79, R84 4 1.00k RES, 1.00 k, 0.1%, 0.1 W, 0603 0603 RT0603BRD071KL Yageo America

R76, R81 2 15.0 RES, 15.0, 0.1%, 0.1 W, 0603 0603 RT0603BRD0715RL Yageo America

R88 1 0.047 RES, 0.047, 1%, 0.1 W, 0603 0603 ERJ-L03KF47MV Panasonic




R103 1 10.0k RES, 10.0 k, 0.5%, 0.1 W, 0603 0603 RT0603DRE0710KL Yageo America

S1, S2 2 Switch, Tactile, SPST-NO, 0.05A, 12V, SMT Switch, 4.4x2x2.9mm

TL1015AF160QG E-Switch

S3 1 Switch, Slide, SPST 8 poles, SMT Switch, 8Pos,21.8x3.8x6.7 mm

219-8MST CTSElectrocomponents

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ADS127L01EVM



Manufacturer

SH-J1, SH-J2, SH-J3, SH-J5, SH-J6,SH-J7, SH-J8, SH-J9, SH-J10, SH-J11, SH-J12, SH-J13, SH-J14, SH-J15, SH-J16, SH-J17, SH-J18, SH-J19, SH-J20, SH-J21, SH-J22, SH-J23, SH-J24, SH-J25, SH-J26

25 1x2 Shunt, 100mil, Gold plated, Black Shunt 969102-0000-DA 3M SNT-100-BK-G Samtec

TP6, TP7, TP8, TP9, TP10, TP22,TP23, TP24, TP25

9 Double Terminal, Turret, TH, Double Keystone1573-2 1573-2 Keystone

TP17, TP18, TP19, TP20, TP21 5 SMT Test Point, Miniature, SMT Testpoint_Keystone_Miniature

5015 Keystone

U1 1 Tiva C Series Microcontroller, PDT0128A PDT0128A TM4C1294NCPDTI3R Texas Instruments TM4C1294NCPDTI3 Texas Instruments

U2 1 Highly Integrated Full Featured Hi-Speed USB 2.0 ULPITransceiver, QFN-32

5x5 QFN-32 USB3320C-EZK Microchip

U3 1 High-Speed USB 2.0 (480 Mbps) 1:2 Multiplexer /Demultiplexer Switch with Single Enable, 6 ohm RON, 2.5to 3.3V, -40 to 85 degC, 10-Pin UQFN (RSE), Green(RoHS & no Sb/Br)

RSE0010A TS3USB221ERSER Texas Instruments Equivalent Texas Instruments

U4 1 USB ESD Solution with Power Clamp, 4 Channels, -40 to+85 degC, 6-pin SON (DRY), Green (RoHS & no Sb/Br)

DRY0006A TPD4S012DRYR Texas Instruments Equivalent Texas Instruments

U5, U7 2 8-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATORFOR OPEN-DRAIN AND PUSH-PULL APPLICATIONS,RGY0020A

RGY0020A TXS0108ERGYR Texas Instruments Texas Instruments

U6, U10 2 SINGLE BUFFER/DRIVER WITH OPEN-DRAINOUTPUT, DCK0005A

DCK0005A SN74LVC1G07DCKR Texas Instruments SN74LVC1G07DCKT Texas Instruments

U8 1 Dual Inverter Buffer/Driver With Open-Drain Outputs,DCK0006A

DCK0006A SN74LVC2G06DCKR Texas Instruments Texas Instruments

U9 1 Single Inverter Buffer/Driver With Open-Drain Output,DCK0005A


U11 1 TINY 1.5-A BOOST CONVERTER WITH ADJUSTABLEINPUT CURRENT LIMIT, DSG0008A

DSG0008A TPS61252DSGR Texas Instruments TPS61252DSGT Texas Instruments

U12 1 36-V, 1-A, 4.17-uVRMS, RF LDO Voltage Regulator,RGW0020A

RGW0020A TPS7A4700RGWR Texas Instruments TPS7A4700RGWT Texas Instruments

U13 1 Single Output High PSRR LDO, 150 mA, Fixed 1.8 VOutput, 2.5 to 6.5 V Input, with Low IQ, 5-pin SC70 (DCK),-40 to 85 degC, Green (RoHS & no Sb/Br)

DCK0005A TPS71718DCKR Texas Instruments Equivalent Texas Instruments

U14 1 3-Pin Voltage Supervisors with Active-Low, Open-DrainReset, DBZ0003A

DBZ0003A TLV803MDBZR Texas Instruments TLV803MDBZT Texas Instruments

U15 1 1-A Low-Dropout Regulator With Reverse CurrentProtection, DRV0006A

DRV0006A TPS73733DRVR Texas Instruments TPS73733DRVT Texas Instruments

U23 1 Low Skew, 1-to-4 Multiplexed Differential/LVCMOS-to-LVCMOS/TTL Fanout Buffer, PW0016A

PW0016A LMK00804BPW Texas Instruments Texas Instruments

U24, U25 2 LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP, DCK0005A

DCK0005A SN74AUP1G80DCKR Texas Instruments SN74AUP1G80DCKT Texas Instruments

U26 1 24-Bit, High-Speed, Wide-Bandwidth Analog-to-DigitalConverter, PBS0032A

PBS0032A ADS127L01IPBS Texas Instruments Texas Instruments

U27, U28 2 Octal FET Bus Switch, PW0020A PW0020A SN74CBT3244PW Texas Instruments Texas Instruments

U29 1 Single Inverter Gate, DBV0005A DBV0005A SN74LVC1G04QDBVRQ1 Texas Instruments Texas Instruments

U30 1 Low Power, Precision, 160MHz, Fully DifferentialAmplifier, RGT0016A (VQFN-16)

RGT0016A THS4551IRGTR Texas Instruments THS4551IRGTT Texas Instruments

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ADS127L01EVM



Manufacturer

U32 1 High-Precision Voltage Reference with Integrated High-Bandwidth Buffer, DGK0008A

DGK0008A REF6025IDGK Texas Instruments Texas Instruments

U35, U36 2 +36V, +150mA, Ultralow-Noise, Positive LINEARREGULATOR, DGN0008D

DGN0008D TPS7A4901DGNR Texas Instruments TPS7A4901DGNT Texas Instruments

Y1 1 Oscillators, 16MHz, CMOS, 1.8 to 3.3V, SMD 4-Pin SMD, Body3.2 x 2.5 mm ,Height 0.9 mm

ASEMB-16.000MHZ-XY-T AbraconCorporation

ASEMB-16.000MHZ-LY-T

C23, C100, C102 0 10uF CAP, CERM, 10 µF, 25 V, +/- 20%, X5R, 0603 0603 GRM188R61E106MA73D Murata

C36, C38, C40, C43, C44, C54, C55 0 10uF CAP, CERM, 10 µF, 35 V, +/- 10%, X7R, 1206 1206 GMK316AB7106KL Taiyo Yuden

C37, C46, C48, C52, C57, C93, C94,C99

0 0.1uF CAP, CERM, 0.1 µF, 25 V, +/- 5%, X7R, 0603 0603 06033C104JAT2A AVX

C39, C42, C47, C53, C58 0 0.01uF CAP, CERM, 0.01 µF, 25 V, +/- 10%, X7R, 0603 0603 GRM188R71E103KA01D Murata

C41, C101 0 1uF CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 0603 0603 UMK107AB7105KA-T Taiyo Yuden

C45, C56 0 10uF CAP, CERM, 10 µF, 25 V, +/- 10%, X7R, 1206 1206 GRM31CR71E106KA12L Murata

C49 0 1100pF CAP, CERM, 1100 pF, 50 V, +/- 5%, C0G/NP0, 0603 0603 GRM1885C1H112JA01D Murata

C50 0 0.22uF CAP, CERM, 0.22 µF, 25 V, +/- 10%, X7R, 0603 0603 GRM188R71E224KA88D Murata

C51 0 10pF CAP, CERM, 10 pF, 50 V, +/- 5%, C0G/NP0, 0603 0603 06035A100JAT2A AVX

C59 0 4700pF CAP, CERM, 4700 pF, 100 V, +/- 10%, X7R, 0603 0603 06031C472KAT2A AVX


C86, C92 0 470pF CAP, CERM, 470 pF, 50 V, +/- 5%, C0G/NP0, 0603 0603 06035A471JAT2A AVX

C88 0 1000pF CAP, CERM, 1000 pF, 50 V, +/- 1%, C0G/NP0, 0603 0603 GRM1885C1H102FA01J Murata


C91 0 100pF CAP, CERM, 100 pF, 100 V, +/- 20%, NP0, 0805 0805 101X15N101MV4E JohansonTechnology

C98 0 2.2uF CAP, CERM, 2.2 µF, 16 V, +/- 10%, X7R, 0603 0603 GRM188Z71C225KE43 Murata

C103 0 22uF CAP, CERM, 22 µF, 25 V, +/- 10%, X7R, 1210 1210 GRM32ER71E226KE15L Murata

C104 0 22uF CAP, CERM, 22 µF, 10 V, +/- 20%, X7R, 0805 0805 GRM21BZ71A226ME15L Murata

D5 0 12V Diode, TVS, Uni, 12 V, 600 W, SMB SMB SMBJ12A-13-F Diodes Inc.

D6 0 Green LED, Green, SMD LED_0603 LTST-C191TGKT Lite-On

D7 0 20V Diode, Schottky, 20 V, 1 A, SOD-123F SOD-123F PMEG2010AEH,115 NXP Semiconductor

D8 0 20V Diode, Schottky, 20 V, 1.1 A, DO-219AB DO-219AB SL02-GS08 Vishay-Semiconductor

F1 0 Fuse, 2 A, 125VAC/VDC, SMD SMD, 2-Leads,Body9.73x5.03mm

0154002.DRT Littelfuse

FID1, FID2, FID3, FID4, FID5, FID6 0 Fiducial mark. There is nothing to buy or mount. N/A N/A N/A

H5 0 CABLE USB-A TO MICRO USB-B 0.5M This is a kittingitem.

Used in PnPoutput and someBOM reports

102-1092-BL-00100 CNC Tech - -

J2 0 Header, 100mil, 7x1, Gold, TH 7x1 Header TSW-107-07-G-S Samtec

J4 0 Terminal Block, 3.5mm Pitch, 2x1, TH 7.0x8.2x6.5mm ED555/2DS On-ShoreTechnology

J5 0 Connector, DC Jack 2.1X5.5 mm, TH POWER JACK,14.4x11x9mm

PJ-102A CUI Inc.

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ADS127L01EVM



Manufacturer

JP4 0 Header, 100mil, 2x1, Gold, TH 2x1 Header TSW-102-07-G-S Samtec

L2 0 3.3uH Inductor, Shielded Drum Core, Ferrite, 3.3 µH, 1.5 A,0.033 ohm, SMD

CDPH4D19F CDPH4D19FNP-3R3MC Sumida

L3 0 10uH Inductor, Shielded Drum Core, Ferrite, 10 µH, 1.2 A, 0.124ohm, SMD

CDRH5D18 CDRH5D18NP-100NC Sumida

R32, R33, R35, R36 0 0 RES, 0, 5%, 0.1 W, 0603 0603 CRCW06030000Z0EA Vishay-Dale

R40 0 681 RES, 681, 1%, 0.1 W, 0603 0603 CRCW0603681RFKEA Vishay-Dale


R42, R54, R95 0 10.0k RES, 10.0 k, 1%, 0.1 W, 0603 0603 CRCW060310K0FKEA Vishay-Dale


R44 0 158k RES, 158 k, 1%, 0.1 W, 0603 0603 CRCW0603158KFKEA Vishay-Dale






R50 0 10.0 RES, 10.0, 1%, 0.1 W, 0603 0603 CRCW060310R0FKEA Vishay-Dale


R52 0 1.30Meg RES, 1.30 M, 1%, 0.1 W, 0603 0603 CRCW06031M30FKEA Vishay-Dale


R59, R64, R65, R87 0 1.00Meg RES, 1.00 M, 1%, 0.1 W, 0603 0603 CRCW06031M00FKEA Vishay-Dale

R72, R73, R83, R85, R86, R92, R96 0 0 RES, 0, 5%, 0.125 W, 0603 0603 MCT06030Z0000ZP500 Vishay/Beyschlag

R93 0 1.00k RES, 1.00 k, 0.1%, 0.1 W, 0603 0603 RT0603BRB071KL Yageo America

R94, R97 0 0.22 RES, 0.22, 1%, 0.1 W, 0603 0603 ERJ-3RQFR22V Panasonic

SH-J4 0 1x2 Shunt, 100mil, Gold plated, Black Shunt 969102-0000-DA 3M SNT-100-BK-G Samtec

U16 0 1.5-A LOW-NOISE FAST-TRANSIENT-RESPONSE LOW-DROPOUT REGULATOR, DCQ0006A

DCQ0006A TL1963ADCQR Texas Instruments TL1963ADCQT Texas Instruments

U17 0 3-PIN VOLTAGE SUPERVISORS, DBV0003A DBV0003A TPS3809I50QDBVRQ1 Texas Instruments Texas Instruments

U18 0 Single Inverter Buffer/Driver With Open-Drain Output,DCK0005A


U19 0 Step-Up DC-DC Converter with Forced PWM Mode, 2.3 to6 V, -40 to 105 degC, 8-pin SOP (PW8), Green (RoHS &no Sb/Br)

PW0008A TPS61085TPWR Texas Instruments Equivalent Texas Instruments

U20 0 Single Output High PSRR LDO, 150 mA, Adjustable 1.2 to33 V Output, 3 to 36 V Input, with Ultra-Low Noise, 8-pinMSOP (DGN), -40 to 125 degC, Green (RoHS & noSb/Br)

DGN0008D TPS7A4901DGNR Texas Instruments Equivalent Texas Instruments

U21 0 DC-DC INVERTER, DRC0010J DRC0010J TPS63700DRCR Texas Instruments TPS63700DRCT Texas Instruments

U22 0 Single Output High PSRR LDO, 200 mA, Adjustable -1.18to -33 V Output, -3 to -36 V Input, with Ultra-Low Noise, 8-pin MSOP (DGN), -40 to 125 degC, Green (RoHS & noSb/Br)

DGN0008D TPS7A3001DGNR Texas Instruments Equivalent Texas Instruments

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ADS127L01EVM



Manufacturer

U31 0 36-V, Precision, Rail-to-Rail Input/Output, Low OffsetVoltage, Low Input Bias Current Op Amp with e-trim,DBV0005A

DBV0005A OPA192IDBVR Texas Instruments OPA192IDBVT Texas Instruments

U33 0 Low-Noise, Very Low Drift, Precision VOLTAGEREFERENCE, DGK0008A

DGK0008A REF5025IDGKR Texas Instruments REF5025IDGKT Texas Instruments

U34 0 Precision, 20 MHz, 0.9 pA Ib, RRIO, CMOS OperationalAmplifier, 1.8 to 5.5 V, -40 to 125 degC, 5-pin SOT23(DBV0005A), Green (RoHS & no Sb/Br)

DBV0005A OPA320AIDBVT Texas Instruments Equivalent Texas Instruments

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ADS127L01EVM

7.2 PCB LayoutFigure 18 through Figure 24 illustrate the PCB layout.

Figure 18. Top Silkscreen

Figure 19. Top Layer (Positive)

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ADS127L01EVM

Figure 20. Ground (Negative)

Figure 21. Power (Negative)

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ADS127L01EVM

Figure 22. Bottom Layer (Positive)

Figure 23. Bottom Silkscreen

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ADS127L01EVM

Figure 24. Bottom Silkscreen (Mirrored)

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VBUS1

D-2

D+3

ID4

GND5

678

11

10

9 J1

D+1

D-2

ID3

GND4

NC5

VBUS6

U4

TPD4S012DRYR

CLKOUT1

NXT2

DATA[0]3

DATA[1]4

DATA[2]5

DATA[3]6

DATA[4]7

REFSEL[0]8

DATA[5]9

DATA[6]10

REFSEL[1]11

NC12

DATA[7]13

REFSEL[2]14

SPK_L15

SPK_R16

CPEN17

DP18

DM19

VDD3320

VBAT21

VBUS22

ID23

RBIAS24

XO25

REFCLK26

RESET27

VDD1828

STP29

VDD1830

DIR31

VDDIO32

PAD33

U2

USB3320C-EZK

1.8VDIG_3.3V

DIG_3.3V

8.06kR3

5

4

1

2

3

6

7

J2

DNP

JTAG header

UORXUOTX

USB_VBUS

S1

10.0kR5

100

R6

0.1µF

C8

GNDGND

GND

1.00kR2

2.2µFC1

GND

10.0kR4

GND

0.1µF

C2

0.1µF

C3

0.1µF

C4

GND GND

DIG_3.3V 1.8VDIG_3.3V

VBAT VDDIO VDD18

0.1µF

C6

GND

USB_VBUS

DVDD_3.3V

ULPI_CONTROL_BUS.USBRST

JTAG_RESET

10µFC7

DIG_3.3V

PD01

PD12

PD23

PD34

PE312

PE213

PE114

PE015

PK018

PK119

PK220

PK321

PC722

PC623

PC524

PC425

PH029

PH130

PH231

PH332

PA033

PA134

PA235

PA336

PA437

PA538

PA640

PA741

PF042

PF143

PF244

PF345

PF446

PG049

PG150

PK760

PK661

PK562

PK463

PB291

PB392

PB095

PB196

PC3/TDO/SWO97

PC2/TDI98

PC1/TMS/SWDIO99

PC0/TCK/SWCLK100

PJ0116

PJ1117

PB5120

PB4121

PE4123

PE5124

PD4125

PD5126

PD6127

PD7128

U1A

TM4C1294NCPDTI3R

PQ05

PQ16

PQ211

PQ327

PM771

PM672

PM573

PM474

PM375

PM276

PM177

PM078

PL081

PL182

PL283

PL384

PL485

PL586

PL793

PL694

PQ4102

PP2103

PP3104

PP4105

PP5106

PN0107

PN1108

PN2109

PN3110

PN4111

PN5112

PP0118

PP1119

U1B

TM4C1294NCPDTI3R

USBD0USBD1USBD2USBD3USBD4USBD5USBD6USBD7

USBSTPUSBNXTUSBDIR

USBRSTUSBCLK

ULPI_CONTROL_BUS

BANK1_DIGITAL_BUS

BANK2_DIGITAL_BUS

BANK3_DIGITAL_BUS

BANK1_DIGITAL_BUS

BANK2_DIGITAL_BUS

BANK3_DIGITAL_BUS

BANK3_DIGITAL_BUS.BANK_ENABLEBANK2_DIGITAL_BUS.BANK_ENABLEBANK1_DIGITAL_BUS.BANK_ENABLE

USBD0USBD1USBD2USBD3USBD4USBD5

USBD7USBD6

ULPI_DATA_BUS

GPIO5GPIO4GPIO3GPIO2GPIO1GPIO0

I2C_SCLI2C_SDA BANK2_DIGITAL_BUS

BANK2_DIGITAL_BUS

SSI_CLK

SSI_DAT0SSI_DAT1

SSI_FS

UART_TXUART_RX

I2C_SDAI2C_SCL

SSI_DAT3SSI_DAT2

SSI_DAT1SSI_DAT0

SSI_FSSSI_CLK

BANK_ENABLE

BANK_SPARE_BUS

SSI_CLK

SSI_DAT0SSI_DAT1

SSI_DAT2

SSI_FSBANK3_DIGITAL_BUS

SSI_CLK

SSI_DAT0SSI_DAT1

SSI_DAT2

SSI_FS

SSI_DAT3

BANK3_DIGITAL_BUS

I2C_SCLI2C_SDABANK3_DIGITAL_BUS

USBNXTUSBDIR

ULPI_CONTROL_BUS

SSI_OTHER2SSI_OTHER1 BANK1_DIGITAL_BUS

USBSTPUSBCLK

ULPI_CONTROL_BUS

Pages 2, 4

Pages 2, 4

Pages 2, 4

BANK1_DIGITAL_BUS

1D+1

1D-2

2D+3

2D-4

GND5

OE6

D-7

D+8

S9

VCC10

U3

TS3USB221ERSER

10.0kR1

GND

DIG_3.3V

GND

USB_MUX_SEL

0.1µF

C5

DIG_3.3V

GND

USB_MUX_SELUSB_BSL_SELUSB_BSL_SEL

ULPI_DATA_BUS

USB_FS_DMUSB_FS_DP

USB_FS_DMUSB_FS_DP





ADS127L01EVM

7.3 SchematicFigure 25 through Figure 34 illustrate the EVM schematics.

Figure 25. TM4C Main Schematic

http://www.ti.com


S2

10.0kR8

100

R10

0.1µF

C9

4.87k

R11

0.1µF

C13

0.1µF

C12

0.1µF

C11

0.1µF

C10

0.1µF

C161µFC15

2.2µFC14

GND

GND

GND

GND

GND

0R12

0.1µF

C17

51

R13

GND

0R7

EN0RXIN53

EN0RXIP54

EN0TXON56

EN0TXOP57

RBIAS59

WAKE64

HIB65

XOSC066

XOSC167

RST70

OSC088

OSC189

U1C

TM4C1294NCPDTI3R

VDD7

VDDA8

VREFA+9

GNDA10

VDD16

GND17

VDD26

VDD28

VDD39

VDD47

GND48

VDD51

VDD52

GND55

GND58

VBAT68

VDD69

VDD79

GND80

VDDC87

VDD90

VDD101

VDD113

GND114

VDDC115

VDD122

U1D

TM4C1294NCPDTI3R

TIVA Power

TIVA MiscDIG_3.3V

DIG_3.3V

JTAG_RESET

GND

JP1

1.00M

R9

This jumper is used to hold TIVA in resetand disable level shifters when usingexternal microprocessor/microcontroller

External Controller EN

GND

TIVA_OSC0





ADS127L01EVM

Figure 26. TM4C Miscellaneous and Power Schematic

http://www.ti.com


A11

VCCA2

A23

A34

A45

A56

A67

A78

A89

OE10

GND11

B812

B713

B614

B515

B416

B317

B218

VCCB19

B120

PAD21

U7

TXS0108ERGYR

A11

VCCA2

A23

A34

A45

A56

A67

A78

A89

OE10

GND11

B812

B713

B614

B515

B416

B317

B218

VCCB19

B120

PAD21

U5

TXS0108ERGYR

GND

GND

100kR20

Input digital voltage <= 3.3V

DIG_VOLT2

DIG_VOLT3

I2C0_SDAI2C0_SCLTIVA_16MHz_LTGPIO_4GPIO_3GPIO_2GPIO_1GPIO_0

I2C1_SDAI2C1_SCL

SPI1_SCLKSPI1_FSSPI1_MOSI/DATA0SPI1_MISO/DATA1SPI1_DATA2SPI1_DATA3

GND

10.0kR24

NC

1

2

3

4

5

U6SN74LVC1G07DCKR

10.0k

R18

0.1µF

C18

0.1µF

C19

0.1µF

C21

GND

GND

GND

BANK_ENABLE

I2C_SCLI2C_SDA

GPIO0GPIO1GPIO2GPIO3GPIO4

BANK_ENABLE

I2C_SCLI2C_SDA

SSI_CLK

SSI_DAT0SSI_DAT1SSI_DAT2SSI_DAT3

SSI_FS

100kR25

DIG_3.3V

NC

1

2

3

4

5

U10SN74LVC1G07DCKR

GND

OSR0OSR1

FILTER1FILTER0

FSMODE

FORMATHR

DRDY

MISOMOSICSSCLK


GreenD2

681R22

NC1

A2

GND3

Y4

VCC5

U9

SN74LVC1G06DCKR

RedD3

681R23

GreenD1

681R21

AVDD_5V

AVDD_5V

GND

GND

1A1

GND2

2A3

2Y4

VCC5

1Y6

U8

SN74LVC2G06DCKR

DVDD_3.3V

DVDD_3.3V

BANK2_DIGITAL_BUS.GPIO2



LEDs for indication

BANK2_DIGITAL_BUS

BANK3_DIGITAL_BUSBANK3_DIGITAL_BUS

BANK2_DIGITAL_BUS

Pages 2, 4

Pages 2, 4

Pages 4, 8

TIVA_16MHzTIVA_OSC0

0.1µF

C20

GND

DVDD_3.3V

DVDD_3.3V

DIG_3.3V

0R14

0R15

0R170R16

0R19

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15

17

19

21

23

25

27

29

31

33

35

16

18

20

22

24

26

28

30

32

34

36

J3

DVDD

DVDD





ADS127L01EVM

Figure 27. ADS127L01EVM Digital Header Schematic

http://www.ti.com


USB_REG

10µFC28

0.1µFC27

GND1

VOUT2

FB3

ILIM4

PG5

EN6

SW7

VIN8

PAD9

U11

TPS61252DSGR

L1

215kR29

768kR27

20.0kR28

USB 5.0V to regulated 5.0V

10µFC23DNP

0.1µF

C22

100kR30

GND

22µFC24

100pFC26

JP2

1µFC34

GND

1000pFC35

GND

1µFC33

GND

1µFC31

GND

1µFC30

GND

GND

OUT1

NR/FB2

GND3

EN4

NC5

IN6

PAD7

U15

TPS73733DRVR

1.8V

DVDD_3.3VEXT_5V

0.1

R26

0.1

R39

0.1

R37

GND1

RESET2

VDD3

U14

TLV803MDBZR

AVDD_5V

1.00kR38

GND

GreenD4

1000pFC29

GND

GND

USB_VBUSP

GND GND

GND

GND

GND

USB_VBUS

TP4

TP3

TP11

TP1 TP2

TP12

TP5

TP6GND

TP7GND

TP8GND

TP9GND

TP10GND

GND

IN1

2

EN3

NR4

OUT5

GND

U13 TPS71718DCKR

1000pFC32

GND

0R36

DNP0R35

DNP0R34

0R33

DNP0R32

DNP0R31

GND

USB_IREG

10µFC25

GND

INT= 5V/150mA

3.3V/100mA

DIG_3.3V

EXT = 5V/300mA

Vout (V)

Programmable LDO Configuration (U12)

R31 (3P2V)

1.4

1.5

1.8

2.5

3.0

3.3

4.5

5.0 INSTALLED

INSTALLEDINSTALLED INSTALLED

INSTALLEDINSTALLED

INSTALLED

INSTALLED

INSTALLED

INSTALLED

DNI = Do not install

DNI

DNI

DNIDNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

INSTALLED DNI

INSTALLED

INSTALLED

INSTALLED

DNI

DNI

DNI

DNI

INSTALLED

INSTALLED

USB_REG

1

2

3

JP3

OUT1

NC2

SENSE3

6P4V24

6P4V15

3P2V6

GND7

1P6V8

0P8V9

0P4V10

0P2V11

0P1V12

EN13

NR14

IN15

IN16

NC17

NC18

NC19

OUT20

PAD21

U12

TPS7A4700RGWR

Remove/Install 0ohm resistors asneeded to achievedesired outputvoltage

243k = 5V215k = 5.5V191k = 6V

R32 (1P6V) R33 ( )0P8V R34 ( )0P4V R35 ( )0P2V R36 (0P1V)





ADS127L01EVM

Figure 28. ADS127L01EVM USB Power Schematic

http://www.ti.com


COMP1

FB2

EN3

PGND4

SW5

IN6

FREQ7

SS8

U19

TPS61085TPWR

DNP

COMP1

GND2

VIN3

EN4

IN5

SW6

PS_GND7

OUT8

FB9

VREF10

PAD11

U21

TPS63700DRCR

DNP

OUT1

FB2

NC3

4

EN5

NR/SS6

DNC7

IN8

9

EP GND

U20TPS7A4901DGNR

DNP

EP GND

OUT1

FB2

NC3

4

EN5

NR/SS6

DNC7

IN8

9

U22TPS7A3001DGNR

DNP

EXT_5V

10µFC36DNP

10µFC38DNP

0.1µFC37DNP

NC1

A2

GND3

Y4

VCC5

U18

SN74LVC1G06DCKR

DNP

GreenD6

DNP

681R40

DNP

GND1

RESET2

VDD3

U17

TPS3809I50QDBVRQ1

DNP

0.01µFC39DNP

3.01kR43

DNP

9.31kR41

DNP

SHDN1

IN2

GND3

OUT4

ADJ5

PAD6

U16

TL1963ADCQR

DNP

1

3

2

J5

DNP

JP4DNP

10µFC55DNP

0.01µFC58DNP

-12V

0.01µFC53DNP

93.1kR53

DNP

10.0kR54

DNP

10µFC44DNP

0.01µFC47DNP

+12V

0.01µFC42DNP

453kR45

DNP

49.9kR47

DNP

F1

Fuse, 2 A, 125VAC/VDC, SMD

DNP

10.0

R50DNP

0.1µFC52DNP

10µFC54DNP D8

DNP

4700pFC59DNP

1.30MR52

DNP

121kR49

DNP

100kR51

DNP10pF

C51

DNP

L3

DNP

EXT_5V

10µFC40DNP

1µFC41DNP

0.1µFC48DNP

EXT_5V

10µFC43DNP

1100pFC49DNP

51.1kR46

DNP

158kR44

DNP

15.0kR48

DNP

D7

DNP

L2

DNP

0.22µFC50DNP

DCV_WALL

HVBoost

GND

GND

GND

GNDGND

GND

GND

GND

GND

GNDGND

GNDGND

GND

GND

GNDGND

GND

GND

GND

GND

GND

GND

GND

TP13

TP15

10µFC56DNP

10µFC45DNP

0.1µFC57DNP

0.1µFC46DNP

TP14

TP16

12V/50mA

-12V/50mA

10.0kR42

DNP

J4DNP

Replacement Fuse

Littlefuse P/N 0453002. (Fast Acting)Littlefuse P/N 0454002. (Slow acting)

12V

D5DNP

Wall supply and terminal blockInput voltage = 5 - 12V





ADS127L01EVM

Figure 29. ADS127L01EVM External Power Schematic

http://www.ti.com


VDD4

STANDBY1

GND2

OUT3

16MHz

Y1

GND

DVDD_3.3V

GND

JP5100kR57

0.1µF

C68

GND

GND1

OE2

VDDO11

VDD3

CLK_EN4

CLK5

nCLK6

CLK_SEL7

LVCMOS_CLK8

GND9

Q310

Q212

GND13

VDDO15

Q114

Q016

U23

LMK00804BPW

GND

GND

GND

GND

JP6 Frequency (MHz)

16

8

ADS127L01 CLK Selection

[1-2]

[3-4]

4[5-6]

D1

CLK2

GND3

Q4

VCC5

U25

SN74AUP1G80DCKRGND

D1

CLK2

GND3

Q4

VCC5

U24

SN74AUP1G80DCKRGND

43.2

R56

ADC_8MHz

ADC_4MHz

ADC_16MHz

0.1µFC61

GND

DVDD_3.3V

DVDD_3.3V

43.2

R55 TIVA_16MHz

1 2

3 4

5 6

JP6

CLKSEL

ADC_16MHzADC_8MHzADC_4MHz

ADS127L01_DIGITAL.CLK

10µFC60

600 ohm

L4

DVDD

GND

0.1µFC64

1µFC63

0.1µF

C65

GND

VDDO

VDDO

VDDO

0.1µF

C67

GND

DVDD0.1µF

C66

GND

DVDD

10µFC62





ADS127L01EVM

Figure 30. ADS127L01EVM Clock Tree Schematic

http://www.ti.com


100kR67

DVDD

AGND5

AG

ND

31

AVDD6

AV

DD

32

CLK24

CS23

DAISYIN18

DG

ND

26

DIN21

DOUT20

DRDY/FSYNC19

DV

DD

27

CA

P3

25

FIL

TE

R0

13

FIL

TE

R1

12

FS

MO

DE

14

FO

RM

AT

30

HR

29

AINN3

AINP4

INTLDO8

LVDD1

OS

R0

16

OS

R1

15

RE

SE

T/P

WD

N2

8

REXT7

SCLK22

START17

CAP12

CA

P2

11

RE

FN

10

RE

FP

9

U26ADS127L01IPBS

1µF

C81

1OE1

1A12

2B43

1A24

2B35

1A36

2B27

1A48

2B19

GND10

2A111

1B412

2A213

1B314

2A315

1B216

2A417

1B118

2OE19

VCC20

U28

SN74CBT3244PW

GND

1OE1

1A12

2B43

1A24

2B35

1A36

2B27

1A48

2B19

GND10

2A111

1B412

2A213

1B314

2A315

1B216

2A417

1B118

2OE19

VCC20

U27

SN74CBT3244PW

GND

GNDAVDD 1µF

C75

JP9 100kR68

AVDD

GND

GND

AVDD

10.0

R60

2

1

3

JP8120kR66

60.4kR63

GND

0.1µF

C80

REFP

10pFC76

GND

1.00R61

0.1µFC69

10µFC70

GND

0.1µFC71

10µFC72

GND

AVDD AVDD

0.1µFC73

10µFC74

GND

DVDD1

GND

NC

1

2

3

4

5

U29

AVDD_5V

AVDD_5V

AVDD_5V

FO

RM

AT

HR

1 2 3 4 5 6

13

14

15

16

7

12

89

10

11

S3

GND

GND

1µF

C77

GNDAINN

AINP

TP17LVDD

1µF

C78

JP8 Mode

[1-2] HR / LP

VLP[2-3]

REXT Selection

JP7

DVDD

100kR58

GND

GND

DVDD

1.00MR65

DNP1.00MR64

DNP

DVDD1

GND GND

100kR62

DVDD

DRDY

MISO

MOSI

CS

SCLK

CLK

HR

FORMAT

FILTER1

OSR1

FSMODE

FILTER0

OSR0

Hardware Mode Inputs

HWEN Input Control

0 Hardware (S3)

EVM Software1

Mode Input Selection

FORMAT

100k

1 2 3 4 5 6 7 89

10

11

12

13

14

15

16

R69

HR

GND

GND

GND

10pFC79DNP

GND

HWEN

1.00MR59

DNPGND

Logic Analyzer Debug Header

GND

DRDYMISOMOSI

CSSCLK

1 2

3 4

5 6

7 8

9 10

J6

DEBUG


Pages 4, 8

AVDD_5V

1µF

C82GND

Install JP7 topower-down U26.

Measure voltage across R61 toestimate external LVDD supplycurrent. Uninstall to insert an ammeterin series.

Uninstall JP9 todrive externalLVDD supply.

Install R59, R64, and R65to operate U26 inPower-Down Mode.





ADS127L01EVM

Figure 31. ADS127L01EVM ADC Main Schematic

http://www.ti.com


0.1µFC84

10µFC85

AINNAINP

GND

GNDVOCM

GND

0.22µF

C87

GND

0

R72DNP

GND

Optional buffer stage for unknownsource output impedance.

0

R75

0

R80

0

R78

GND

0.22µFC83

GND

VOCMTP18

VOCMJP10

20.0k

R70

GND

/PD

GND

4

3

2

1

5

V+

V-U31OPA192IDBVR

DNP

GND

0.1µF

C94

DNP

GND

0.1µF

C93

DNP

0

R85DNP

/PD

15.0

R76

15.0

R81

10.0

R77

10.0

R82

1.00k

R71

1.00k

R74

1.00k

R79

1.00k

R84

C86

DNP

C92

DNP

AINP

AINN

0.022µFC90

+12V

-12V

TB20

R83DNP

0

R73DNPTB1

LDO_3V

LDO_3VLDO_3V

J8

TB2

TB1

Install Uninstall

R73, R83 R74, R77, R79,R82

Modifications to Bypass Driver Stage

Option to bypassdrivers:

U30

Alternate Driver Options

THS4541

Product (MHz)Gain Bandwidth

850

Noise Density

2.2

Quiescent Current

9.7

(nV/ Hz) Iq (mA)√

1.00MR87

DNP

Rf, Rg ( )Ω(R71, R74, R79, R84)

Performance may vary with alternate drivers.

3

10

4

9

11

2

VOCM

1

12

VS

+7

VS

+6

VS

+5

VS

+8

VS

-13

VS

-14

VS

-15

VS

-16

EP

17

U30THS4551IRGTR

0

R86DNP

THS4531A 36 10 0.23

C89DNP

1

2 3 4 5

J9 AINP

1

2 3 4 5

J7 AINN

C88DNP100pFC91

DNP

GND

THS4551 135 3.3 1.31

402

2k

1k

Install R72 forsingle-endedinput.

Install JP10 topower-downU30.





ADS127L01EVM

Figure 32. ADS127L01EVM ADC Input Driver Schematic

http://www.ti.com


GND

10µFC100DNP

1µFC101DNP

GND GND

10.0k

R95DNP

10µFC102DNP

GND

0.22R97

DNP

1

2

3

4

5

U34OPA320AIDBVT

DNP

GND

GND

0.1µF

C99

DNP

1.00k

R93DNP

GND

10µFC96

GND

120kR89

GND

0.047

R88

GND

1µFC97

REFP

GND

0R96

DNP

0.22

R94DNP

2.2µF

C98

DNP

AVDD_5V

LDO_3V

LDO_3V

22µFC95

0R90

0R92

DNP

VIN1

EN2

SS3

FILT4

OUT_S5

OUT_F6

GND_F7

GND_S8

U32

REF6025IDGKR

Source Install

REF6025 R90

REF5025+OPA320

Reference Selection

Uninstall

R92

External (TP19) R90, R92

R92 R90

R91

TP19REFP

0R91

Alternative reference driveroption with buffer

DNC1

VIN2

TEMP3

GND4

TRIM/NR5

VOUT6

NC7

DNC8

U33

REF5025IDGKR

DNP

22µFC104DNP 22µF

C103DNP





ADS127L01EVM

Figure 33. ADS127L01EVM ADC Reference Schematic

http://www.ti.com


OUT1

FB2

NC3

GND4

EN5

NR/SS6

DNC7

IN8

PAD9

U36

TPS7A4901DGNR

GND

TP24GND

JP11 DVDD (V)

[1-2] 1.8

3.3[2-3]

DVDD Selection

OUT1

FB2

NC3

GND4

EN5

NR/SS6

DNC7

IN8

PAD9

U35

TPS7A4901DGNR

10µFC106

GND

0.01µFC108

GND

AVDD_5V

0.01µF

C105

GND

GND

7.68kR99

4.99kR100 10µF

C107

GND

LDO_3V TP20AVDD

AVDD

1.00

R98

10µFC110

GND

0.01µFC112

GND

DVDD_3.3V

GND

0.01µF

C109

10µFC111

GND GND

5.23kR101

10.0kR103

DVDD_1.8V DVDD_3.3V1

2

3

JP11 DVDD

TP21DVDD DVDD

1.00

R102DVDD1

TP22GND

TP23GND

TP25GND

Measure voltage across R98 andR102 to estimate ADS127L01 analogand digital supply current. Uninstall toinsert an ammeter in series.





ADS127L01EVM

Figure 34. ADS127L01EVM ADC Power Schematic

http://www.ti.com


Revision History www.ti.com



Revision History

Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from A Revision (May 2016) to B Revision ...................................................................................................... Page

• Changed AGND to GND in the second to last bullet in the Supported Hardware Functionality section....................... 4• Updated contents of the Default Settings table........................................................................................ 5• Updated contents of the Hardware Item Descriptions table. ........................................................................ 7• Changed Input Common-Mode Voltage and System Ground rows in the Test Points, TP17 – TP24 table. ................. 8• Changed Digital Interface Header, J3 table............................................................................................ 9• Updated Debug Header, J6 table. ...................................................................................................... 9• Added SPI Commands section......................................................................................................... 14• Changed most of the ADS127L01EVM Hardware section. ........................................................................ 15• Updated Power Supply Connections section......................................................................................... 19• Changed BOM in the Bill of Materials section........................................................................................ 20• Changed all schematics in the Schematic section................................................................................... 30• Added ADS127L01EVM Clock Tree Schematic image. ............................................................................ 35

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Concerning EVMs Including Radio Transmitters:This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:(1) this device may not cause interference, and (2) this device must accept any interference, including interference that maycause undesired operation of the device.

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Concernant les EVMs avec antennes détachablesConformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type etd'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillageradioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotroperayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Leprésent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans lemanuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antennenon inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation del'émetteur

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なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。日本テキサス・イ

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