address translation - university of northern iowa · paging-based translation: memory allocation...
TRANSCRIPT
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Address Translation
Sarah Diesburg Operating Systems
CS 3430
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Recall from Last Time…
• Translation tables are implemented in HW, controlled by SW
Virtual addresses
Physical addresses
Translation table
Data offsets inside blocks (untranslated)
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This Lecture…
• Different translation schemes – Base-and-bound translation – Segmentation – Paging – Multi-level translation – Paged page tables – Hashed page tables – Inverted page tables
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Assumptions
• 32-bit machines • 1-GB RAM max
Physical address
log2(1GB) = 30 bits for 1GB of RAM 1GB RAM = 230
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Base-and-Bound Translation
• Each process is loaded into a contiguous region of physical memory
• Processes are protected from one another
Virtual address Physical address
Base
+
Error >
Bound
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Base-and-Bound Translation
• Each process “thinks” that it is running on its own dedicated machine, with memory addresses from 0 to bound
code data …
stack
Virtual addresses Physical addresses 0
bound
code data …
stack
base = 6250
6250 + bound
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Base-and-Bound Translation
• An OS can move a process around – By copying bits – Changing the base and bound registers
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Pros and Cons of Base-and-Bound Translation
+ Simplicity + Speed - External fragmentation: memory is wasted
because the available memory is not contiguous for allocation
- Difficult to share programs – Each instance of a program needs to have a copy
of the code segment
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Pros and Cons of Base-and-Bound Translation
- Memory allocation is complex – Need to find contiguous chunks of free memory – Reorganization involves copying
- Does not work well when address spaces grow and shrink dynamically
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Segmentation
• Segment: a region of logically contiguous memory
• Segmentation-based translation: use a table of base-and-bound pairs
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Segmentation Illustrated Virtual addresses Physical addresses
code 0x4000
0x46ff
0x0
0x6ff code
data 0x1000
0x14ff
data 0x0
0x4ff
stack 0x3000
0x3fff
stack
0x2000
0x2fff
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Segmentation Diagram
Virt seg # Offset Phy addr
Physical seg base Seg bound
Physical seg base Seg bound
Physical seg base Seg bound
+
Error >
log2(1GB) = 30 bits for 1GB of RAM
30 bits up to 30 bits
up to 30 bits
32 - 30 = 2 bits for 32-bit machines
22 entries 0
1
2
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Segmentation Diagram
2 0x200
>
0x2200
0x4000 0x700
0x0 0x500
0x2000 0x1000
+
code
data
stack
0
1
2
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Segmentation Translation
• virtual_address = virtual_segment_number:offset
• physical_base_address = segment_table[virtual_segment_number]
• physical_address = physical_base_address + offset
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Pros and Cons of Segmentation
+ Easier to grow and shrink individual segments + Finer control of segment accesses
– e.g., read-only for shared code segment + More efficient use of physical space + Multiple processes can share the same code
segment - Memory allocation is still complex
– Requires contiguous allocation
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Paging
• Paging-based translation: memory allocation via fixed-size chunks of memory, or pages – Translation granularity is a page
• The memory manager uses a bitmap to track the allocation status of memory pages – Array of bits (0 or 1) to signify free or used pages
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Paging Illustrated Virtual addresses Physical addresses
0x0
0x1000
0x2000
0x0
0x3000
0x3fff
0x1000
0x2000
0x3000
0x4000
4K pages
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Paging Diagram
Virtual page number Offset
Physical page number
Physical page number
Physical page number
Physical page number Offset
Page table size - 1
>
Error
32 – 12 = 20 bits for 32-bit machines
log2(1GB) = 30 bits for 1GB of RAM
log2(4KB) = 12 bits for 4-KB pages
220 entries
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Paging Example
0 0x400 4 - 1
>
4
0
2
4 0x400
0
1
2
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Paging Translation
• virtual_address = virtual_page_number:offset
• physical_page_number = page_table[virtual_page_number]
• physical_address = physical_page_number:offset
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Pros and Cons of Paging
+ Easier memory allocation + Allows code sharing - Internal fragmentation: allocated pages are
not fully used - The page table size can potentially be very
large – 32-bit architecture with 1-KB pages can require 4
million table entries
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Multi-Level Translation
• Segmented-paging translation: breaks the page table into segments
• Paged page tables: Two-level tree of page tables
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Segmented Paging
1. Start with a virtual memory address 2. Look up the page table address in the
segment table 3. Index into the page table to get the physical
page number 4. Concatenate the physical page number to the
offset
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Segmented Paging
30 bits for 1-GB RAM 32 - 3 - 12 = 17 bits
12 bits for 4-KB pages
23 entries
Seg # Offset Virt page #
log2(6 segments) = 3 bits
Page table base Page table bound
Page table base Page table bound
Page table base Page table bound
Phy page #
Phy page #
Phy page #
18 bits num of entries defined by bound; up to 217 entries
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Segmented Paging (Cont.)
Page table bound-1
>
Error
Seg # Offset Virt page #
217 32 – 3 – 12 = 17 bits
Phy page # Offset
Phy page #
Phy page #
Phy page #
log2(1GB) = 30 bits for 1GB of RAM
Page table base +
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Segmented Paging Translation
• virtual_address = segment_number:page_number:offset
• page_table (base address)= segment_table[segment_number]
• physical_page_number = page_table[virtual_page_number] • physical_address =
physical_page_number:offset
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Pros and Cons of Segmented Paging
+ Code sharing + Reduced memory requirements for page
tables - Higher overhead and complexity - Page tables still need to be contiguous - Each memory reference now takes two lookups
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Paged Page Tables
1. Start with a virtual memory address 2. Index into the first page table to find the
address to the second page table 3. Index into the second page table to find the
physical page number 4. Concatenate the physical page number to the
offset
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Paged Page Tables
Page table num Offset Virt page num
Page table address (30 bits)
Page table address
Page table address
Phy page num
Phy page num
Phy page num
Phy page num (18 bits) Offset
12 bits for 4-KB pages 12 bits
212 entries
28 entries
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Paged Page Table Translation
• virtual_address = outer_page_num:inner_page_num:offset
• page_table = outer_page_table[outer_page_num]
• physical_page_num = inner_page_table[inner_page_num]
• physical_address = physical_page_num:offset
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Pros and Cons of Paged Page Tables
+ Can be generalized into multi-level paging - Multiple memory lookups are required to
translate a virtual address – Can be accelerated with translation lookaside
buffers (TLBs) • Stores recently translated memory addresses for short-
term reuses
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Hashed Page Tables
• Physical_address = hash(virtual_page_num):offset
+ Conceptually simple - Need to handle collisions - Need one hash table per address space
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Inverted Page Table
• One hash entry per physical page • physical_address
– = hash(pid, virtual_page_num):offset
+ The number of page table entries is proportional to the size of physical RAM
- Collision handling