Chapter 9

Adaptive Delta

Modulator

9-1 : Curriculum Objectives

1. To understand the operat ion theory of adapt ive delta modulation (ADM).

2. To understand the signal waveforms of ADM modulation.

3. Design and implementation of ADM modulator.

4. Measurement and adjustment of ADM modulator.

9-2 : Curriculum Theory

1. The Operation Theory of ADM Modulation

From previous chapter, we know that the disadvantage of delta modulation is when the

input audio signal frequency exceeded the limitation of delta modulator, i.e.

fsΔ≥ 𝑑𝑥 (𝑡)

𝑑𝑡

Then this situation will produce the occurrence of slope overload and cause signal distortion.

However, the adaptive delta modulation (ADM) is the modification of delta modulation to

improve the disadvantage of the occurrence of slope overload.

Figure 9-1 is the block diagram of ADM modulator. In figure 9-1, we can see that the delta

modulator is comprised by comparator, sampler and integrator, then the slope controller and the

level detect algorithm comprise a quantization level adjuster, which can control the gain of the

integrator in the delta modulator. ADM modulator is the modification of delta modulator,

therefore, due to the delta modulator has the problem of slope overload at low and high

frequencies. The reason is the magnitude of the Δ(t) of delta modulator is fixed, i.e. the

increment of Δ or -Δ is unable to follow the variation of the slope of the input signal. When the

variation of the slope of the input signal is large, the magnitude of Δ(t) still can increase by

following the variation, then this situation will not occur the problem of slope overload. On the

other hand, there is another technique, which is known as continuous variable slope delta (CVSD)

modulation. This technique is commonly used in Bluetooth application. CVSD modulator is also

the modification of delta modulator, use to improve the occurrence of slope overload. The

different between the CVSD and ADM modulators are the quantization level adjuster A. ADM

modulator is discrete values and the quantization level adjuster of CVSD modulator is

continuous. Simply, the quantization value of ADM modulator is the variation of digital, such as

the quantization values of +1, +2, +3, -2, -3 and so on. As for CVSD modulator, the quantization

value is the variation of analog, such as the quantization values of +1, +1.1, +1.2, -1.5, -0.3, -0.9

and so on.

Figure 9-1 Block diagram of ADM modulator.

2. The Implementation of ADM Modulator

Figure 9-2 is the basic circuit diagram of ADM modulator. In figure 9-2, the audio

signal will pass through a low-pass filter, which can remove all the unwanted signal and

only obtain the audio signal. The input signals of the comparator are the audio signal and

triangle wave signal, then the output of the comparator is the square wave signal. The D-

type flip flop is used as sampling, then the output signal of the flip flop is the modulated

ADM signal. After that the signal will feedback to tunable gain amplifier and level

adjuster. In accordance with the different between the input signal x(t) and the reference

signal Xs(t), we can change the magnitude of the gain of the tunable amplifier. If the

different of the input signal and the reference signal is very large, then the level adjuster

will change the gain of the tunable amplifier so that the value of Δ(t) will become large.

On the other hand, if the different of the input signal and the reference signal is very

small, then the level adjuster will change the gain of the tunable amplifier so that the value

of Δ(t) will become small. With this advantage, when the frequency variation of the

input signal is large, then we can increase the value of Δ(t) to prevent the occurrence of

slope overload. And when the frequency variation of the input signal is small, then we

can decrease the value of Δ(t) to reduce the error.

Figure 9-2 Basic circuit of ADM modulator

Figure 9-3 is part of the circuit diagram of ADM modulator. The main reason is the

circuit diagram in figure 9-3 is similar to the circuit diagram of delta modulator in

chapter 7, therefore, please refer to chapter 7 for the operat ion theory o f t his

circuit . Since the ADM modulator is t he modification of delta modulator, which is

used to improve the occurrence of slope overload, so, in this chapter, we will focus on

the implementation of auto alteration of the value Δ(t).

Figure 9-4 is the controlled circuit of Δ(t) value of ADM modulator. In figure 9-4, connect

the point A and point B in figure 9-4(a) to the point A and point B of the analog switch in

figure 9-3. Since by changing the values of point A and point B, we can change the gain of

the integrator, and then we can also change the magnitude of the period between the

output slope of the integrator and the output of the delta modulator. In figure 9-4(a), U1 is the

inverter. U5 and U6 comprise a synchronous counter, however, the CLK of the flip-flop is

positive edge trigger and the CLK of the counter is negative edge trigger. Therefore, in

order to synchronize the flip-flop and the counter, we need to add an inverter. Figure 9-4(b)

is the output signal waveforms of each test points. Test point A is the modulated ADM

signal; test point B is the output signal waveform of Q of U5, which will operate with

test point A by "exclusion OR" (XOR), i.e. D = A G + (U5)Q . As a result of the circuit in

figure 9-4(a) utilize synchronous counter as the pulse detector and latch, so, the results of

test point C and test point F will be similar to each others. Test point G is the "AND"

between test point D and test point E. When the test point G is zero, the counter will

reset. At this moment, the output of the counter is zero and refer to the integrator in figure 9-3,

the gain will be

Figure 9-4(a) Circuit diagram of auto gain controller.

Figure 9-4(b) Output signal waveforms of each test point of the auto gain controller.

Figure 9-4 Circuit diagram and output signal waveforms of the auto gain controller.

From the above-mentioned equations, we know that when the value of .he counter

become larger, the gain of the integrator also become larger. If the output value of the

counter is larger than 3 but not yet reset to zero, then the counter will load the output

value into the counter, which means the increment will always maximum. The counter will

only reset until the pin CLR is "LOW". With this method, we can achieve the auto gain

control of the integrator. The different between the delta modulator and adaptive delta

modulator is that the gain of the integrator of the delta modulator is fixed. However, the

adaptive delta modulator will change the gain of the integrator according to the

modulated signal in present and past. In this chapter, the counter that we use is a 2 -bits

counter, therefore, there are only 4 variations of the increment values. In order to obtain

more increment values, we just need to change the counter and the analog switch.

9-3 : Experiment Items

Experiment 1: Adaptive Delta Modulator

1. To implement an adaptive delta modulator circuit as shown in figure 9-3 and figure 9-4 or

refer to figure DCT9-1 on GOTT DCT-6000-05 module.

2. At the audio signal input port (Audio I/P), input a 1 V amplitude and 500 Hz sine wave

frequency. Next at the CLK input port (CLK I/P), input a 5 V amplitude and 32 kHz

TTL signal. Then observe the input signal (TP1), the output port of comparator

(TP2), the output port of the conversion from unipolar to bipolar (TP3), the gain

selection A (TP4), the output port of tunable gain (T6), the output port of slope

controller (TP7), the output port of integrator (T8) and the output port of adaptive

delta modulation signal (ADM O/P) by using oscilloscope. Finally record the

measured results in table 9-1.

3. According to the input signals in table 9-1, repeat step 2 and record the measured results in

table 9-1.

4. At the audio signal input port (Audio I/P), input a 1 V amplitude and 500 Hz sine wave

frequency. Next at the CLK input port (CLK I/P), input a 5 V amplitude and 128 kHz

TTL signal. Then observe the output signal waveforms of TP1, TP2, TP3, TP4, TP6,

TP7, TP8 and ADM O/P. Finally record the measured results in table 9-2.

5. According to the input signals in table 9-2, repeat step 4 and record the measured results in

table 9-2.

9-4 : Measured Results

Table 9-1 Measured results of ADM modulator with 32 kHz CLK signal.

INPUT SIGNAL OUTPUT SIGNAL WAVEFORMS

500 Hz

1 V

TP1 TP2

TP3 TP4

TP6 TP7

TP8

ADM O/P

Table 9-1 Measured results of ADM modulator with 32 kHz CLK signal.(Continue)

INPUT SIGNAL OUTPUT SIGNAL WAVEFORMS

1 kHz

1 V

TP1 TP2

TP3 TP4

TP6 TP7

TP8

ADM O/P

Table 9-2 Measured results of ADM modulator with 128 kHz CLK signal.

INPUT SIGNAL OUTPUT SIGNAL WAVEFORMS

500 Hz

1 V

TP1 TP2

TP3 TP4

TP6 TP7

TP8

ADM O/P

Table 9-2 Measured results of ADM modulator with 128 kHz CLK signal. (Continue)

INPUT SIGNAL OUTPUT SIGNAL WAVEFORMS

1 kHz

1 V

TP1 TP2

TP3 TP4

TP6 TP7

TP8

ADM O/P

9-5: Problems Discussion

1. Explain the differences between adaptive delta modulation (ADM) and continuous variable

slope delta modulation (CVSD).

2. Explain the differences between delta modulation (DM) and adaptive delta modulation

(ADM).

3. Refer to figure 9-3, explain the functions of the integrator.

4. Refer to figure 9-4, explain how the circuit achieve auto gain control.