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Page 1: ABOS2~i EDEAL AVIATION ADNNShTO AHNTND YTMECFB1/ …AIR TRAFFIC CONTROL (ATC) FACILITY HARDWARE INTERFACES FOR DISC--ETC(U) WiLASSIFIED FAA-R-RD-S0-38 ... INTERFACES FOR DISCRETE ADDRESS

ABOS2~i EDEAL AVIATION ADNNShTO AHNTND YTMECFB1/AIR TRAFFIC CONTROL (ATC) FACILITY HARDWARE INTERFACES FOR DISC--ETC(U)

WiLASSIFIED FAA-R-RD-S0-38

U 'lfflffllfflffll7I miiii T

Page 2: ABOS2~i EDEAL AVIATION ADNNShTO AHNTND YTMECFB1/ …AIR TRAFFIC CONTROL (ATC) FACILITY HARDWARE INTERFACES FOR DISC--ETC(U) WiLASSIFIED FAA-R-RD-S0-38 ... INTERFACES FOR DISCRETE ADDRESS

Report No. FAA-RD-80-38

AIR TRAFFIC CONTROL FACILITY HARDWAREINTERFACES FOR DISCRETE ADDRESS BEACON SYSTEM

.

April 1980

Final Report

A

Document is available to the U.S. public throughthe National Technical Information Service,

Springfield, Virginia 22161.

Prepared for

cU.S. DEPARTMENT OF TRANSPORTATION_FEDERAL AVIATION ADMINISTRATION

_Systems Research & Development ServiceWashington, D.C. 20590

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NOTICE

This document is disseminated under the sponsorship of theDepartment of Transportation in the interest of informationexchange. The United States Government assumes no liabilityfor its contents or use thereof.

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Technical Roert Documentation Pae

ort No. 2. Government Accession No. 3. Recipient's Catolog No.

FAA-RD-8 -38 t

( TC C o - -o--(TC)Facility Hardware Interfaces for ARD-100.r r .. . S.. Performing Organizaon Report No.

Systems Research and Development ervice

9. Performing Organisation Name and Address 10. Work Unit No. (TRAIS)

Systems Research and Development Service -

Department of Transportation 11. Conroct or Grant No.

Federal Aviation AdministrationWashington, D.C. 20590 13. Type of Report and Period Covered

C 12. Sponsoring Agency Name and Address

Systems Research and Development Service Final~ep(rte

Department of Transportation jFederal Aviation Administration 14. Sponsoring Agency Code

Washington, D.C. 20590 ARD-10015. Supplementary Notes

16. Abstract

The Discrete Address Beacon System (DABS) is an evolutionary upgrading ofthe Air Traffic Control Radar Beacon System (ATCRBS). DABS providesimproved surveillance and an integral ground-air-ground digital data linkfor transmission of Air Traffic Control (ATC) communications messagesbetween ATC and DABS-equipped aircraft.

Surveillance data and data link services will be provided via land linesto ATC facilities. The DABS/ATC interface consists of two digital linksto each facility: a two-way communications link and a one-way surveillancelink from DABS to ATC.

This document describes the ATC facility (terminal and en route) hardware

required for interfacing with DABS surveillance and communications links.

17. Key Words 18. Distribution Statement

Air Traffic Control Document is available to the public

Discrete Address Beacon System through the National Technical

Interface Information Service, Springfield,Surveillance Virginia 22161.

. 9. Scuriy Clossif. (Of tin ra e1 20. Security Clessif. (of this page) 21. No. Of Pages 22. Price

.. Unclassified Unclassified 16

! :aFom DOT F 1700.7 (8-72) Reproduction of completeod page authorizied ). .-3 0P

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Page 6: ABOS2~i EDEAL AVIATION ADNNShTO AHNTND YTMECFB1/ …AIR TRAFFIC CONTROL (ATC) FACILITY HARDWARE INTERFACES FOR DISC--ETC(U) WiLASSIFIED FAA-R-RD-S0-38 ... INTERFACES FOR DISCRETE ADDRESS

TABLE OF CONTENTS

SECTION PAGE

I. Introduction 1

II. En Route Facility Interfaces 2

, 2.1 Surveillance Interface 2

2.2 Communications Interface 4

III. Terminal ATC Facility Interfaces 9

3.1 Surveillance Interface 9

3.2 Communications Interface 12

REFERENCES: 13

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SECTION I

INTRODUCTION

The Discrete Address Beacon System (DABS), when deployedwithin the National Airspace System (NPS), will provide sur-veillance of aircraft equipped with either ATCRBS or DABStransponders. For those aircraft equipped with DABS trans-ponders, a high capacity, ground-air-ground digital communica-tions link is also provided.

Surveillance data and data link services will be providedto Air Traffic Control (ATC) facilities (Terminal and En route).Each DABS sensor will have two digital links to each ATCfacility: a two-way communications link and a one-way surveil-lance link from sensor to ATC.

The purpose of this document is to describe the Terminaland Fn route ATC facility hardware configuration for inter-facing with DABS.

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SECTION II

EN ROUTE ATC FACILITY INTERFACES

The interconnection between DABS and the En Route AirTraffic Control (ATC) facility is via two completely separatenarrow band telephone data links: surveillance and communi-cations, as shown in Figure 2-1.

A one-way surveillance link from the DABS sensor to the enroute ATC automation system provides unsmoothed aircraft positionreports, one report-per-aircraft-per-scan. Surveillance dataformats are specified in Reference 1.

A two-way communications link between the DABS sensor andthe en route ATC automation system supports both the data linkfunction between ATC and DABS-equipped aircraft and the controland monitoring of the DABS sensor. This communications link isoperated in conformance with the formats and procedures of theCommon ICAO* Data Interchange Network (CIDIN) specified inReference 1. A Front End Processor (FEP) located within theen route facility performs a translation between the CIDIN pro-tocol and the protocol used by the en route 9020 central computercomplex (CCC). The FEP/9020 CCC protocol is specified in Ref-erence 2.

2.1 SURVEILLANCE INTERFACE

The surveillance data interface is a unidirectional (simplex)interface which is used for the transfer of surveillance datafrom the DABS sensor to the en route ATC facility. This interfaceuses unconditioned type 3002 telephone circuits with a 4800 bitper second (bps) modem for each surveillance channel. Additionalchannels may be used as necessary to support the data rate at aparticular site. When multiple channels are used, each channeloperates independently.

The surveillance link modems located at the en route ATCfacility are connected to the inputs of the Data Receiving Equip-ment (DRE). Each surveillance channel modem is connected to aseparate DRE channel. The electrical signal characteristics ofthe interface between the modem and the DRE shall conform toMIL-STD-188C, as defined in FCC Tariff 260.

The surveillance data is preprocessed by the DRE and theninput into the 9020 Central Computer Complex (CCC) through a9020 Common Digitizer (CD) adapter. A separate CD adapter isused for each surveillance channel

2* International Civil Aviation Organization

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Page 10: ABOS2~i EDEAL AVIATION ADNNShTO AHNTND YTMECFB1/ …AIR TRAFFIC CONTROL (ATC) FACILITY HARDWARE INTERFACES FOR DISC--ETC(U) WiLASSIFIED FAA-R-RD-S0-38 ... INTERFACES FOR DISCRETE ADDRESS

2.2 COMMUNICATION INTERFACE

The communication data interface is a bidirectional, fullduplex, interface used for the transfer of status, control andoperational ATC messages between the DABS sensor and the enroute ATC facility. This interface uses unconditioned type3002 telephone circuits with 4800 bps modems for each communi-cations channel. The communication data interface modems lo-cated at the en route ATC facility are connected to the FrontEnd Processor (FEP). The FEP provides a separate full duplexinterface for each DABS sensor communication channel. Theelectrical signal characteristics of the interface between themodem and the FEP shall conform to MIL-STD-188C as defined inFCC Tariff 260.

The interface between the FEP and the 9020 Central ComputerComplex (CCC) is a single bidirectional interface. This inter-face uses a General Purpose Input (GPI) adapter for transfer ofdata from the FFP to the 9020 CCC and a General Purpose Output(GPO) adapter for the transfer of data from the 9020 CCC to theFEP.

2.2.1 GENERAL PURPOSE INPUT ADAPTER INTERFACE

The GPI adapter provides an 8-bit plus odd parity parallelinterface for transfer of data from the FEP to the 9020 CCC.The signal lines for the GPI interface are as follows:

Data Lines Initiated By

Data In bit pos. P FEPData In bit pos. 0 FEPData In bit pos. 1 FEPData In bit pos. 2 FEPData In bit pos. 3 FEPData In bit pos. 4 FEPData In bit pos. 5 FEPData In bit pos. 6 FEPData In bit pos. 7 FEP

Control Lines Initiated By

I/O Request In FEPAdapter Response Out AdapterDevice Control Line 1 Out AdapterDevice Control Line 3 Out AdapterDevice Control Line 4 Out AdapterEnd of Message (EOM) In FEP

4

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SIGNAL LINES DESCRIPTION

Data In Lines (Bits 0-7)The signal levels on these eight parallel lines will be

presented to the adapter by the PEP and will be static when theI/O request is detected by the adapter.

Parity LineThe signal level on this line is originated by the FEP to

establish odd parity for the associated data lines. The signalwill be Presented to the adapter and will be static when theI/O request is detected by the adapter.

I/O Request InThe signal level on this line is initiated by the FEP.

When an active I/O request signal is detected by the adapter ata time that the adapter is selected and the adapter data regis-ter is empty, the adapter will sample the status of the data

and parity lines into the adapter data register. The I/O requestsignal will also be used to sample the EOM line.

By controlling the frequency of the I/O request line, theFEP sets the data transfer rate within system limitation. TheFEP will only make the I/O request signal inactive when theadapter response signal is detected by the FEP. The I/O re-quest signal must be made inactive and then active again beforethe transmission of either another data character or the EOMsignal is possible.

Adapter Response OutAn active signal on this line is initiated by the adapter

and indicates to the FEP that the adapter has sampled the data,parity, and EOM lines. The Adapter Response Signal will go in-active when the FEP causes the 1/0 Request Signal to go inactive.

The active to inactive transition of the Adapter Response Signalcould occur before the associated I/O Request Signal, when in-active, if the channel recognized the termination sequence beforethe FEP dropped the I/O Request Signal.

Device Control Line 1 Out, Device Control Line 3 Out, DeviceControl Line 4 Out

The signals of these three lines will be initiated by theadapter when selected to perform a read operation. These signalswill remain active until termination of the read operation.

Device Control Line 1 OutThis signal will be up when modifier bit 1 of a read command

is set to a "one".

5

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Device Control Line 3 OutThis signal will be up when modifier bit 3 of a read

command is set to a "one".

Device Control Line 4 OutThis signal will be up when modifier bit 4 of a read

command is set to a "one".

EOM InA signal level on this line is initiated by the FEP and

presented to the adapter after the transfer of the last byte ofthe message has been effected, i.e., the I/O Request andAdapter Response Signals transferring the last byte of themessage have been brought inactive. The signal on this lineshould be presented and static when the I/O Request Signal isdetected by the adapter.

Electrical CharacteristicsThe signal line voltage of +3.7 volts will be used for the

active state (one bit) and ground for the inactive state (zerobit).

A detailed description of the operation of the GPI adapterand its interface can be found in Reference 3.

2.2.2 GENERAL PURPOSE OUTPUT ADAPTER INTERFACE

The General Purpose Output (GPO) adapter provides an 8-bitplus odd parity parallel interface for transfer of data from the9020 CCC to the FEP. The signal lines for the GPO interface areas follows:

Data Lines Initiated By

Data Out bit pos. P AdapterData Out bit pos. 0 AdapterData Out bit pos. 1 AdapterData Out bit pos. 2 AdapterData Out bit pos. 3 AdapterData Out bit pos. 4 AdapterData Out bit pos. 5 AdapterData Out bit pos. 6 AdapterData Out bit pos. 7 Adapter

6

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Control Lines Initiated By

I/O Request In PEPAdapter Response Out AdapterDevice Inoperative In FEPDevice Status Line 3 In FEPDevice Status Line 5 In FEPDevice Status Line 6 In PEPDevice Status Line 7 In FEPAdapter Selected Out AdapterAdapter End of Message EOM) Out Adapter

SIGNAL LINE DESCRIPTION

1 Data Out Line (Bits 0-7)The signals on these parallel lines will be presented by

A the adapter to the FEP and will be static when the AdapterResponse Signal is detected by the FEP.

Parity LineThe adapter originates a signal on this line to establish

odd parity to the associated data lines. This signal level willbe presented to the PEP and will be static when the AdapterResponse Signal is detected by the FEP.

I/O Request InThe signal level on this line is initiated by the FEP.

When the I/O Request Signal is detected by the adapter, and theadapter has a data byte or EOIA Out signal to transfer to theFEP, the adapter will initiate an Adapter Response Signal tothe PEP. When the I/O Request Signal goes inactive, the adapterwill initiate the transfer of the next data byte from the 9020CCC to the adapter data register. By controlling the frequencyof the signals on the I/O Request Line, the PEP sets the datatransfer rate within system limitation- The device must assurethat signals on device status lines 3,5,6, or 7 are static forsampling when the fall of I/O Request is detected by the adapter.

Adapter Response OutAn active signal on this line is initiated by the adapter

when the adapter has a data byte or EOM Out to transfer to thePEP and the I/O Request Signal is active. The Adapter ResponseSignal will go inactive after the PEP causes the I/O RequestSignal to go inactive and the adapter has read the device statuslines.

Device Inoperative InThis line is monitored by the adapter whenever the adapter

is selected. Upon detection of an active signal (open or groundlevel) the adapter will also sense Device Status Lines 3,5,6,and 7. Upon detection of a "Device Inoperative" condition, theoperation will be terminated and Unit Check presented withChannel End and Device End status.

7

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Device Status Lines 3,5,6, and 7These lines are monitored by the adapter whenever the Device

Inoperative Line is active (ground level or open) or, in theabsence of an active Device Inoperative signal, between thefall of I/O Request In and the fall of Adapter Response Out,during a Write operation. Upon detection of a signal(s) online 3,5, and 6, the operation is terminated. A signal on DeviceStatus Line 7 will not terminate the operation. The FEP shallreset the Device Status Lines after the adapter signals term-ination by dropping Adapter Selected Out. This will not resetsense register bits that have been set by Device Status Lines.

Adapter Selected OutA signal on this line is initiated by the adapter and is

active whenever the adapter is selected for message transfer(write mode). This signal, detected by the FEP, indicates thatthe 9020 CCC has a message to transmit. Under normal conditionsthis signal is brought inactive during the termination sequence.If the Adapter Selected Signal is brought inactive without theEOM signal having been presented to the FEP, the FEP is able todetermine that the adapter has been deselected (write operationterminated) by some abnormal condition. There are several ab-normal conditions causing the write operation to be terminated:Bus Out Check, Data Check, Device Inoperative, or an activeDevice Status in Line 3, 5 or 6, detected by the adapter, a HaltI/O condition initiated by the program, a selective reset isissued by the channel, or a system reset occurs. This abnormalcondition detection by the FEP may be used to enable the FEP toset up for a retransmission.

Adapter End of Message (FOM) OutThe adapter response signal, resulting from any active I/0

request from the FEP, is used by the FEP to sample the adapterEOM signal (the data lines are not valid when the active adapterEOM signal is sampled). The fall of the I/O Request In thattransferred the EOM signal to the FEP will cause the adapter toinitiate the termination of the write operation. Use of Adapter

FOM is optional. If EOM is not used, Adapter Selected Out goinginactive signals the End of Message.

Electrical CharacteristicsThe signal line voltage of +3.7 volts will be used for the

active state (one bit) and ground for the inactive state (zerobit).

A detailed description of the operation of the GPO adapterand its interface can be found in Reference 3.

8

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SECTION III

TFRMINAL ATC FACILITY INTERFACFS

The interconnection between DABS and the Terminal AirTraffic Control (ATC) system is via two completely separatenarrow band telephone data links surveillance and communi-cations as shown in Figure 3-1.

The surveillance link consists of two separate and indepen-dent one-way channels from DABS to the terminal ATC facility.One channel supports the ARTS III data processing subsystem (DPS)and the other channel supports the Video Reconstitutor. Eachsurveillance channel carries a data stream of radar, beacon,radar reinforced beacon, and weather messages. The only differ-ence between the two channels is that the sensor reformats allDABS transponder reports as ATCRBS reports prior to disseminationto the Video Reconstitutor. This is required to perform conven-tional beacon decoding of the reconstituted video. Surveillancemessage formats are specified in Reference 1.

The Video Reconstitutor is an independent, self containedunit located at the ARTS III ATC facility. It provides aparallel path from the telephone line to the display by convert-ing the narrow band digital surveillance messages to rho-thetaATCRBS beacon, radar and weather video formats for use on time-shared displays such as the ARTS III Data Entry and Display Sub-system (DEDS). The Video Reconstitutor also internally generatesAzimuth Change Pulses (ACP), Azimuth Reference Pulse (ARP),radar and beacon pretriggers such that a broad band link betweentransmitter and indicator site is not required for its properoperation. In the event of an ARTS III DPS failure, the VideoReconstitutor continues to operate, providing video aircraftpositional and weather information to the DEDS.

The communications link between the DABS sensor and the ARTSIII facility is a two-way link which supports both the data linkfunction between ATC and DABS-equipped aircraft and the controland monitoring of the DABS sensor. Transmission of communicationsmessages on this link is in conformance with CIDIN protocol andthe message formats specified in Reference 1.

3.1 SURVEILLANCE INTERFACE

The surveillance data interface is a unidirectional (simplex)interface used for the transfer of surveillance messages fromthe DABS sensor to the terminal ATC facility. This interfaceuses unconditioned type 3002 telephone circuits with 4800 bpsmodems for each surveillance channel. Multiple channels willbe used to expand the single channel transfer rate of 4800 bpsas required to support the data rate at a particular site.

9

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The surveillance link modems located at the terminal ATCfacility are connected to the inputs of the Radar ReceiverAdapter (RRA) and the Video Reconstitutor. The electricalsignal characteristics for the modem digital interface shallconform to MIL-STD-188C, as defined in FCC Tariff 260.

3.1.1 RADAR RECEIVER ADAPTERThe Radar Receiver Adapter is a part of the Communications

Multiplexer Controller (CMC) which converts the narrow bandsurveillance data for high speed input to the ARTS III DPS.A separate Radar Receiver Adapter is used for each channel.

3.1.2 VIDEO RECONSTITUTORA separate, independent surveillance link is interfaced

to the Video Reconstitutor. The Video Reconstitutor convertsdigital surveillance data into analog video signals for pre-sentation on the ARTS Data Entry and Display Subsystem (DEDS)time-shared displays. The characteristics of the data on theinterface between the Video Reconstitutor and the DEDS shall beas follows:

1. ACP/ARP

ACP's 4096 per 360 degrees of antennarotation equally spaced for con-stant rotation rate.

ACP pulse-to-pulse + 10% of normal spacing

jitter

APP jitter + 20% of ACP normal spacing

Pulse Amplitude 5 volts peak-to-peak

2. Beacon Video

Amplitude 2.0 - 4.0 volts

Rise time .05 - .15 microsecond

Fall time .1 - .25 microsecond

3. Radar Video

Amplitude 2.0 - 4.0 volts

Rise/fall time .2 microsecond

11

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4. Radar Pre-triggers

Amplitude 30 - 90 volts

Position 20 to 120 microsecondsbefore radar range 0

Pulse Width 1 microsecond + 0.5

Rise time less than 20% of pulsewidth

A detailed description of the DEDS and its interface canbe found in Reference 4.

3.2 COMMUNICATION INTERFACE

The communication data interface is a bidirectional, fullduplex, interface used for the transfer of status, control, andoperational ATC messages between the DABS sensor and the terminalATC facility. This interface uses unconditioned type 3002 tele-phone circuits with 4800 bps modems.

The communications link modem located at the terminal ATCfacility will be connected to the ARTS computer complex througha Communications Transmitter Adapter (CTA) and a Communications

Receiver Adapter (CRA). These adapters are part of the Communi-cations Multiplexer Controller (CMC). A detailed descriptionof the CMC can be found in Reference 5.

The electrical characteristics of the digital interface tothe modem shall conform to MIL-STD-188C, as defined in FCCTariff 260.

The communications link protocol is the CIDIN protocolspecified in Reference 1.

12

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REFERENCES

1. Report No. FAA-RD-80-14, DABS/ATC Facility Surveillanceand Communications Message Formats, April 1980

2. Report No. FAA-RD-80-37, DABS Front End Processor/EnRoute Central Computer Complex Protocol, April 1980

3. International Business Machine Corporation, 9020DSystem, 9020E System, Design Data, 1 December 1969

4. Airway Facilities Service, Automation FngineeringDivision, AAF-640, NAFEC; ARTS Data Entry DisplaySubsystem Instruction Book, Volume 1-IV, TI 6310.8A

5. UNIVAC Defense Systems Division, CommunicationsMultiplexer Controller (CMC) Design Data, ATC-10706,January 1980

13